Moved uart TX for debug to PB_02 pin, letting the PB_19 pin free for the I2C SDA line

This commit is contained in:
Th3maz1ng 2023-01-07 23:15:53 +01:00
parent 666a841026
commit a4b6ac5299
5 changed files with 66 additions and 30 deletions

View File

@ -16,8 +16,8 @@
#define WM_CONFIG_DEBUG_UART1 CFG_OFF/*PRINTF PORT USE UART1*/
/**Driver Support**/
#define TLS_CONFIG_HS_SPI CFG_ON /*High Speed SPI*/
#define TLS_CONFIG_LS_SPI CFG_ON /*Low Speed SPI*/
#define TLS_CONFIG_HS_SPI CFG_OFF /*High Speed SPI*/
#define TLS_CONFIG_LS_SPI CFG_OFF /*Low Speed SPI*/
#define TLS_CONFIG_UART CFG_ON /*UART*/
/**Only Factory Test At Command**/

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@ -33,7 +33,7 @@
#define UART_BITSTOP_VAL (0x03) /// 1 stop-bit; no crc; 8 data-bits
extern void set_printf_port(unsigned char port);
static void uart0Init (int bandrate)
static void uart0Init(int bandrate)
{
unsigned int bd;
@ -48,8 +48,25 @@ static void uart0Init (int bandrate)
tls_reg_write32(HR_UART0_DMA_CTRL, 0x00); /* Disable DMA */
tls_reg_write32(HR_UART0_FIFO_CTRL, 0x00); /* one byte TX/RX */
// tls_reg_write32(HR_UART0_INT_MASK, 0x00); /* Disable INT */
}
static void uart2Init(int bandrate)
{
unsigned int bd;
NVIC_DisableIRQ(UART24_IRQn);
NVIC_ClearPendingIRQ(UART24_IRQn);
bd = (APB_CLK/(16*bandrate) - 1)|(((APB_CLK%(bandrate*16))*16/(bandrate*16))<<16);
tls_reg_write32(HR_UART2_BAUD_RATE_CTRL, bd);
tls_reg_write32(HR_UART2_LINE_CTRL, UART_BITSTOP_VAL | UART_TXEN_BIT | UART_RXEN_BIT);
tls_reg_write32(HR_UART2_FLOW_CTRL, 0x00); /* Disable afc */
tls_reg_write32(HR_UART2_DMA_CTRL, 0x00); /* Disable DMA */
tls_reg_write32(HR_UART2_FIFO_CTRL, 0x00); /* one byte TX/RX */
// tls_reg_write32(HR_UART2_INT_MASK, 0x00); /* Disable INT */
}
#if 0
static void uart1_io_init(void)
{
@ -97,7 +114,8 @@ void board_init(void)
#if USE_UART0_PRINT
/* use uart0 as log output io */
uart0Init(115200);
//uart0Init(115200);
uart2Init(115200);
set_printf_port(0);
#else
uart1_io_init();

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@ -57,35 +57,48 @@ void set_printf_port(unsigned char port)
int sendchar(int ch)
{
//tls_reg_write32(HR_UART0_INT_MASK, 0x3);
if (printf_port == 0)
{
if(ch == '\n')
{
while (tls_reg_read32(HR_UART0_FIFO_STATUS) & 0x3F);
tls_reg_write32(HR_UART0_TX_WIN, '\r');
}
while(tls_reg_read32(HR_UART0_FIFO_STATUS) & 0x3F);
tls_reg_write32(HR_UART0_TX_WIN, (char)ch);
}
else if (printf_port == 1)
{
if(ch == '\n')
{
while (tls_reg_read32(HR_UART1_FIFO_STATUS) & 0x3F);
tls_reg_write32(HR_UART1_TX_WIN, '\r');
}
while(tls_reg_read32(HR_UART1_FIFO_STATUS) & 0x3F);
tls_reg_write32(HR_UART1_TX_WIN, (char)ch);
}
//tls_reg_write32(HR_UART0_INT_MASK, 0x0);
// tls_reg_write32(HR_UART0_INT_MASK, 0x3);
if (printf_port == 0)
{
if (ch == '\n')
{
while (tls_reg_read32(HR_UART0_FIFO_STATUS) & 0x3F);
tls_reg_write32(HR_UART0_TX_WIN, '\r');
}
while (tls_reg_read32(HR_UART0_FIFO_STATUS) & 0x3F);
tls_reg_write32(HR_UART0_TX_WIN, (char)ch);
}
else if (printf_port == 1)
{
if (ch == '\n')
{
while (tls_reg_read32(HR_UART1_FIFO_STATUS) & 0x3F);
tls_reg_write32(HR_UART1_TX_WIN, '\r');
}
while (tls_reg_read32(HR_UART1_FIFO_STATUS) & 0x3F);
tls_reg_write32(HR_UART1_TX_WIN, (char)ch);
}
// tls_reg_write32(HR_UART0_INT_MASK, 0x0);
return ch;
}
int sendchar_debug_uart(int ch)
{
if (ch == '\n')
{
while (tls_reg_read32(HR_UART2_FIFO_STATUS) & 0x3F);
tls_reg_write32(HR_UART2_TX_WIN, '\r');
}
while (tls_reg_read32(HR_UART2_FIFO_STATUS) & 0x3F);
tls_reg_write32(HR_UART2_TX_WIN, (char)ch);
return ch;
}
int fputc(int ch, FILE *stream)
{
(void)stream;
sendchar(ch);
//sendchar(ch);
sendchar_debug_uart(ch);
return 0;
}

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@ -35,5 +35,6 @@ char * strdup(const char *s);
char * strndup(const char *s, size_t len);
int sendchar(int ch);
int sendchar_debug_uart(int ch);
#endif /* UTILS_H */

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@ -151,8 +151,11 @@ void wm_gpio_config()
/* must call first */
wm_gpio_af_disable();
wm_uart0_tx_config(WM_IO_PB_19);
wm_uart0_rx_config(WM_IO_PB_20);
/*wm_uart0_tx_config(WM_IO_PB_19);
wm_uart0_rx_config(WM_IO_PB_20);*/
/* used for the debug uart */
wm_uart2_tx_scio_config(WM_IO_PB_02);
/*Please Attention, only one IO's multiplex can be used at one times' configuration. */
@ -233,6 +236,7 @@ int main(void)
tls_reg_write32(HR_PMU_BK_REG, value);
value = tls_reg_read32(HR_PMU_PS_CR);
value &= ~(BIT(5));
value &= ~(BIT(6)); //Set wakeup pin to trigger immediatly by clearing pin 6, needed for the touch panel fast interrupt
tls_reg_write32(HR_PMU_PS_CR, value);
/*Close those not initialized clk except touchsensor/trng, uart0,sdadc,gpio,rfcfg*/