Th3maz1ng/AudioDAC
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AudioDAC/Debug/AudioDAC.list
Th3maz1ng 4a42e20b19 First commit
2021-04-04 10:26:29 +02:00

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AudioDAC.elf: file format elf32-littlearm
Sections:
Idx Name Size VMA LMA File off Algn
0 .isr_vector 00000194 08000000 08000000 00010000 2**0
CONTENTS, ALLOC, LOAD, READONLY, DATA
1 .text 0000a01c 080001a0 080001a0 000101a0 2**4
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .rodata 000000f4 0800a1bc 0800a1bc 0001a1bc 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
3 .ARM.extab 00000000 0800a2b0 0800a2b0 000200a4 2**0
CONTENTS
4 .ARM 00000008 0800a2b0 0800a2b0 0001a2b0 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
5 .preinit_array 00000000 0800a2b8 0800a2b8 000200a4 2**0
CONTENTS, ALLOC, LOAD, DATA
6 .init_array 00000004 0800a2b8 0800a2b8 0001a2b8 2**2
CONTENTS, ALLOC, LOAD, DATA
7 .fini_array 00000004 0800a2bc 0800a2bc 0001a2bc 2**2
CONTENTS, ALLOC, LOAD, DATA
8 .data 000000a4 20000000 0800a2c0 00020000 2**2
CONTENTS, ALLOC, LOAD, DATA
9 .bss 0000085c 200000a4 0800a364 000200a4 2**2
ALLOC
10 ._user_heap_stack 00000600 20000900 0800a364 00020900 2**0
ALLOC
11 .ARM.attributes 00000030 00000000 00000000 000200a4 2**0
CONTENTS, READONLY
12 .debug_info 0001c5f4 00000000 00000000 000200d4 2**0
CONTENTS, READONLY, DEBUGGING
13 .debug_abbrev 00003e07 00000000 00000000 0003c6c8 2**0
CONTENTS, READONLY, DEBUGGING
14 .debug_aranges 00001410 00000000 00000000 000404d0 2**3
CONTENTS, READONLY, DEBUGGING
15 .debug_ranges 00001270 00000000 00000000 000418e0 2**3
CONTENTS, READONLY, DEBUGGING
16 .debug_macro 0001b56c 00000000 00000000 00042b50 2**0
CONTENTS, READONLY, DEBUGGING
17 .debug_line 00013cb9 00000000 00000000 0005e0bc 2**0
CONTENTS, READONLY, DEBUGGING
18 .debug_str 00091e28 00000000 00000000 00071d75 2**0
CONTENTS, READONLY, DEBUGGING
19 .comment 0000007b 00000000 00000000 00103b9d 2**0
CONTENTS, READONLY
20 .debug_frame 00005a48 00000000 00000000 00103c18 2**2
CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:
080001a0 <__do_global_dtors_aux>:
80001a0: b510 push {r4, lr}
80001a2: 4c05 ldr r4, [pc, #20] ; (80001b8 <__do_global_dtors_aux+0x18>)
80001a4: 7823 ldrb r3, [r4, #0]
80001a6: b933 cbnz r3, 80001b6 <__do_global_dtors_aux+0x16>
80001a8: 4b04 ldr r3, [pc, #16] ; (80001bc <__do_global_dtors_aux+0x1c>)
80001aa: b113 cbz r3, 80001b2 <__do_global_dtors_aux+0x12>
80001ac: 4804 ldr r0, [pc, #16] ; (80001c0 <__do_global_dtors_aux+0x20>)
80001ae: f3af 8000 nop.w
80001b2: 2301 movs r3, #1
80001b4: 7023 strb r3, [r4, #0]
80001b6: bd10 pop {r4, pc}
80001b8: 200000a4 .word 0x200000a4
80001bc: 00000000 .word 0x00000000
80001c0: 0800a1a4 .word 0x0800a1a4
080001c4 <frame_dummy>:
80001c4: b508 push {r3, lr}
80001c6: 4b03 ldr r3, [pc, #12] ; (80001d4 <frame_dummy+0x10>)
80001c8: b11b cbz r3, 80001d2 <frame_dummy+0xe>
80001ca: 4903 ldr r1, [pc, #12] ; (80001d8 <frame_dummy+0x14>)
80001cc: 4803 ldr r0, [pc, #12] ; (80001dc <frame_dummy+0x18>)
80001ce: f3af 8000 nop.w
80001d2: bd08 pop {r3, pc}
80001d4: 00000000 .word 0x00000000
80001d8: 200000a8 .word 0x200000a8
80001dc: 0800a1a4 .word 0x0800a1a4
080001e0 <memchr>:
80001e0: f001 01ff and.w r1, r1, #255 ; 0xff
80001e4: 2a10 cmp r2, #16
80001e6: db2b blt.n 8000240 <memchr+0x60>
80001e8: f010 0f07 tst.w r0, #7
80001ec: d008 beq.n 8000200 <memchr+0x20>
80001ee: f810 3b01 ldrb.w r3, [r0], #1
80001f2: 3a01 subs r2, #1
80001f4: 428b cmp r3, r1
80001f6: d02d beq.n 8000254 <memchr+0x74>
80001f8: f010 0f07 tst.w r0, #7
80001fc: b342 cbz r2, 8000250 <memchr+0x70>
80001fe: d1f6 bne.n 80001ee <memchr+0xe>
8000200: b4f0 push {r4, r5, r6, r7}
8000202: ea41 2101 orr.w r1, r1, r1, lsl #8
8000206: ea41 4101 orr.w r1, r1, r1, lsl #16
800020a: f022 0407 bic.w r4, r2, #7
800020e: f07f 0700 mvns.w r7, #0
8000212: 2300 movs r3, #0
8000214: e8f0 5602 ldrd r5, r6, [r0], #8
8000218: 3c08 subs r4, #8
800021a: ea85 0501 eor.w r5, r5, r1
800021e: ea86 0601 eor.w r6, r6, r1
8000222: fa85 f547 uadd8 r5, r5, r7
8000226: faa3 f587 sel r5, r3, r7
800022a: fa86 f647 uadd8 r6, r6, r7
800022e: faa5 f687 sel r6, r5, r7
8000232: b98e cbnz r6, 8000258 <memchr+0x78>
8000234: d1ee bne.n 8000214 <memchr+0x34>
8000236: bcf0 pop {r4, r5, r6, r7}
8000238: f001 01ff and.w r1, r1, #255 ; 0xff
800023c: f002 0207 and.w r2, r2, #7
8000240: b132 cbz r2, 8000250 <memchr+0x70>
8000242: f810 3b01 ldrb.w r3, [r0], #1
8000246: 3a01 subs r2, #1
8000248: ea83 0301 eor.w r3, r3, r1
800024c: b113 cbz r3, 8000254 <memchr+0x74>
800024e: d1f8 bne.n 8000242 <memchr+0x62>
8000250: 2000 movs r0, #0
8000252: 4770 bx lr
8000254: 3801 subs r0, #1
8000256: 4770 bx lr
8000258: 2d00 cmp r5, #0
800025a: bf06 itte eq
800025c: 4635 moveq r5, r6
800025e: 3803 subeq r0, #3
8000260: 3807 subne r0, #7
8000262: f015 0f01 tst.w r5, #1
8000266: d107 bne.n 8000278 <memchr+0x98>
8000268: 3001 adds r0, #1
800026a: f415 7f80 tst.w r5, #256 ; 0x100
800026e: bf02 ittt eq
8000270: 3001 addeq r0, #1
8000272: f415 3fc0 tsteq.w r5, #98304 ; 0x18000
8000276: 3001 addeq r0, #1
8000278: bcf0 pop {r4, r5, r6, r7}
800027a: 3801 subs r0, #1
800027c: 4770 bx lr
800027e: bf00 nop
08000280 <__aeabi_uldivmod>:
8000280: b953 cbnz r3, 8000298 <__aeabi_uldivmod+0x18>
8000282: b94a cbnz r2, 8000298 <__aeabi_uldivmod+0x18>
8000284: 2900 cmp r1, #0
8000286: bf08 it eq
8000288: 2800 cmpeq r0, #0
800028a: bf1c itt ne
800028c: f04f 31ff movne.w r1, #4294967295
8000290: f04f 30ff movne.w r0, #4294967295
8000294: f000 b972 b.w 800057c <__aeabi_idiv0>
8000298: f1ad 0c08 sub.w ip, sp, #8
800029c: e96d ce04 strd ip, lr, [sp, #-16]!
80002a0: f000 f806 bl 80002b0 <__udivmoddi4>
80002a4: f8dd e004 ldr.w lr, [sp, #4]
80002a8: e9dd 2302 ldrd r2, r3, [sp, #8]
80002ac: b004 add sp, #16
80002ae: 4770 bx lr
080002b0 <__udivmoddi4>:
80002b0: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
80002b4: 9e08 ldr r6, [sp, #32]
80002b6: 4604 mov r4, r0
80002b8: 4688 mov r8, r1
80002ba: 2b00 cmp r3, #0
80002bc: d14b bne.n 8000356 <__udivmoddi4+0xa6>
80002be: 428a cmp r2, r1
80002c0: 4615 mov r5, r2
80002c2: d967 bls.n 8000394 <__udivmoddi4+0xe4>
80002c4: fab2 f282 clz r2, r2
80002c8: b14a cbz r2, 80002de <__udivmoddi4+0x2e>
80002ca: f1c2 0720 rsb r7, r2, #32
80002ce: fa01 f302 lsl.w r3, r1, r2
80002d2: fa20 f707 lsr.w r7, r0, r7
80002d6: 4095 lsls r5, r2
80002d8: ea47 0803 orr.w r8, r7, r3
80002dc: 4094 lsls r4, r2
80002de: ea4f 4e15 mov.w lr, r5, lsr #16
80002e2: 0c23 lsrs r3, r4, #16
80002e4: fbb8 f7fe udiv r7, r8, lr
80002e8: fa1f fc85 uxth.w ip, r5
80002ec: fb0e 8817 mls r8, lr, r7, r8
80002f0: ea43 4308 orr.w r3, r3, r8, lsl #16
80002f4: fb07 f10c mul.w r1, r7, ip
80002f8: 4299 cmp r1, r3
80002fa: d909 bls.n 8000310 <__udivmoddi4+0x60>
80002fc: 18eb adds r3, r5, r3
80002fe: f107 30ff add.w r0, r7, #4294967295
8000302: f080 811b bcs.w 800053c <__udivmoddi4+0x28c>
8000306: 4299 cmp r1, r3
8000308: f240 8118 bls.w 800053c <__udivmoddi4+0x28c>
800030c: 3f02 subs r7, #2
800030e: 442b add r3, r5
8000310: 1a5b subs r3, r3, r1
8000312: b2a4 uxth r4, r4
8000314: fbb3 f0fe udiv r0, r3, lr
8000318: fb0e 3310 mls r3, lr, r0, r3
800031c: ea44 4403 orr.w r4, r4, r3, lsl #16
8000320: fb00 fc0c mul.w ip, r0, ip
8000324: 45a4 cmp ip, r4
8000326: d909 bls.n 800033c <__udivmoddi4+0x8c>
8000328: 192c adds r4, r5, r4
800032a: f100 33ff add.w r3, r0, #4294967295
800032e: f080 8107 bcs.w 8000540 <__udivmoddi4+0x290>
8000332: 45a4 cmp ip, r4
8000334: f240 8104 bls.w 8000540 <__udivmoddi4+0x290>
8000338: 3802 subs r0, #2
800033a: 442c add r4, r5
800033c: ea40 4007 orr.w r0, r0, r7, lsl #16
8000340: eba4 040c sub.w r4, r4, ip
8000344: 2700 movs r7, #0
8000346: b11e cbz r6, 8000350 <__udivmoddi4+0xa0>
8000348: 40d4 lsrs r4, r2
800034a: 2300 movs r3, #0
800034c: e9c6 4300 strd r4, r3, [r6]
8000350: 4639 mov r1, r7
8000352: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
8000356: 428b cmp r3, r1
8000358: d909 bls.n 800036e <__udivmoddi4+0xbe>
800035a: 2e00 cmp r6, #0
800035c: f000 80eb beq.w 8000536 <__udivmoddi4+0x286>
8000360: 2700 movs r7, #0
8000362: e9c6 0100 strd r0, r1, [r6]
8000366: 4638 mov r0, r7
8000368: 4639 mov r1, r7
800036a: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
800036e: fab3 f783 clz r7, r3
8000372: 2f00 cmp r7, #0
8000374: d147 bne.n 8000406 <__udivmoddi4+0x156>
8000376: 428b cmp r3, r1
8000378: d302 bcc.n 8000380 <__udivmoddi4+0xd0>
800037a: 4282 cmp r2, r0
800037c: f200 80fa bhi.w 8000574 <__udivmoddi4+0x2c4>
8000380: 1a84 subs r4, r0, r2
8000382: eb61 0303 sbc.w r3, r1, r3
8000386: 2001 movs r0, #1
8000388: 4698 mov r8, r3
800038a: 2e00 cmp r6, #0
800038c: d0e0 beq.n 8000350 <__udivmoddi4+0xa0>
800038e: e9c6 4800 strd r4, r8, [r6]
8000392: e7dd b.n 8000350 <__udivmoddi4+0xa0>
8000394: b902 cbnz r2, 8000398 <__udivmoddi4+0xe8>
8000396: deff udf #255 ; 0xff
8000398: fab2 f282 clz r2, r2
800039c: 2a00 cmp r2, #0
800039e: f040 808f bne.w 80004c0 <__udivmoddi4+0x210>
80003a2: 1b49 subs r1, r1, r5
80003a4: ea4f 4e15 mov.w lr, r5, lsr #16
80003a8: fa1f f885 uxth.w r8, r5
80003ac: 2701 movs r7, #1
80003ae: fbb1 fcfe udiv ip, r1, lr
80003b2: 0c23 lsrs r3, r4, #16
80003b4: fb0e 111c mls r1, lr, ip, r1
80003b8: ea43 4301 orr.w r3, r3, r1, lsl #16
80003bc: fb08 f10c mul.w r1, r8, ip
80003c0: 4299 cmp r1, r3
80003c2: d907 bls.n 80003d4 <__udivmoddi4+0x124>
80003c4: 18eb adds r3, r5, r3
80003c6: f10c 30ff add.w r0, ip, #4294967295
80003ca: d202 bcs.n 80003d2 <__udivmoddi4+0x122>
80003cc: 4299 cmp r1, r3
80003ce: f200 80cd bhi.w 800056c <__udivmoddi4+0x2bc>
80003d2: 4684 mov ip, r0
80003d4: 1a59 subs r1, r3, r1
80003d6: b2a3 uxth r3, r4
80003d8: fbb1 f0fe udiv r0, r1, lr
80003dc: fb0e 1410 mls r4, lr, r0, r1
80003e0: ea43 4404 orr.w r4, r3, r4, lsl #16
80003e4: fb08 f800 mul.w r8, r8, r0
80003e8: 45a0 cmp r8, r4
80003ea: d907 bls.n 80003fc <__udivmoddi4+0x14c>
80003ec: 192c adds r4, r5, r4
80003ee: f100 33ff add.w r3, r0, #4294967295
80003f2: d202 bcs.n 80003fa <__udivmoddi4+0x14a>
80003f4: 45a0 cmp r8, r4
80003f6: f200 80b6 bhi.w 8000566 <__udivmoddi4+0x2b6>
80003fa: 4618 mov r0, r3
80003fc: eba4 0408 sub.w r4, r4, r8
8000400: ea40 400c orr.w r0, r0, ip, lsl #16
8000404: e79f b.n 8000346 <__udivmoddi4+0x96>
8000406: f1c7 0c20 rsb ip, r7, #32
800040a: 40bb lsls r3, r7
800040c: fa22 fe0c lsr.w lr, r2, ip
8000410: ea4e 0e03 orr.w lr, lr, r3
8000414: fa01 f407 lsl.w r4, r1, r7
8000418: fa20 f50c lsr.w r5, r0, ip
800041c: fa21 f30c lsr.w r3, r1, ip
8000420: ea4f 481e mov.w r8, lr, lsr #16
8000424: 4325 orrs r5, r4
8000426: fbb3 f9f8 udiv r9, r3, r8
800042a: 0c2c lsrs r4, r5, #16
800042c: fb08 3319 mls r3, r8, r9, r3
8000430: fa1f fa8e uxth.w sl, lr
8000434: ea44 4303 orr.w r3, r4, r3, lsl #16
8000438: fb09 f40a mul.w r4, r9, sl
800043c: 429c cmp r4, r3
800043e: fa02 f207 lsl.w r2, r2, r7
8000442: fa00 f107 lsl.w r1, r0, r7
8000446: d90b bls.n 8000460 <__udivmoddi4+0x1b0>
8000448: eb1e 0303 adds.w r3, lr, r3
800044c: f109 30ff add.w r0, r9, #4294967295
8000450: f080 8087 bcs.w 8000562 <__udivmoddi4+0x2b2>
8000454: 429c cmp r4, r3
8000456: f240 8084 bls.w 8000562 <__udivmoddi4+0x2b2>
800045a: f1a9 0902 sub.w r9, r9, #2
800045e: 4473 add r3, lr
8000460: 1b1b subs r3, r3, r4
8000462: b2ad uxth r5, r5
8000464: fbb3 f0f8 udiv r0, r3, r8
8000468: fb08 3310 mls r3, r8, r0, r3
800046c: ea45 4403 orr.w r4, r5, r3, lsl #16
8000470: fb00 fa0a mul.w sl, r0, sl
8000474: 45a2 cmp sl, r4
8000476: d908 bls.n 800048a <__udivmoddi4+0x1da>
8000478: eb1e 0404 adds.w r4, lr, r4
800047c: f100 33ff add.w r3, r0, #4294967295
8000480: d26b bcs.n 800055a <__udivmoddi4+0x2aa>
8000482: 45a2 cmp sl, r4
8000484: d969 bls.n 800055a <__udivmoddi4+0x2aa>
8000486: 3802 subs r0, #2
8000488: 4474 add r4, lr
800048a: ea40 4009 orr.w r0, r0, r9, lsl #16
800048e: fba0 8902 umull r8, r9, r0, r2
8000492: eba4 040a sub.w r4, r4, sl
8000496: 454c cmp r4, r9
8000498: 46c2 mov sl, r8
800049a: 464b mov r3, r9
800049c: d354 bcc.n 8000548 <__udivmoddi4+0x298>
800049e: d051 beq.n 8000544 <__udivmoddi4+0x294>
80004a0: 2e00 cmp r6, #0
80004a2: d069 beq.n 8000578 <__udivmoddi4+0x2c8>
80004a4: ebb1 050a subs.w r5, r1, sl
80004a8: eb64 0403 sbc.w r4, r4, r3
80004ac: fa04 fc0c lsl.w ip, r4, ip
80004b0: 40fd lsrs r5, r7
80004b2: 40fc lsrs r4, r7
80004b4: ea4c 0505 orr.w r5, ip, r5
80004b8: e9c6 5400 strd r5, r4, [r6]
80004bc: 2700 movs r7, #0
80004be: e747 b.n 8000350 <__udivmoddi4+0xa0>
80004c0: f1c2 0320 rsb r3, r2, #32
80004c4: fa20 f703 lsr.w r7, r0, r3
80004c8: 4095 lsls r5, r2
80004ca: fa01 f002 lsl.w r0, r1, r2
80004ce: fa21 f303 lsr.w r3, r1, r3
80004d2: ea4f 4e15 mov.w lr, r5, lsr #16
80004d6: 4338 orrs r0, r7
80004d8: 0c01 lsrs r1, r0, #16
80004da: fbb3 f7fe udiv r7, r3, lr
80004de: fa1f f885 uxth.w r8, r5
80004e2: fb0e 3317 mls r3, lr, r7, r3
80004e6: ea41 4103 orr.w r1, r1, r3, lsl #16
80004ea: fb07 f308 mul.w r3, r7, r8
80004ee: 428b cmp r3, r1
80004f0: fa04 f402 lsl.w r4, r4, r2
80004f4: d907 bls.n 8000506 <__udivmoddi4+0x256>
80004f6: 1869 adds r1, r5, r1
80004f8: f107 3cff add.w ip, r7, #4294967295
80004fc: d22f bcs.n 800055e <__udivmoddi4+0x2ae>
80004fe: 428b cmp r3, r1
8000500: d92d bls.n 800055e <__udivmoddi4+0x2ae>
8000502: 3f02 subs r7, #2
8000504: 4429 add r1, r5
8000506: 1acb subs r3, r1, r3
8000508: b281 uxth r1, r0
800050a: fbb3 f0fe udiv r0, r3, lr
800050e: fb0e 3310 mls r3, lr, r0, r3
8000512: ea41 4103 orr.w r1, r1, r3, lsl #16
8000516: fb00 f308 mul.w r3, r0, r8
800051a: 428b cmp r3, r1
800051c: d907 bls.n 800052e <__udivmoddi4+0x27e>
800051e: 1869 adds r1, r5, r1
8000520: f100 3cff add.w ip, r0, #4294967295
8000524: d217 bcs.n 8000556 <__udivmoddi4+0x2a6>
8000526: 428b cmp r3, r1
8000528: d915 bls.n 8000556 <__udivmoddi4+0x2a6>
800052a: 3802 subs r0, #2
800052c: 4429 add r1, r5
800052e: 1ac9 subs r1, r1, r3
8000530: ea40 4707 orr.w r7, r0, r7, lsl #16
8000534: e73b b.n 80003ae <__udivmoddi4+0xfe>
8000536: 4637 mov r7, r6
8000538: 4630 mov r0, r6
800053a: e709 b.n 8000350 <__udivmoddi4+0xa0>
800053c: 4607 mov r7, r0
800053e: e6e7 b.n 8000310 <__udivmoddi4+0x60>
8000540: 4618 mov r0, r3
8000542: e6fb b.n 800033c <__udivmoddi4+0x8c>
8000544: 4541 cmp r1, r8
8000546: d2ab bcs.n 80004a0 <__udivmoddi4+0x1f0>
8000548: ebb8 0a02 subs.w sl, r8, r2
800054c: eb69 020e sbc.w r2, r9, lr
8000550: 3801 subs r0, #1
8000552: 4613 mov r3, r2
8000554: e7a4 b.n 80004a0 <__udivmoddi4+0x1f0>
8000556: 4660 mov r0, ip
8000558: e7e9 b.n 800052e <__udivmoddi4+0x27e>
800055a: 4618 mov r0, r3
800055c: e795 b.n 800048a <__udivmoddi4+0x1da>
800055e: 4667 mov r7, ip
8000560: e7d1 b.n 8000506 <__udivmoddi4+0x256>
8000562: 4681 mov r9, r0
8000564: e77c b.n 8000460 <__udivmoddi4+0x1b0>
8000566: 3802 subs r0, #2
8000568: 442c add r4, r5
800056a: e747 b.n 80003fc <__udivmoddi4+0x14c>
800056c: f1ac 0c02 sub.w ip, ip, #2
8000570: 442b add r3, r5
8000572: e72f b.n 80003d4 <__udivmoddi4+0x124>
8000574: 4638 mov r0, r7
8000576: e708 b.n 800038a <__udivmoddi4+0xda>
8000578: 4637 mov r7, r6
800057a: e6e9 b.n 8000350 <__udivmoddi4+0xa0>
0800057c <__aeabi_idiv0>:
800057c: 4770 bx lr
800057e: bf00 nop
08000580 <setup>:
uint32_t ts_blink = 0;
uint8_t chipID = 0, revID = 0;
void setup(void)
{
8000580: b580 push {r7, lr}
8000582: af00 add r7, sp, #0
HAL_GPIO_Init(GPIOD, &heartBeatLed);
8000584: 4904 ldr r1, [pc, #16] ; (8000598 <setup+0x18>)
8000586: 4805 ldr r0, [pc, #20] ; (800059c <setup+0x1c>)
8000588: f000 ffa6 bl 80014d8 <HAL_GPIO_Init>
CS43L22_Init(&cs43l22, &hi2c1);
800058c: 4904 ldr r1, [pc, #16] ; (80005a0 <setup+0x20>)
800058e: 4805 ldr r0, [pc, #20] ; (80005a4 <setup+0x24>)
8000590: f000 fd96 bl 80010c0 <CS43L22_Init>
}
8000594: bf00 nop
8000596: bd80 pop {r7, pc}
8000598: 20000000 .word 0x20000000
800059c: 40020c00 .word 0x40020c00
80005a0: 200000e0 .word 0x200000e0
80005a4: 200000dc .word 0x200000dc
080005a8 <loop>:
void loop(void)
{
80005a8: b580 push {r7, lr}
80005aa: af00 add r7, sp, #0
if(HAL_GetTick() - ts_blink > HEARTBEAT)
80005ac: f000 fe54 bl 8001258 <HAL_GetTick>
80005b0: 4602 mov r2, r0
80005b2: 4b13 ldr r3, [pc, #76] ; (8000600 <loop+0x58>)
80005b4: 681b ldr r3, [r3, #0]
80005b6: 1ad3 subs r3, r2, r3
80005b8: f5b3 7f7a cmp.w r3, #1000 ; 0x3e8
80005bc: d91e bls.n 80005fc <loop+0x54>
{
HAL_GPIO_TogglePin(GPIOD, GPIO_PIN_13);
80005be: f44f 5100 mov.w r1, #8192 ; 0x2000
80005c2: 4810 ldr r0, [pc, #64] ; (8000604 <loop+0x5c>)
80005c4: f001 f923 bl 800180e <HAL_GPIO_TogglePin>
if(!CS43L22_GetDeviceID(&cs43l22, &chipID, &revID))
80005c8: 4a0f ldr r2, [pc, #60] ; (8000608 <loop+0x60>)
80005ca: 4910 ldr r1, [pc, #64] ; (800060c <loop+0x64>)
80005cc: 4810 ldr r0, [pc, #64] ; (8000610 <loop+0x68>)
80005ce: f000 fd8b bl 80010e8 <CS43L22_GetDeviceID>
80005d2: 4603 mov r3, r0
80005d4: 2b00 cmp r3, #0
80005d6: d103 bne.n 80005e0 <loop+0x38>
printf("Failed to retrieve CS43L22 ID\r\n");
80005d8: 480e ldr r0, [pc, #56] ; (8000614 <loop+0x6c>)
80005da: f008 ffb7 bl 800954c <puts>
80005de: e008 b.n 80005f2 <loop+0x4a>
else
printf("Device id : %u, revID : %u\r\n", chipID, revID);
80005e0: 4b0a ldr r3, [pc, #40] ; (800060c <loop+0x64>)
80005e2: 781b ldrb r3, [r3, #0]
80005e4: 4619 mov r1, r3
80005e6: 4b08 ldr r3, [pc, #32] ; (8000608 <loop+0x60>)
80005e8: 781b ldrb r3, [r3, #0]
80005ea: 461a mov r2, r3
80005ec: 480a ldr r0, [pc, #40] ; (8000618 <loop+0x70>)
80005ee: f008 ff39 bl 8009464 <iprintf>
ts_blink = HAL_GetTick();
80005f2: f000 fe31 bl 8001258 <HAL_GetTick>
80005f6: 4602 mov r2, r0
80005f8: 4b01 ldr r3, [pc, #4] ; (8000600 <loop+0x58>)
80005fa: 601a str r2, [r3, #0]
}
}
80005fc: bf00 nop
80005fe: bd80 pop {r7, pc}
8000600: 200000c0 .word 0x200000c0
8000604: 40020c00 .word 0x40020c00
8000608: 200000c5 .word 0x200000c5
800060c: 200000c4 .word 0x200000c4
8000610: 200000dc .word 0x200000dc
8000614: 0800a1bc .word 0x0800a1bc
8000618: 0800a1dc .word 0x0800a1dc
0800061c <__io_putchar>:
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
int __io_putchar(int ch)
{
800061c: b580 push {r7, lr}
800061e: b082 sub sp, #8
8000620: af00 add r7, sp, #0
8000622: 6078 str r0, [r7, #4]
HAL_UART_Transmit(&huart2, (uint8_t*)&ch, 1, HAL_MAX_DELAY);
8000624: 1d39 adds r1, r7, #4
8000626: f04f 33ff mov.w r3, #4294967295
800062a: 2201 movs r2, #1
800062c: 4803 ldr r0, [pc, #12] ; (800063c <__io_putchar+0x20>)
800062e: f005 f882 bl 8005736 <HAL_UART_Transmit>
return ch;
8000632: 687b ldr r3, [r7, #4]
}
8000634: 4618 mov r0, r3
8000636: 3708 adds r7, #8
8000638: 46bd mov sp, r7
800063a: bd80 pop {r7, pc}
800063c: 2000018c .word 0x2000018c
08000640 <main>:
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
8000640: b580 push {r7, lr}
8000642: af00 add r7, sp, #0
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
8000644: f000 fda2 bl 800118c <HAL_Init>
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
8000648: f000 f816 bl 8000678 <SystemClock_Config>
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
800064c: f000 f984 bl 8000958 <MX_GPIO_Init>
MX_I2C1_Init();
8000650: f000 f896 bl 8000780 <MX_I2C1_Init>
MX_I2S2_Init();
8000654: f000 f8c2 bl 80007dc <MX_I2S2_Init>
MX_I2S3_Init();
8000658: f000 f8ee bl 8000838 <MX_I2S3_Init>
MX_SPI1_Init();
800065c: f000 f91c bl 8000898 <MX_SPI1_Init>
MX_USB_HOST_Init();
8000660: f008 fb0e bl 8008c80 <MX_USB_HOST_Init>
MX_USART2_UART_Init();
8000664: f000 f94e bl 8000904 <MX_USART2_UART_Init>
/* USER CODE BEGIN 2 */
setup();
8000668: f7ff ff8a bl 8000580 <setup>
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1)
{
/* USER CODE END WHILE */
MX_USB_HOST_Process();
800066c: f008 fb2e bl 8008ccc <MX_USB_HOST_Process>
/* USER CODE BEGIN 3 */
loop();
8000670: f7ff ff9a bl 80005a8 <loop>
MX_USB_HOST_Process();
8000674: e7fa b.n 800066c <main+0x2c>
...
08000678 <SystemClock_Config>:
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
8000678: b580 push {r7, lr}
800067a: b098 sub sp, #96 ; 0x60
800067c: af00 add r7, sp, #0
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
800067e: f107 0330 add.w r3, r7, #48 ; 0x30
8000682: 2230 movs r2, #48 ; 0x30
8000684: 2100 movs r1, #0
8000686: 4618 mov r0, r3
8000688: f008 fe3c bl 8009304 <memset>
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
800068c: f107 031c add.w r3, r7, #28
8000690: 2200 movs r2, #0
8000692: 601a str r2, [r3, #0]
8000694: 605a str r2, [r3, #4]
8000696: 609a str r2, [r3, #8]
8000698: 60da str r2, [r3, #12]
800069a: 611a str r2, [r3, #16]
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
800069c: f107 0308 add.w r3, r7, #8
80006a0: 2200 movs r2, #0
80006a2: 601a str r2, [r3, #0]
80006a4: 605a str r2, [r3, #4]
80006a6: 609a str r2, [r3, #8]
80006a8: 60da str r2, [r3, #12]
80006aa: 611a str r2, [r3, #16]
/** Configure the main internal regulator output voltage
*/
__HAL_RCC_PWR_CLK_ENABLE();
80006ac: 2300 movs r3, #0
80006ae: 607b str r3, [r7, #4]
80006b0: 4b31 ldr r3, [pc, #196] ; (8000778 <SystemClock_Config+0x100>)
80006b2: 6c1b ldr r3, [r3, #64] ; 0x40
80006b4: 4a30 ldr r2, [pc, #192] ; (8000778 <SystemClock_Config+0x100>)
80006b6: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
80006ba: 6413 str r3, [r2, #64] ; 0x40
80006bc: 4b2e ldr r3, [pc, #184] ; (8000778 <SystemClock_Config+0x100>)
80006be: 6c1b ldr r3, [r3, #64] ; 0x40
80006c0: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
80006c4: 607b str r3, [r7, #4]
80006c6: 687b ldr r3, [r7, #4]
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
80006c8: 2300 movs r3, #0
80006ca: 603b str r3, [r7, #0]
80006cc: 4b2b ldr r3, [pc, #172] ; (800077c <SystemClock_Config+0x104>)
80006ce: 681b ldr r3, [r3, #0]
80006d0: f423 4340 bic.w r3, r3, #49152 ; 0xc000
80006d4: 4a29 ldr r2, [pc, #164] ; (800077c <SystemClock_Config+0x104>)
80006d6: f443 4300 orr.w r3, r3, #32768 ; 0x8000
80006da: 6013 str r3, [r2, #0]
80006dc: 4b27 ldr r3, [pc, #156] ; (800077c <SystemClock_Config+0x104>)
80006de: 681b ldr r3, [r3, #0]
80006e0: f403 4340 and.w r3, r3, #49152 ; 0xc000
80006e4: 603b str r3, [r7, #0]
80006e6: 683b ldr r3, [r7, #0]
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
80006e8: 2301 movs r3, #1
80006ea: 633b str r3, [r7, #48] ; 0x30
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
80006ec: f44f 3380 mov.w r3, #65536 ; 0x10000
80006f0: 637b str r3, [r7, #52] ; 0x34
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
80006f2: 2302 movs r3, #2
80006f4: 64bb str r3, [r7, #72] ; 0x48
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
80006f6: f44f 0380 mov.w r3, #4194304 ; 0x400000
80006fa: 64fb str r3, [r7, #76] ; 0x4c
RCC_OscInitStruct.PLL.PLLM = 8;
80006fc: 2308 movs r3, #8
80006fe: 653b str r3, [r7, #80] ; 0x50
RCC_OscInitStruct.PLL.PLLN = 336;
8000700: f44f 73a8 mov.w r3, #336 ; 0x150
8000704: 657b str r3, [r7, #84] ; 0x54
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
8000706: 2304 movs r3, #4
8000708: 65bb str r3, [r7, #88] ; 0x58
RCC_OscInitStruct.PLL.PLLQ = 7;
800070a: 2307 movs r3, #7
800070c: 65fb str r3, [r7, #92] ; 0x5c
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
800070e: f107 0330 add.w r3, r7, #48 ; 0x30
8000712: 4618 mov r0, r3
8000714: f004 f9b2 bl 8004a7c <HAL_RCC_OscConfig>
8000718: 4603 mov r3, r0
800071a: 2b00 cmp r3, #0
800071c: d001 beq.n 8000722 <SystemClock_Config+0xaa>
{
Error_Handler();
800071e: f000 f9f5 bl 8000b0c <Error_Handler>
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
8000722: 230f movs r3, #15
8000724: 61fb str r3, [r7, #28]
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
8000726: 2302 movs r3, #2
8000728: 623b str r3, [r7, #32]
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
800072a: 2300 movs r3, #0
800072c: 627b str r3, [r7, #36] ; 0x24
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
800072e: f44f 5380 mov.w r3, #4096 ; 0x1000
8000732: 62bb str r3, [r7, #40] ; 0x28
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
8000734: 2300 movs r3, #0
8000736: 62fb str r3, [r7, #44] ; 0x2c
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
8000738: f107 031c add.w r3, r7, #28
800073c: 2102 movs r1, #2
800073e: 4618 mov r0, r3
8000740: f004 fc0c bl 8004f5c <HAL_RCC_ClockConfig>
8000744: 4603 mov r3, r0
8000746: 2b00 cmp r3, #0
8000748: d001 beq.n 800074e <SystemClock_Config+0xd6>
{
Error_Handler();
800074a: f000 f9df bl 8000b0c <Error_Handler>
}
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_I2S;
800074e: 2301 movs r3, #1
8000750: 60bb str r3, [r7, #8]
PeriphClkInitStruct.PLLI2S.PLLI2SN = 192;
8000752: 23c0 movs r3, #192 ; 0xc0
8000754: 60fb str r3, [r7, #12]
PeriphClkInitStruct.PLLI2S.PLLI2SR = 2;
8000756: 2302 movs r3, #2
8000758: 613b str r3, [r7, #16]
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
800075a: f107 0308 add.w r3, r7, #8
800075e: 4618 mov r0, r3
8000760: f004 fdee bl 8005340 <HAL_RCCEx_PeriphCLKConfig>
8000764: 4603 mov r3, r0
8000766: 2b00 cmp r3, #0
8000768: d001 beq.n 800076e <SystemClock_Config+0xf6>
{
Error_Handler();
800076a: f000 f9cf bl 8000b0c <Error_Handler>
}
}
800076e: bf00 nop
8000770: 3760 adds r7, #96 ; 0x60
8000772: 46bd mov sp, r7
8000774: bd80 pop {r7, pc}
8000776: bf00 nop
8000778: 40023800 .word 0x40023800
800077c: 40007000 .word 0x40007000
08000780 <MX_I2C1_Init>:
* @brief I2C1 Initialization Function
* @param None
* @retval None
*/
static void MX_I2C1_Init(void)
{
8000780: b580 push {r7, lr}
8000782: af00 add r7, sp, #0
/* USER CODE END I2C1_Init 0 */
/* USER CODE BEGIN I2C1_Init 1 */
/* USER CODE END I2C1_Init 1 */
hi2c1.Instance = I2C1;
8000784: 4b12 ldr r3, [pc, #72] ; (80007d0 <MX_I2C1_Init+0x50>)
8000786: 4a13 ldr r2, [pc, #76] ; (80007d4 <MX_I2C1_Init+0x54>)
8000788: 601a str r2, [r3, #0]
hi2c1.Init.ClockSpeed = 100000;
800078a: 4b11 ldr r3, [pc, #68] ; (80007d0 <MX_I2C1_Init+0x50>)
800078c: 4a12 ldr r2, [pc, #72] ; (80007d8 <MX_I2C1_Init+0x58>)
800078e: 605a str r2, [r3, #4]
hi2c1.Init.DutyCycle = I2C_DUTYCYCLE_2;
8000790: 4b0f ldr r3, [pc, #60] ; (80007d0 <MX_I2C1_Init+0x50>)
8000792: 2200 movs r2, #0
8000794: 609a str r2, [r3, #8]
hi2c1.Init.OwnAddress1 = 0;
8000796: 4b0e ldr r3, [pc, #56] ; (80007d0 <MX_I2C1_Init+0x50>)
8000798: 2200 movs r2, #0
800079a: 60da str r2, [r3, #12]
hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
800079c: 4b0c ldr r3, [pc, #48] ; (80007d0 <MX_I2C1_Init+0x50>)
800079e: f44f 4280 mov.w r2, #16384 ; 0x4000
80007a2: 611a str r2, [r3, #16]
hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
80007a4: 4b0a ldr r3, [pc, #40] ; (80007d0 <MX_I2C1_Init+0x50>)
80007a6: 2200 movs r2, #0
80007a8: 615a str r2, [r3, #20]
hi2c1.Init.OwnAddress2 = 0;
80007aa: 4b09 ldr r3, [pc, #36] ; (80007d0 <MX_I2C1_Init+0x50>)
80007ac: 2200 movs r2, #0
80007ae: 619a str r2, [r3, #24]
hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
80007b0: 4b07 ldr r3, [pc, #28] ; (80007d0 <MX_I2C1_Init+0x50>)
80007b2: 2200 movs r2, #0
80007b4: 61da str r2, [r3, #28]
hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
80007b6: 4b06 ldr r3, [pc, #24] ; (80007d0 <MX_I2C1_Init+0x50>)
80007b8: 2200 movs r2, #0
80007ba: 621a str r2, [r3, #32]
if (HAL_I2C_Init(&hi2c1) != HAL_OK)
80007bc: 4804 ldr r0, [pc, #16] ; (80007d0 <MX_I2C1_Init+0x50>)
80007be: f002 fd33 bl 8003228 <HAL_I2C_Init>
80007c2: 4603 mov r3, r0
80007c4: 2b00 cmp r3, #0
80007c6: d001 beq.n 80007cc <MX_I2C1_Init+0x4c>
{
Error_Handler();
80007c8: f000 f9a0 bl 8000b0c <Error_Handler>
}
/* USER CODE BEGIN I2C1_Init 2 */
/* USER CODE END I2C1_Init 2 */
}
80007cc: bf00 nop
80007ce: bd80 pop {r7, pc}
80007d0: 200000e0 .word 0x200000e0
80007d4: 40005400 .word 0x40005400
80007d8: 000186a0 .word 0x000186a0
080007dc <MX_I2S2_Init>:
* @brief I2S2 Initialization Function
* @param None
* @retval None
*/
static void MX_I2S2_Init(void)
{
80007dc: b580 push {r7, lr}
80007de: af00 add r7, sp, #0
/* USER CODE END I2S2_Init 0 */
/* USER CODE BEGIN I2S2_Init 1 */
/* USER CODE END I2S2_Init 1 */
hi2s2.Instance = SPI2;
80007e0: 4b13 ldr r3, [pc, #76] ; (8000830 <MX_I2S2_Init+0x54>)
80007e2: 4a14 ldr r2, [pc, #80] ; (8000834 <MX_I2S2_Init+0x58>)
80007e4: 601a str r2, [r3, #0]
hi2s2.Init.Mode = I2S_MODE_MASTER_TX;
80007e6: 4b12 ldr r3, [pc, #72] ; (8000830 <MX_I2S2_Init+0x54>)
80007e8: f44f 7200 mov.w r2, #512 ; 0x200
80007ec: 605a str r2, [r3, #4]
hi2s2.Init.Standard = I2S_STANDARD_PHILIPS;
80007ee: 4b10 ldr r3, [pc, #64] ; (8000830 <MX_I2S2_Init+0x54>)
80007f0: 2200 movs r2, #0
80007f2: 609a str r2, [r3, #8]
hi2s2.Init.DataFormat = I2S_DATAFORMAT_16B;
80007f4: 4b0e ldr r3, [pc, #56] ; (8000830 <MX_I2S2_Init+0x54>)
80007f6: 2200 movs r2, #0
80007f8: 60da str r2, [r3, #12]
hi2s2.Init.MCLKOutput = I2S_MCLKOUTPUT_DISABLE;
80007fa: 4b0d ldr r3, [pc, #52] ; (8000830 <MX_I2S2_Init+0x54>)
80007fc: 2200 movs r2, #0
80007fe: 611a str r2, [r3, #16]
hi2s2.Init.AudioFreq = I2S_AUDIOFREQ_8K;
8000800: 4b0b ldr r3, [pc, #44] ; (8000830 <MX_I2S2_Init+0x54>)
8000802: f44f 52fa mov.w r2, #8000 ; 0x1f40
8000806: 615a str r2, [r3, #20]
hi2s2.Init.CPOL = I2S_CPOL_LOW;
8000808: 4b09 ldr r3, [pc, #36] ; (8000830 <MX_I2S2_Init+0x54>)
800080a: 2200 movs r2, #0
800080c: 619a str r2, [r3, #24]
hi2s2.Init.ClockSource = I2S_CLOCK_PLL;
800080e: 4b08 ldr r3, [pc, #32] ; (8000830 <MX_I2S2_Init+0x54>)
8000810: 2200 movs r2, #0
8000812: 61da str r2, [r3, #28]
hi2s2.Init.FullDuplexMode = I2S_FULLDUPLEXMODE_DISABLE;
8000814: 4b06 ldr r3, [pc, #24] ; (8000830 <MX_I2S2_Init+0x54>)
8000816: 2200 movs r2, #0
8000818: 621a str r2, [r3, #32]
if (HAL_I2S_Init(&hi2s2) != HAL_OK)
800081a: 4805 ldr r0, [pc, #20] ; (8000830 <MX_I2S2_Init+0x54>)
800081c: f003 fc8e bl 800413c <HAL_I2S_Init>
8000820: 4603 mov r3, r0
8000822: 2b00 cmp r3, #0
8000824: d001 beq.n 800082a <MX_I2S2_Init+0x4e>
{
Error_Handler();
8000826: f000 f971 bl 8000b0c <Error_Handler>
}
/* USER CODE BEGIN I2S2_Init 2 */
/* USER CODE END I2S2_Init 2 */
}
800082a: bf00 nop
800082c: bd80 pop {r7, pc}
800082e: bf00 nop
8000830: 200001cc .word 0x200001cc
8000834: 40003800 .word 0x40003800
08000838 <MX_I2S3_Init>:
* @brief I2S3 Initialization Function
* @param None
* @retval None
*/
static void MX_I2S3_Init(void)
{
8000838: b580 push {r7, lr}
800083a: af00 add r7, sp, #0
/* USER CODE END I2S3_Init 0 */
/* USER CODE BEGIN I2S3_Init 1 */
/* USER CODE END I2S3_Init 1 */
hi2s3.Instance = SPI3;
800083c: 4b13 ldr r3, [pc, #76] ; (800088c <MX_I2S3_Init+0x54>)
800083e: 4a14 ldr r2, [pc, #80] ; (8000890 <MX_I2S3_Init+0x58>)
8000840: 601a str r2, [r3, #0]
hi2s3.Init.Mode = I2S_MODE_MASTER_TX;
8000842: 4b12 ldr r3, [pc, #72] ; (800088c <MX_I2S3_Init+0x54>)
8000844: f44f 7200 mov.w r2, #512 ; 0x200
8000848: 605a str r2, [r3, #4]
hi2s3.Init.Standard = I2S_STANDARD_PHILIPS;
800084a: 4b10 ldr r3, [pc, #64] ; (800088c <MX_I2S3_Init+0x54>)
800084c: 2200 movs r2, #0
800084e: 609a str r2, [r3, #8]
hi2s3.Init.DataFormat = I2S_DATAFORMAT_16B;
8000850: 4b0e ldr r3, [pc, #56] ; (800088c <MX_I2S3_Init+0x54>)
8000852: 2200 movs r2, #0
8000854: 60da str r2, [r3, #12]
hi2s3.Init.MCLKOutput = I2S_MCLKOUTPUT_ENABLE;
8000856: 4b0d ldr r3, [pc, #52] ; (800088c <MX_I2S3_Init+0x54>)
8000858: f44f 7200 mov.w r2, #512 ; 0x200
800085c: 611a str r2, [r3, #16]
hi2s3.Init.AudioFreq = I2S_AUDIOFREQ_96K;
800085e: 4b0b ldr r3, [pc, #44] ; (800088c <MX_I2S3_Init+0x54>)
8000860: 4a0c ldr r2, [pc, #48] ; (8000894 <MX_I2S3_Init+0x5c>)
8000862: 615a str r2, [r3, #20]
hi2s3.Init.CPOL = I2S_CPOL_LOW;
8000864: 4b09 ldr r3, [pc, #36] ; (800088c <MX_I2S3_Init+0x54>)
8000866: 2200 movs r2, #0
8000868: 619a str r2, [r3, #24]
hi2s3.Init.ClockSource = I2S_CLOCK_PLL;
800086a: 4b08 ldr r3, [pc, #32] ; (800088c <MX_I2S3_Init+0x54>)
800086c: 2200 movs r2, #0
800086e: 61da str r2, [r3, #28]
hi2s3.Init.FullDuplexMode = I2S_FULLDUPLEXMODE_DISABLE;
8000870: 4b06 ldr r3, [pc, #24] ; (800088c <MX_I2S3_Init+0x54>)
8000872: 2200 movs r2, #0
8000874: 621a str r2, [r3, #32]
if (HAL_I2S_Init(&hi2s3) != HAL_OK)
8000876: 4805 ldr r0, [pc, #20] ; (800088c <MX_I2S3_Init+0x54>)
8000878: f003 fc60 bl 800413c <HAL_I2S_Init>
800087c: 4603 mov r3, r0
800087e: 2b00 cmp r3, #0
8000880: d001 beq.n 8000886 <MX_I2S3_Init+0x4e>
{
Error_Handler();
8000882: f000 f943 bl 8000b0c <Error_Handler>
}
/* USER CODE BEGIN I2S3_Init 2 */
/* USER CODE END I2S3_Init 2 */
}
8000886: bf00 nop
8000888: bd80 pop {r7, pc}
800088a: bf00 nop
800088c: 20000214 .word 0x20000214
8000890: 40003c00 .word 0x40003c00
8000894: 00017700 .word 0x00017700
08000898 <MX_SPI1_Init>:
* @brief SPI1 Initialization Function
* @param None
* @retval None
*/
static void MX_SPI1_Init(void)
{
8000898: b580 push {r7, lr}
800089a: af00 add r7, sp, #0
/* USER CODE BEGIN SPI1_Init 1 */
/* USER CODE END SPI1_Init 1 */
/* SPI1 parameter configuration*/
hspi1.Instance = SPI1;
800089c: 4b17 ldr r3, [pc, #92] ; (80008fc <MX_SPI1_Init+0x64>)
800089e: 4a18 ldr r2, [pc, #96] ; (8000900 <MX_SPI1_Init+0x68>)
80008a0: 601a str r2, [r3, #0]
hspi1.Init.Mode = SPI_MODE_MASTER;
80008a2: 4b16 ldr r3, [pc, #88] ; (80008fc <MX_SPI1_Init+0x64>)
80008a4: f44f 7282 mov.w r2, #260 ; 0x104
80008a8: 605a str r2, [r3, #4]
hspi1.Init.Direction = SPI_DIRECTION_2LINES;
80008aa: 4b14 ldr r3, [pc, #80] ; (80008fc <MX_SPI1_Init+0x64>)
80008ac: 2200 movs r2, #0
80008ae: 609a str r2, [r3, #8]
hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
80008b0: 4b12 ldr r3, [pc, #72] ; (80008fc <MX_SPI1_Init+0x64>)
80008b2: 2200 movs r2, #0
80008b4: 60da str r2, [r3, #12]
hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
80008b6: 4b11 ldr r3, [pc, #68] ; (80008fc <MX_SPI1_Init+0x64>)
80008b8: 2200 movs r2, #0
80008ba: 611a str r2, [r3, #16]
hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
80008bc: 4b0f ldr r3, [pc, #60] ; (80008fc <MX_SPI1_Init+0x64>)
80008be: 2200 movs r2, #0
80008c0: 615a str r2, [r3, #20]
hspi1.Init.NSS = SPI_NSS_SOFT;
80008c2: 4b0e ldr r3, [pc, #56] ; (80008fc <MX_SPI1_Init+0x64>)
80008c4: f44f 7200 mov.w r2, #512 ; 0x200
80008c8: 619a str r2, [r3, #24]
hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
80008ca: 4b0c ldr r3, [pc, #48] ; (80008fc <MX_SPI1_Init+0x64>)
80008cc: 2200 movs r2, #0
80008ce: 61da str r2, [r3, #28]
hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
80008d0: 4b0a ldr r3, [pc, #40] ; (80008fc <MX_SPI1_Init+0x64>)
80008d2: 2200 movs r2, #0
80008d4: 621a str r2, [r3, #32]
hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
80008d6: 4b09 ldr r3, [pc, #36] ; (80008fc <MX_SPI1_Init+0x64>)
80008d8: 2200 movs r2, #0
80008da: 625a str r2, [r3, #36] ; 0x24
hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
80008dc: 4b07 ldr r3, [pc, #28] ; (80008fc <MX_SPI1_Init+0x64>)
80008de: 2200 movs r2, #0
80008e0: 629a str r2, [r3, #40] ; 0x28
hspi1.Init.CRCPolynomial = 10;
80008e2: 4b06 ldr r3, [pc, #24] ; (80008fc <MX_SPI1_Init+0x64>)
80008e4: 220a movs r2, #10
80008e6: 62da str r2, [r3, #44] ; 0x2c
if (HAL_SPI_Init(&hspi1) != HAL_OK)
80008e8: 4804 ldr r0, [pc, #16] ; (80008fc <MX_SPI1_Init+0x64>)
80008ea: f004 fe73 bl 80055d4 <HAL_SPI_Init>
80008ee: 4603 mov r3, r0
80008f0: 2b00 cmp r3, #0
80008f2: d001 beq.n 80008f8 <MX_SPI1_Init+0x60>
{
Error_Handler();
80008f4: f000 f90a bl 8000b0c <Error_Handler>
}
/* USER CODE BEGIN SPI1_Init 2 */
/* USER CODE END SPI1_Init 2 */
}
80008f8: bf00 nop
80008fa: bd80 pop {r7, pc}
80008fc: 20000134 .word 0x20000134
8000900: 40013000 .word 0x40013000
08000904 <MX_USART2_UART_Init>:
* @brief USART2 Initialization Function
* @param None
* @retval None
*/
static void MX_USART2_UART_Init(void)
{
8000904: b580 push {r7, lr}
8000906: af00 add r7, sp, #0
/* USER CODE END USART2_Init 0 */
/* USER CODE BEGIN USART2_Init 1 */
/* USER CODE END USART2_Init 1 */
huart2.Instance = USART2;
8000908: 4b11 ldr r3, [pc, #68] ; (8000950 <MX_USART2_UART_Init+0x4c>)
800090a: 4a12 ldr r2, [pc, #72] ; (8000954 <MX_USART2_UART_Init+0x50>)
800090c: 601a str r2, [r3, #0]
huart2.Init.BaudRate = 115200;
800090e: 4b10 ldr r3, [pc, #64] ; (8000950 <MX_USART2_UART_Init+0x4c>)
8000910: f44f 32e1 mov.w r2, #115200 ; 0x1c200
8000914: 605a str r2, [r3, #4]
huart2.Init.WordLength = UART_WORDLENGTH_8B;
8000916: 4b0e ldr r3, [pc, #56] ; (8000950 <MX_USART2_UART_Init+0x4c>)
8000918: 2200 movs r2, #0
800091a: 609a str r2, [r3, #8]
huart2.Init.StopBits = UART_STOPBITS_1;
800091c: 4b0c ldr r3, [pc, #48] ; (8000950 <MX_USART2_UART_Init+0x4c>)
800091e: 2200 movs r2, #0
8000920: 60da str r2, [r3, #12]
huart2.Init.Parity = UART_PARITY_NONE;
8000922: 4b0b ldr r3, [pc, #44] ; (8000950 <MX_USART2_UART_Init+0x4c>)
8000924: 2200 movs r2, #0
8000926: 611a str r2, [r3, #16]
huart2.Init.Mode = UART_MODE_TX_RX;
8000928: 4b09 ldr r3, [pc, #36] ; (8000950 <MX_USART2_UART_Init+0x4c>)
800092a: 220c movs r2, #12
800092c: 615a str r2, [r3, #20]
huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
800092e: 4b08 ldr r3, [pc, #32] ; (8000950 <MX_USART2_UART_Init+0x4c>)
8000930: 2200 movs r2, #0
8000932: 619a str r2, [r3, #24]
huart2.Init.OverSampling = UART_OVERSAMPLING_16;
8000934: 4b06 ldr r3, [pc, #24] ; (8000950 <MX_USART2_UART_Init+0x4c>)
8000936: 2200 movs r2, #0
8000938: 61da str r2, [r3, #28]
if (HAL_UART_Init(&huart2) != HAL_OK)
800093a: 4805 ldr r0, [pc, #20] ; (8000950 <MX_USART2_UART_Init+0x4c>)
800093c: f004 feae bl 800569c <HAL_UART_Init>
8000940: 4603 mov r3, r0
8000942: 2b00 cmp r3, #0
8000944: d001 beq.n 800094a <MX_USART2_UART_Init+0x46>
{
Error_Handler();
8000946: f000 f8e1 bl 8000b0c <Error_Handler>
}
/* USER CODE BEGIN USART2_Init 2 */
/* USER CODE END USART2_Init 2 */
}
800094a: bf00 nop
800094c: bd80 pop {r7, pc}
800094e: bf00 nop
8000950: 2000018c .word 0x2000018c
8000954: 40004400 .word 0x40004400
08000958 <MX_GPIO_Init>:
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void)
{
8000958: b580 push {r7, lr}
800095a: b08c sub sp, #48 ; 0x30
800095c: af00 add r7, sp, #0
GPIO_InitTypeDef GPIO_InitStruct = {0};
800095e: f107 031c add.w r3, r7, #28
8000962: 2200 movs r2, #0
8000964: 601a str r2, [r3, #0]
8000966: 605a str r2, [r3, #4]
8000968: 609a str r2, [r3, #8]
800096a: 60da str r2, [r3, #12]
800096c: 611a str r2, [r3, #16]
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOE_CLK_ENABLE();
800096e: 2300 movs r3, #0
8000970: 61bb str r3, [r7, #24]
8000972: 4b60 ldr r3, [pc, #384] ; (8000af4 <MX_GPIO_Init+0x19c>)
8000974: 6b1b ldr r3, [r3, #48] ; 0x30
8000976: 4a5f ldr r2, [pc, #380] ; (8000af4 <MX_GPIO_Init+0x19c>)
8000978: f043 0310 orr.w r3, r3, #16
800097c: 6313 str r3, [r2, #48] ; 0x30
800097e: 4b5d ldr r3, [pc, #372] ; (8000af4 <MX_GPIO_Init+0x19c>)
8000980: 6b1b ldr r3, [r3, #48] ; 0x30
8000982: f003 0310 and.w r3, r3, #16
8000986: 61bb str r3, [r7, #24]
8000988: 69bb ldr r3, [r7, #24]
__HAL_RCC_GPIOC_CLK_ENABLE();
800098a: 2300 movs r3, #0
800098c: 617b str r3, [r7, #20]
800098e: 4b59 ldr r3, [pc, #356] ; (8000af4 <MX_GPIO_Init+0x19c>)
8000990: 6b1b ldr r3, [r3, #48] ; 0x30
8000992: 4a58 ldr r2, [pc, #352] ; (8000af4 <MX_GPIO_Init+0x19c>)
8000994: f043 0304 orr.w r3, r3, #4
8000998: 6313 str r3, [r2, #48] ; 0x30
800099a: 4b56 ldr r3, [pc, #344] ; (8000af4 <MX_GPIO_Init+0x19c>)
800099c: 6b1b ldr r3, [r3, #48] ; 0x30
800099e: f003 0304 and.w r3, r3, #4
80009a2: 617b str r3, [r7, #20]
80009a4: 697b ldr r3, [r7, #20]
__HAL_RCC_GPIOH_CLK_ENABLE();
80009a6: 2300 movs r3, #0
80009a8: 613b str r3, [r7, #16]
80009aa: 4b52 ldr r3, [pc, #328] ; (8000af4 <MX_GPIO_Init+0x19c>)
80009ac: 6b1b ldr r3, [r3, #48] ; 0x30
80009ae: 4a51 ldr r2, [pc, #324] ; (8000af4 <MX_GPIO_Init+0x19c>)
80009b0: f043 0380 orr.w r3, r3, #128 ; 0x80
80009b4: 6313 str r3, [r2, #48] ; 0x30
80009b6: 4b4f ldr r3, [pc, #316] ; (8000af4 <MX_GPIO_Init+0x19c>)
80009b8: 6b1b ldr r3, [r3, #48] ; 0x30
80009ba: f003 0380 and.w r3, r3, #128 ; 0x80
80009be: 613b str r3, [r7, #16]
80009c0: 693b ldr r3, [r7, #16]
__HAL_RCC_GPIOA_CLK_ENABLE();
80009c2: 2300 movs r3, #0
80009c4: 60fb str r3, [r7, #12]
80009c6: 4b4b ldr r3, [pc, #300] ; (8000af4 <MX_GPIO_Init+0x19c>)
80009c8: 6b1b ldr r3, [r3, #48] ; 0x30
80009ca: 4a4a ldr r2, [pc, #296] ; (8000af4 <MX_GPIO_Init+0x19c>)
80009cc: f043 0301 orr.w r3, r3, #1
80009d0: 6313 str r3, [r2, #48] ; 0x30
80009d2: 4b48 ldr r3, [pc, #288] ; (8000af4 <MX_GPIO_Init+0x19c>)
80009d4: 6b1b ldr r3, [r3, #48] ; 0x30
80009d6: f003 0301 and.w r3, r3, #1
80009da: 60fb str r3, [r7, #12]
80009dc: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOB_CLK_ENABLE();
80009de: 2300 movs r3, #0
80009e0: 60bb str r3, [r7, #8]
80009e2: 4b44 ldr r3, [pc, #272] ; (8000af4 <MX_GPIO_Init+0x19c>)
80009e4: 6b1b ldr r3, [r3, #48] ; 0x30
80009e6: 4a43 ldr r2, [pc, #268] ; (8000af4 <MX_GPIO_Init+0x19c>)
80009e8: f043 0302 orr.w r3, r3, #2
80009ec: 6313 str r3, [r2, #48] ; 0x30
80009ee: 4b41 ldr r3, [pc, #260] ; (8000af4 <MX_GPIO_Init+0x19c>)
80009f0: 6b1b ldr r3, [r3, #48] ; 0x30
80009f2: f003 0302 and.w r3, r3, #2
80009f6: 60bb str r3, [r7, #8]
80009f8: 68bb ldr r3, [r7, #8]
__HAL_RCC_GPIOD_CLK_ENABLE();
80009fa: 2300 movs r3, #0
80009fc: 607b str r3, [r7, #4]
80009fe: 4b3d ldr r3, [pc, #244] ; (8000af4 <MX_GPIO_Init+0x19c>)
8000a00: 6b1b ldr r3, [r3, #48] ; 0x30
8000a02: 4a3c ldr r2, [pc, #240] ; (8000af4 <MX_GPIO_Init+0x19c>)
8000a04: f043 0308 orr.w r3, r3, #8
8000a08: 6313 str r3, [r2, #48] ; 0x30
8000a0a: 4b3a ldr r3, [pc, #232] ; (8000af4 <MX_GPIO_Init+0x19c>)
8000a0c: 6b1b ldr r3, [r3, #48] ; 0x30
8000a0e: f003 0308 and.w r3, r3, #8
8000a12: 607b str r3, [r7, #4]
8000a14: 687b ldr r3, [r7, #4]
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(CS_I2C_SPI_GPIO_Port, CS_I2C_SPI_Pin, GPIO_PIN_RESET);
8000a16: 2200 movs r2, #0
8000a18: 2108 movs r1, #8
8000a1a: 4837 ldr r0, [pc, #220] ; (8000af8 <MX_GPIO_Init+0x1a0>)
8000a1c: f000 fede bl 80017dc <HAL_GPIO_WritePin>
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(OTG_FS_PowerSwitchOn_GPIO_Port, OTG_FS_PowerSwitchOn_Pin, GPIO_PIN_SET);
8000a20: 2201 movs r2, #1
8000a22: 2101 movs r1, #1
8000a24: 4835 ldr r0, [pc, #212] ; (8000afc <MX_GPIO_Init+0x1a4>)
8000a26: f000 fed9 bl 80017dc <HAL_GPIO_WritePin>
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOD, LD4_Pin|LD3_Pin|LD5_Pin|LD6_Pin
8000a2a: 2200 movs r2, #0
8000a2c: f24f 0110 movw r1, #61456 ; 0xf010
8000a30: 4833 ldr r0, [pc, #204] ; (8000b00 <MX_GPIO_Init+0x1a8>)
8000a32: f000 fed3 bl 80017dc <HAL_GPIO_WritePin>
|Audio_RST_Pin, GPIO_PIN_RESET);
/*Configure GPIO pin : PE2 */
GPIO_InitStruct.Pin = GPIO_PIN_2;
8000a36: 2304 movs r3, #4
8000a38: 61fb str r3, [r7, #28]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8000a3a: 2300 movs r3, #0
8000a3c: 623b str r3, [r7, #32]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000a3e: 2300 movs r3, #0
8000a40: 627b str r3, [r7, #36] ; 0x24
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
8000a42: f107 031c add.w r3, r7, #28
8000a46: 4619 mov r1, r3
8000a48: 482b ldr r0, [pc, #172] ; (8000af8 <MX_GPIO_Init+0x1a0>)
8000a4a: f000 fd45 bl 80014d8 <HAL_GPIO_Init>
/*Configure GPIO pin : CS_I2C_SPI_Pin */
GPIO_InitStruct.Pin = CS_I2C_SPI_Pin;
8000a4e: 2308 movs r3, #8
8000a50: 61fb str r3, [r7, #28]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8000a52: 2301 movs r3, #1
8000a54: 623b str r3, [r7, #32]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000a56: 2300 movs r3, #0
8000a58: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000a5a: 2300 movs r3, #0
8000a5c: 62bb str r3, [r7, #40] ; 0x28
HAL_GPIO_Init(CS_I2C_SPI_GPIO_Port, &GPIO_InitStruct);
8000a5e: f107 031c add.w r3, r7, #28
8000a62: 4619 mov r1, r3
8000a64: 4824 ldr r0, [pc, #144] ; (8000af8 <MX_GPIO_Init+0x1a0>)
8000a66: f000 fd37 bl 80014d8 <HAL_GPIO_Init>
/*Configure GPIO pins : PE4 PE5 MEMS_INT2_Pin */
GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5|MEMS_INT2_Pin;
8000a6a: 2332 movs r3, #50 ; 0x32
8000a6c: 61fb str r3, [r7, #28]
GPIO_InitStruct.Mode = GPIO_MODE_EVT_RISING;
8000a6e: 4b25 ldr r3, [pc, #148] ; (8000b04 <MX_GPIO_Init+0x1ac>)
8000a70: 623b str r3, [r7, #32]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000a72: 2300 movs r3, #0
8000a74: 627b str r3, [r7, #36] ; 0x24
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
8000a76: f107 031c add.w r3, r7, #28
8000a7a: 4619 mov r1, r3
8000a7c: 481e ldr r0, [pc, #120] ; (8000af8 <MX_GPIO_Init+0x1a0>)
8000a7e: f000 fd2b bl 80014d8 <HAL_GPIO_Init>
/*Configure GPIO pin : OTG_FS_PowerSwitchOn_Pin */
GPIO_InitStruct.Pin = OTG_FS_PowerSwitchOn_Pin;
8000a82: 2301 movs r3, #1
8000a84: 61fb str r3, [r7, #28]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8000a86: 2301 movs r3, #1
8000a88: 623b str r3, [r7, #32]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000a8a: 2300 movs r3, #0
8000a8c: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000a8e: 2300 movs r3, #0
8000a90: 62bb str r3, [r7, #40] ; 0x28
HAL_GPIO_Init(OTG_FS_PowerSwitchOn_GPIO_Port, &GPIO_InitStruct);
8000a92: f107 031c add.w r3, r7, #28
8000a96: 4619 mov r1, r3
8000a98: 4818 ldr r0, [pc, #96] ; (8000afc <MX_GPIO_Init+0x1a4>)
8000a9a: f000 fd1d bl 80014d8 <HAL_GPIO_Init>
/*Configure GPIO pin : B1_Pin */
GPIO_InitStruct.Pin = B1_Pin;
8000a9e: 2301 movs r3, #1
8000aa0: 61fb str r3, [r7, #28]
GPIO_InitStruct.Mode = GPIO_MODE_EVT_RISING;
8000aa2: 4b18 ldr r3, [pc, #96] ; (8000b04 <MX_GPIO_Init+0x1ac>)
8000aa4: 623b str r3, [r7, #32]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000aa6: 2300 movs r3, #0
8000aa8: 627b str r3, [r7, #36] ; 0x24
HAL_GPIO_Init(B1_GPIO_Port, &GPIO_InitStruct);
8000aaa: f107 031c add.w r3, r7, #28
8000aae: 4619 mov r1, r3
8000ab0: 4815 ldr r0, [pc, #84] ; (8000b08 <MX_GPIO_Init+0x1b0>)
8000ab2: f000 fd11 bl 80014d8 <HAL_GPIO_Init>
/*Configure GPIO pins : LD4_Pin LD3_Pin LD5_Pin LD6_Pin
Audio_RST_Pin */
GPIO_InitStruct.Pin = LD4_Pin|LD3_Pin|LD5_Pin|LD6_Pin
8000ab6: f24f 0310 movw r3, #61456 ; 0xf010
8000aba: 61fb str r3, [r7, #28]
|Audio_RST_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8000abc: 2301 movs r3, #1
8000abe: 623b str r3, [r7, #32]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000ac0: 2300 movs r3, #0
8000ac2: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000ac4: 2300 movs r3, #0
8000ac6: 62bb str r3, [r7, #40] ; 0x28
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
8000ac8: f107 031c add.w r3, r7, #28
8000acc: 4619 mov r1, r3
8000ace: 480c ldr r0, [pc, #48] ; (8000b00 <MX_GPIO_Init+0x1a8>)
8000ad0: f000 fd02 bl 80014d8 <HAL_GPIO_Init>
/*Configure GPIO pin : OTG_FS_OverCurrent_Pin */
GPIO_InitStruct.Pin = OTG_FS_OverCurrent_Pin;
8000ad4: 2320 movs r3, #32
8000ad6: 61fb str r3, [r7, #28]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8000ad8: 2300 movs r3, #0
8000ada: 623b str r3, [r7, #32]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000adc: 2300 movs r3, #0
8000ade: 627b str r3, [r7, #36] ; 0x24
HAL_GPIO_Init(OTG_FS_OverCurrent_GPIO_Port, &GPIO_InitStruct);
8000ae0: f107 031c add.w r3, r7, #28
8000ae4: 4619 mov r1, r3
8000ae6: 4806 ldr r0, [pc, #24] ; (8000b00 <MX_GPIO_Init+0x1a8>)
8000ae8: f000 fcf6 bl 80014d8 <HAL_GPIO_Init>
}
8000aec: bf00 nop
8000aee: 3730 adds r7, #48 ; 0x30
8000af0: 46bd mov sp, r7
8000af2: bd80 pop {r7, pc}
8000af4: 40023800 .word 0x40023800
8000af8: 40021000 .word 0x40021000
8000afc: 40020800 .word 0x40020800
8000b00: 40020c00 .word 0x40020c00
8000b04: 10120000 .word 0x10120000
8000b08: 40020000 .word 0x40020000
08000b0c <Error_Handler>:
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
8000b0c: b480 push {r7}
8000b0e: af00 add r7, sp, #0
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
__STATIC_FORCEINLINE void __disable_irq(void)
{
__ASM volatile ("cpsid i" : : : "memory");
8000b10: b672 cpsid i
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1)
8000b12: e7fe b.n 8000b12 <Error_Handler+0x6>
08000b14 <HAL_MspInit>:
/* USER CODE END 0 */
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
8000b14: b580 push {r7, lr}
8000b16: b082 sub sp, #8
8000b18: af00 add r7, sp, #0
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_SYSCFG_CLK_ENABLE();
8000b1a: 2300 movs r3, #0
8000b1c: 607b str r3, [r7, #4]
8000b1e: 4b10 ldr r3, [pc, #64] ; (8000b60 <HAL_MspInit+0x4c>)
8000b20: 6c5b ldr r3, [r3, #68] ; 0x44
8000b22: 4a0f ldr r2, [pc, #60] ; (8000b60 <HAL_MspInit+0x4c>)
8000b24: f443 4380 orr.w r3, r3, #16384 ; 0x4000
8000b28: 6453 str r3, [r2, #68] ; 0x44
8000b2a: 4b0d ldr r3, [pc, #52] ; (8000b60 <HAL_MspInit+0x4c>)
8000b2c: 6c5b ldr r3, [r3, #68] ; 0x44
8000b2e: f403 4380 and.w r3, r3, #16384 ; 0x4000
8000b32: 607b str r3, [r7, #4]
8000b34: 687b ldr r3, [r7, #4]
__HAL_RCC_PWR_CLK_ENABLE();
8000b36: 2300 movs r3, #0
8000b38: 603b str r3, [r7, #0]
8000b3a: 4b09 ldr r3, [pc, #36] ; (8000b60 <HAL_MspInit+0x4c>)
8000b3c: 6c1b ldr r3, [r3, #64] ; 0x40
8000b3e: 4a08 ldr r2, [pc, #32] ; (8000b60 <HAL_MspInit+0x4c>)
8000b40: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
8000b44: 6413 str r3, [r2, #64] ; 0x40
8000b46: 4b06 ldr r3, [pc, #24] ; (8000b60 <HAL_MspInit+0x4c>)
8000b48: 6c1b ldr r3, [r3, #64] ; 0x40
8000b4a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
8000b4e: 603b str r3, [r7, #0]
8000b50: 683b ldr r3, [r7, #0]
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_0);
8000b52: 2007 movs r0, #7
8000b54: f000 fc7e bl 8001454 <HAL_NVIC_SetPriorityGrouping>
/* System interrupt init*/
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
8000b58: bf00 nop
8000b5a: 3708 adds r7, #8
8000b5c: 46bd mov sp, r7
8000b5e: bd80 pop {r7, pc}
8000b60: 40023800 .word 0x40023800
08000b64 <HAL_I2C_MspInit>:
* This function configures the hardware resources used in this example
* @param hi2c: I2C handle pointer
* @retval None
*/
void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c)
{
8000b64: b580 push {r7, lr}
8000b66: b08a sub sp, #40 ; 0x28
8000b68: af00 add r7, sp, #0
8000b6a: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8000b6c: f107 0314 add.w r3, r7, #20
8000b70: 2200 movs r2, #0
8000b72: 601a str r2, [r3, #0]
8000b74: 605a str r2, [r3, #4]
8000b76: 609a str r2, [r3, #8]
8000b78: 60da str r2, [r3, #12]
8000b7a: 611a str r2, [r3, #16]
if(hi2c->Instance==I2C1)
8000b7c: 687b ldr r3, [r7, #4]
8000b7e: 681b ldr r3, [r3, #0]
8000b80: 4a19 ldr r2, [pc, #100] ; (8000be8 <HAL_I2C_MspInit+0x84>)
8000b82: 4293 cmp r3, r2
8000b84: d12c bne.n 8000be0 <HAL_I2C_MspInit+0x7c>
{
/* USER CODE BEGIN I2C1_MspInit 0 */
/* USER CODE END I2C1_MspInit 0 */
__HAL_RCC_GPIOB_CLK_ENABLE();
8000b86: 2300 movs r3, #0
8000b88: 613b str r3, [r7, #16]
8000b8a: 4b18 ldr r3, [pc, #96] ; (8000bec <HAL_I2C_MspInit+0x88>)
8000b8c: 6b1b ldr r3, [r3, #48] ; 0x30
8000b8e: 4a17 ldr r2, [pc, #92] ; (8000bec <HAL_I2C_MspInit+0x88>)
8000b90: f043 0302 orr.w r3, r3, #2
8000b94: 6313 str r3, [r2, #48] ; 0x30
8000b96: 4b15 ldr r3, [pc, #84] ; (8000bec <HAL_I2C_MspInit+0x88>)
8000b98: 6b1b ldr r3, [r3, #48] ; 0x30
8000b9a: f003 0302 and.w r3, r3, #2
8000b9e: 613b str r3, [r7, #16]
8000ba0: 693b ldr r3, [r7, #16]
/**I2C1 GPIO Configuration
PB6 ------> I2C1_SCL
PB9 ------> I2C1_SDA
*/
GPIO_InitStruct.Pin = Audio_SCL_Pin|Audio_SDA_Pin;
8000ba2: f44f 7310 mov.w r3, #576 ; 0x240
8000ba6: 617b str r3, [r7, #20]
GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
8000ba8: 2312 movs r3, #18
8000baa: 61bb str r3, [r7, #24]
GPIO_InitStruct.Pull = GPIO_PULLUP;
8000bac: 2301 movs r3, #1
8000bae: 61fb str r3, [r7, #28]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000bb0: 2300 movs r3, #0
8000bb2: 623b str r3, [r7, #32]
GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;
8000bb4: 2304 movs r3, #4
8000bb6: 627b str r3, [r7, #36] ; 0x24
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8000bb8: f107 0314 add.w r3, r7, #20
8000bbc: 4619 mov r1, r3
8000bbe: 480c ldr r0, [pc, #48] ; (8000bf0 <HAL_I2C_MspInit+0x8c>)
8000bc0: f000 fc8a bl 80014d8 <HAL_GPIO_Init>
/* Peripheral clock enable */
__HAL_RCC_I2C1_CLK_ENABLE();
8000bc4: 2300 movs r3, #0
8000bc6: 60fb str r3, [r7, #12]
8000bc8: 4b08 ldr r3, [pc, #32] ; (8000bec <HAL_I2C_MspInit+0x88>)
8000bca: 6c1b ldr r3, [r3, #64] ; 0x40
8000bcc: 4a07 ldr r2, [pc, #28] ; (8000bec <HAL_I2C_MspInit+0x88>)
8000bce: f443 1300 orr.w r3, r3, #2097152 ; 0x200000
8000bd2: 6413 str r3, [r2, #64] ; 0x40
8000bd4: 4b05 ldr r3, [pc, #20] ; (8000bec <HAL_I2C_MspInit+0x88>)
8000bd6: 6c1b ldr r3, [r3, #64] ; 0x40
8000bd8: f403 1300 and.w r3, r3, #2097152 ; 0x200000
8000bdc: 60fb str r3, [r7, #12]
8000bde: 68fb ldr r3, [r7, #12]
/* USER CODE BEGIN I2C1_MspInit 1 */
/* USER CODE END I2C1_MspInit 1 */
}
}
8000be0: bf00 nop
8000be2: 3728 adds r7, #40 ; 0x28
8000be4: 46bd mov sp, r7
8000be6: bd80 pop {r7, pc}
8000be8: 40005400 .word 0x40005400
8000bec: 40023800 .word 0x40023800
8000bf0: 40020400 .word 0x40020400
08000bf4 <HAL_I2S_MspInit>:
* This function configures the hardware resources used in this example
* @param hi2s: I2S handle pointer
* @retval None
*/
void HAL_I2S_MspInit(I2S_HandleTypeDef* hi2s)
{
8000bf4: b580 push {r7, lr}
8000bf6: b08e sub sp, #56 ; 0x38
8000bf8: af00 add r7, sp, #0
8000bfa: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8000bfc: f107 0324 add.w r3, r7, #36 ; 0x24
8000c00: 2200 movs r2, #0
8000c02: 601a str r2, [r3, #0]
8000c04: 605a str r2, [r3, #4]
8000c06: 609a str r2, [r3, #8]
8000c08: 60da str r2, [r3, #12]
8000c0a: 611a str r2, [r3, #16]
if(hi2s->Instance==SPI2)
8000c0c: 687b ldr r3, [r7, #4]
8000c0e: 681b ldr r3, [r3, #0]
8000c10: 4a51 ldr r2, [pc, #324] ; (8000d58 <HAL_I2S_MspInit+0x164>)
8000c12: 4293 cmp r3, r2
8000c14: d14b bne.n 8000cae <HAL_I2S_MspInit+0xba>
{
/* USER CODE BEGIN SPI2_MspInit 0 */
/* USER CODE END SPI2_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_SPI2_CLK_ENABLE();
8000c16: 2300 movs r3, #0
8000c18: 623b str r3, [r7, #32]
8000c1a: 4b50 ldr r3, [pc, #320] ; (8000d5c <HAL_I2S_MspInit+0x168>)
8000c1c: 6c1b ldr r3, [r3, #64] ; 0x40
8000c1e: 4a4f ldr r2, [pc, #316] ; (8000d5c <HAL_I2S_MspInit+0x168>)
8000c20: f443 4380 orr.w r3, r3, #16384 ; 0x4000
8000c24: 6413 str r3, [r2, #64] ; 0x40
8000c26: 4b4d ldr r3, [pc, #308] ; (8000d5c <HAL_I2S_MspInit+0x168>)
8000c28: 6c1b ldr r3, [r3, #64] ; 0x40
8000c2a: f403 4380 and.w r3, r3, #16384 ; 0x4000
8000c2e: 623b str r3, [r7, #32]
8000c30: 6a3b ldr r3, [r7, #32]
__HAL_RCC_GPIOC_CLK_ENABLE();
8000c32: 2300 movs r3, #0
8000c34: 61fb str r3, [r7, #28]
8000c36: 4b49 ldr r3, [pc, #292] ; (8000d5c <HAL_I2S_MspInit+0x168>)
8000c38: 6b1b ldr r3, [r3, #48] ; 0x30
8000c3a: 4a48 ldr r2, [pc, #288] ; (8000d5c <HAL_I2S_MspInit+0x168>)
8000c3c: f043 0304 orr.w r3, r3, #4
8000c40: 6313 str r3, [r2, #48] ; 0x30
8000c42: 4b46 ldr r3, [pc, #280] ; (8000d5c <HAL_I2S_MspInit+0x168>)
8000c44: 6b1b ldr r3, [r3, #48] ; 0x30
8000c46: f003 0304 and.w r3, r3, #4
8000c4a: 61fb str r3, [r7, #28]
8000c4c: 69fb ldr r3, [r7, #28]
__HAL_RCC_GPIOB_CLK_ENABLE();
8000c4e: 2300 movs r3, #0
8000c50: 61bb str r3, [r7, #24]
8000c52: 4b42 ldr r3, [pc, #264] ; (8000d5c <HAL_I2S_MspInit+0x168>)
8000c54: 6b1b ldr r3, [r3, #48] ; 0x30
8000c56: 4a41 ldr r2, [pc, #260] ; (8000d5c <HAL_I2S_MspInit+0x168>)
8000c58: f043 0302 orr.w r3, r3, #2
8000c5c: 6313 str r3, [r2, #48] ; 0x30
8000c5e: 4b3f ldr r3, [pc, #252] ; (8000d5c <HAL_I2S_MspInit+0x168>)
8000c60: 6b1b ldr r3, [r3, #48] ; 0x30
8000c62: f003 0302 and.w r3, r3, #2
8000c66: 61bb str r3, [r7, #24]
8000c68: 69bb ldr r3, [r7, #24]
/**I2S2 GPIO Configuration
PC3 ------> I2S2_SD
PB10 ------> I2S2_CK
PB12 ------> I2S2_WS
*/
GPIO_InitStruct.Pin = PDM_OUT_Pin;
8000c6a: 2308 movs r3, #8
8000c6c: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000c6e: 2302 movs r3, #2
8000c70: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000c72: 2300 movs r3, #0
8000c74: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000c76: 2300 movs r3, #0
8000c78: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
8000c7a: 2305 movs r3, #5
8000c7c: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(PDM_OUT_GPIO_Port, &GPIO_InitStruct);
8000c7e: f107 0324 add.w r3, r7, #36 ; 0x24
8000c82: 4619 mov r1, r3
8000c84: 4836 ldr r0, [pc, #216] ; (8000d60 <HAL_I2S_MspInit+0x16c>)
8000c86: f000 fc27 bl 80014d8 <HAL_GPIO_Init>
GPIO_InitStruct.Pin = CLK_IN_Pin|GPIO_PIN_12;
8000c8a: f44f 53a0 mov.w r3, #5120 ; 0x1400
8000c8e: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000c90: 2302 movs r3, #2
8000c92: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000c94: 2300 movs r3, #0
8000c96: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000c98: 2300 movs r3, #0
8000c9a: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
8000c9c: 2305 movs r3, #5
8000c9e: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8000ca0: f107 0324 add.w r3, r7, #36 ; 0x24
8000ca4: 4619 mov r1, r3
8000ca6: 482f ldr r0, [pc, #188] ; (8000d64 <HAL_I2S_MspInit+0x170>)
8000ca8: f000 fc16 bl 80014d8 <HAL_GPIO_Init>
/* USER CODE BEGIN SPI3_MspInit 1 */
/* USER CODE END SPI3_MspInit 1 */
}
}
8000cac: e04f b.n 8000d4e <HAL_I2S_MspInit+0x15a>
else if(hi2s->Instance==SPI3)
8000cae: 687b ldr r3, [r7, #4]
8000cb0: 681b ldr r3, [r3, #0]
8000cb2: 4a2d ldr r2, [pc, #180] ; (8000d68 <HAL_I2S_MspInit+0x174>)
8000cb4: 4293 cmp r3, r2
8000cb6: d14a bne.n 8000d4e <HAL_I2S_MspInit+0x15a>
__HAL_RCC_SPI3_CLK_ENABLE();
8000cb8: 2300 movs r3, #0
8000cba: 617b str r3, [r7, #20]
8000cbc: 4b27 ldr r3, [pc, #156] ; (8000d5c <HAL_I2S_MspInit+0x168>)
8000cbe: 6c1b ldr r3, [r3, #64] ; 0x40
8000cc0: 4a26 ldr r2, [pc, #152] ; (8000d5c <HAL_I2S_MspInit+0x168>)
8000cc2: f443 4300 orr.w r3, r3, #32768 ; 0x8000
8000cc6: 6413 str r3, [r2, #64] ; 0x40
8000cc8: 4b24 ldr r3, [pc, #144] ; (8000d5c <HAL_I2S_MspInit+0x168>)
8000cca: 6c1b ldr r3, [r3, #64] ; 0x40
8000ccc: f403 4300 and.w r3, r3, #32768 ; 0x8000
8000cd0: 617b str r3, [r7, #20]
8000cd2: 697b ldr r3, [r7, #20]
__HAL_RCC_GPIOA_CLK_ENABLE();
8000cd4: 2300 movs r3, #0
8000cd6: 613b str r3, [r7, #16]
8000cd8: 4b20 ldr r3, [pc, #128] ; (8000d5c <HAL_I2S_MspInit+0x168>)
8000cda: 6b1b ldr r3, [r3, #48] ; 0x30
8000cdc: 4a1f ldr r2, [pc, #124] ; (8000d5c <HAL_I2S_MspInit+0x168>)
8000cde: f043 0301 orr.w r3, r3, #1
8000ce2: 6313 str r3, [r2, #48] ; 0x30
8000ce4: 4b1d ldr r3, [pc, #116] ; (8000d5c <HAL_I2S_MspInit+0x168>)
8000ce6: 6b1b ldr r3, [r3, #48] ; 0x30
8000ce8: f003 0301 and.w r3, r3, #1
8000cec: 613b str r3, [r7, #16]
8000cee: 693b ldr r3, [r7, #16]
__HAL_RCC_GPIOC_CLK_ENABLE();
8000cf0: 2300 movs r3, #0
8000cf2: 60fb str r3, [r7, #12]
8000cf4: 4b19 ldr r3, [pc, #100] ; (8000d5c <HAL_I2S_MspInit+0x168>)
8000cf6: 6b1b ldr r3, [r3, #48] ; 0x30
8000cf8: 4a18 ldr r2, [pc, #96] ; (8000d5c <HAL_I2S_MspInit+0x168>)
8000cfa: f043 0304 orr.w r3, r3, #4
8000cfe: 6313 str r3, [r2, #48] ; 0x30
8000d00: 4b16 ldr r3, [pc, #88] ; (8000d5c <HAL_I2S_MspInit+0x168>)
8000d02: 6b1b ldr r3, [r3, #48] ; 0x30
8000d04: f003 0304 and.w r3, r3, #4
8000d08: 60fb str r3, [r7, #12]
8000d0a: 68fb ldr r3, [r7, #12]
GPIO_InitStruct.Pin = I2S3_WS_Pin;
8000d0c: 2310 movs r3, #16
8000d0e: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000d10: 2302 movs r3, #2
8000d12: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000d14: 2300 movs r3, #0
8000d16: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000d18: 2300 movs r3, #0
8000d1a: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF6_SPI3;
8000d1c: 2306 movs r3, #6
8000d1e: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(I2S3_WS_GPIO_Port, &GPIO_InitStruct);
8000d20: f107 0324 add.w r3, r7, #36 ; 0x24
8000d24: 4619 mov r1, r3
8000d26: 4811 ldr r0, [pc, #68] ; (8000d6c <HAL_I2S_MspInit+0x178>)
8000d28: f000 fbd6 bl 80014d8 <HAL_GPIO_Init>
GPIO_InitStruct.Pin = I2S3_MCK_Pin|I2S3_SCK_Pin|I2S3_SD_Pin;
8000d2c: f44f 53a4 mov.w r3, #5248 ; 0x1480
8000d30: 627b str r3, [r7, #36] ; 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000d32: 2302 movs r3, #2
8000d34: 62bb str r3, [r7, #40] ; 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000d36: 2300 movs r3, #0
8000d38: 62fb str r3, [r7, #44] ; 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000d3a: 2300 movs r3, #0
8000d3c: 633b str r3, [r7, #48] ; 0x30
GPIO_InitStruct.Alternate = GPIO_AF6_SPI3;
8000d3e: 2306 movs r3, #6
8000d40: 637b str r3, [r7, #52] ; 0x34
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
8000d42: f107 0324 add.w r3, r7, #36 ; 0x24
8000d46: 4619 mov r1, r3
8000d48: 4805 ldr r0, [pc, #20] ; (8000d60 <HAL_I2S_MspInit+0x16c>)
8000d4a: f000 fbc5 bl 80014d8 <HAL_GPIO_Init>
}
8000d4e: bf00 nop
8000d50: 3738 adds r7, #56 ; 0x38
8000d52: 46bd mov sp, r7
8000d54: bd80 pop {r7, pc}
8000d56: bf00 nop
8000d58: 40003800 .word 0x40003800
8000d5c: 40023800 .word 0x40023800
8000d60: 40020800 .word 0x40020800
8000d64: 40020400 .word 0x40020400
8000d68: 40003c00 .word 0x40003c00
8000d6c: 40020000 .word 0x40020000
08000d70 <HAL_SPI_MspInit>:
* This function configures the hardware resources used in this example
* @param hspi: SPI handle pointer
* @retval None
*/
void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
{
8000d70: b580 push {r7, lr}
8000d72: b08a sub sp, #40 ; 0x28
8000d74: af00 add r7, sp, #0
8000d76: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8000d78: f107 0314 add.w r3, r7, #20
8000d7c: 2200 movs r2, #0
8000d7e: 601a str r2, [r3, #0]
8000d80: 605a str r2, [r3, #4]
8000d82: 609a str r2, [r3, #8]
8000d84: 60da str r2, [r3, #12]
8000d86: 611a str r2, [r3, #16]
if(hspi->Instance==SPI1)
8000d88: 687b ldr r3, [r7, #4]
8000d8a: 681b ldr r3, [r3, #0]
8000d8c: 4a19 ldr r2, [pc, #100] ; (8000df4 <HAL_SPI_MspInit+0x84>)
8000d8e: 4293 cmp r3, r2
8000d90: d12b bne.n 8000dea <HAL_SPI_MspInit+0x7a>
{
/* USER CODE BEGIN SPI1_MspInit 0 */
/* USER CODE END SPI1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_SPI1_CLK_ENABLE();
8000d92: 2300 movs r3, #0
8000d94: 613b str r3, [r7, #16]
8000d96: 4b18 ldr r3, [pc, #96] ; (8000df8 <HAL_SPI_MspInit+0x88>)
8000d98: 6c5b ldr r3, [r3, #68] ; 0x44
8000d9a: 4a17 ldr r2, [pc, #92] ; (8000df8 <HAL_SPI_MspInit+0x88>)
8000d9c: f443 5380 orr.w r3, r3, #4096 ; 0x1000
8000da0: 6453 str r3, [r2, #68] ; 0x44
8000da2: 4b15 ldr r3, [pc, #84] ; (8000df8 <HAL_SPI_MspInit+0x88>)
8000da4: 6c5b ldr r3, [r3, #68] ; 0x44
8000da6: f403 5380 and.w r3, r3, #4096 ; 0x1000
8000daa: 613b str r3, [r7, #16]
8000dac: 693b ldr r3, [r7, #16]
__HAL_RCC_GPIOA_CLK_ENABLE();
8000dae: 2300 movs r3, #0
8000db0: 60fb str r3, [r7, #12]
8000db2: 4b11 ldr r3, [pc, #68] ; (8000df8 <HAL_SPI_MspInit+0x88>)
8000db4: 6b1b ldr r3, [r3, #48] ; 0x30
8000db6: 4a10 ldr r2, [pc, #64] ; (8000df8 <HAL_SPI_MspInit+0x88>)
8000db8: f043 0301 orr.w r3, r3, #1
8000dbc: 6313 str r3, [r2, #48] ; 0x30
8000dbe: 4b0e ldr r3, [pc, #56] ; (8000df8 <HAL_SPI_MspInit+0x88>)
8000dc0: 6b1b ldr r3, [r3, #48] ; 0x30
8000dc2: f003 0301 and.w r3, r3, #1
8000dc6: 60fb str r3, [r7, #12]
8000dc8: 68fb ldr r3, [r7, #12]
/**SPI1 GPIO Configuration
PA5 ------> SPI1_SCK
PA6 ------> SPI1_MISO
PA7 ------> SPI1_MOSI
*/
GPIO_InitStruct.Pin = SPI1_SCK_Pin|SPI1_MISO_Pin|SPI1_MISOA7_Pin;
8000dca: 23e0 movs r3, #224 ; 0xe0
8000dcc: 617b str r3, [r7, #20]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000dce: 2302 movs r3, #2
8000dd0: 61bb str r3, [r7, #24]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000dd2: 2300 movs r3, #0
8000dd4: 61fb str r3, [r7, #28]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
8000dd6: 2303 movs r3, #3
8000dd8: 623b str r3, [r7, #32]
GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
8000dda: 2305 movs r3, #5
8000ddc: 627b str r3, [r7, #36] ; 0x24
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8000dde: f107 0314 add.w r3, r7, #20
8000de2: 4619 mov r1, r3
8000de4: 4805 ldr r0, [pc, #20] ; (8000dfc <HAL_SPI_MspInit+0x8c>)
8000de6: f000 fb77 bl 80014d8 <HAL_GPIO_Init>
/* USER CODE BEGIN SPI1_MspInit 1 */
/* USER CODE END SPI1_MspInit 1 */
}
}
8000dea: bf00 nop
8000dec: 3728 adds r7, #40 ; 0x28
8000dee: 46bd mov sp, r7
8000df0: bd80 pop {r7, pc}
8000df2: bf00 nop
8000df4: 40013000 .word 0x40013000
8000df8: 40023800 .word 0x40023800
8000dfc: 40020000 .word 0x40020000
08000e00 <HAL_UART_MspInit>:
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
8000e00: b580 push {r7, lr}
8000e02: b08a sub sp, #40 ; 0x28
8000e04: af00 add r7, sp, #0
8000e06: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8000e08: f107 0314 add.w r3, r7, #20
8000e0c: 2200 movs r2, #0
8000e0e: 601a str r2, [r3, #0]
8000e10: 605a str r2, [r3, #4]
8000e12: 609a str r2, [r3, #8]
8000e14: 60da str r2, [r3, #12]
8000e16: 611a str r2, [r3, #16]
if(huart->Instance==USART2)
8000e18: 687b ldr r3, [r7, #4]
8000e1a: 681b ldr r3, [r3, #0]
8000e1c: 4a19 ldr r2, [pc, #100] ; (8000e84 <HAL_UART_MspInit+0x84>)
8000e1e: 4293 cmp r3, r2
8000e20: d12b bne.n 8000e7a <HAL_UART_MspInit+0x7a>
{
/* USER CODE BEGIN USART2_MspInit 0 */
/* USER CODE END USART2_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_USART2_CLK_ENABLE();
8000e22: 2300 movs r3, #0
8000e24: 613b str r3, [r7, #16]
8000e26: 4b18 ldr r3, [pc, #96] ; (8000e88 <HAL_UART_MspInit+0x88>)
8000e28: 6c1b ldr r3, [r3, #64] ; 0x40
8000e2a: 4a17 ldr r2, [pc, #92] ; (8000e88 <HAL_UART_MspInit+0x88>)
8000e2c: f443 3300 orr.w r3, r3, #131072 ; 0x20000
8000e30: 6413 str r3, [r2, #64] ; 0x40
8000e32: 4b15 ldr r3, [pc, #84] ; (8000e88 <HAL_UART_MspInit+0x88>)
8000e34: 6c1b ldr r3, [r3, #64] ; 0x40
8000e36: f403 3300 and.w r3, r3, #131072 ; 0x20000
8000e3a: 613b str r3, [r7, #16]
8000e3c: 693b ldr r3, [r7, #16]
__HAL_RCC_GPIOA_CLK_ENABLE();
8000e3e: 2300 movs r3, #0
8000e40: 60fb str r3, [r7, #12]
8000e42: 4b11 ldr r3, [pc, #68] ; (8000e88 <HAL_UART_MspInit+0x88>)
8000e44: 6b1b ldr r3, [r3, #48] ; 0x30
8000e46: 4a10 ldr r2, [pc, #64] ; (8000e88 <HAL_UART_MspInit+0x88>)
8000e48: f043 0301 orr.w r3, r3, #1
8000e4c: 6313 str r3, [r2, #48] ; 0x30
8000e4e: 4b0e ldr r3, [pc, #56] ; (8000e88 <HAL_UART_MspInit+0x88>)
8000e50: 6b1b ldr r3, [r3, #48] ; 0x30
8000e52: f003 0301 and.w r3, r3, #1
8000e56: 60fb str r3, [r7, #12]
8000e58: 68fb ldr r3, [r7, #12]
/**USART2 GPIO Configuration
PA2 ------> USART2_TX
PA3 ------> USART2_RX
*/
GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3;
8000e5a: 230c movs r3, #12
8000e5c: 617b str r3, [r7, #20]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000e5e: 2302 movs r3, #2
8000e60: 61bb str r3, [r7, #24]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000e62: 2300 movs r3, #0
8000e64: 61fb str r3, [r7, #28]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
8000e66: 2303 movs r3, #3
8000e68: 623b str r3, [r7, #32]
GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
8000e6a: 2307 movs r3, #7
8000e6c: 627b str r3, [r7, #36] ; 0x24
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8000e6e: f107 0314 add.w r3, r7, #20
8000e72: 4619 mov r1, r3
8000e74: 4805 ldr r0, [pc, #20] ; (8000e8c <HAL_UART_MspInit+0x8c>)
8000e76: f000 fb2f bl 80014d8 <HAL_GPIO_Init>
/* USER CODE BEGIN USART2_MspInit 1 */
/* USER CODE END USART2_MspInit 1 */
}
}
8000e7a: bf00 nop
8000e7c: 3728 adds r7, #40 ; 0x28
8000e7e: 46bd mov sp, r7
8000e80: bd80 pop {r7, pc}
8000e82: bf00 nop
8000e84: 40004400 .word 0x40004400
8000e88: 40023800 .word 0x40023800
8000e8c: 40020000 .word 0x40020000
08000e90 <NMI_Handler>:
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
8000e90: b480 push {r7}
8000e92: af00 add r7, sp, #0
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
8000e94: e7fe b.n 8000e94 <NMI_Handler+0x4>
08000e96 <HardFault_Handler>:
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
8000e96: b480 push {r7}
8000e98: af00 add r7, sp, #0
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
8000e9a: e7fe b.n 8000e9a <HardFault_Handler+0x4>
08000e9c <MemManage_Handler>:
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
8000e9c: b480 push {r7}
8000e9e: af00 add r7, sp, #0
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
8000ea0: e7fe b.n 8000ea0 <MemManage_Handler+0x4>
08000ea2 <BusFault_Handler>:
/**
* @brief This function handles Pre-fetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
8000ea2: b480 push {r7}
8000ea4: af00 add r7, sp, #0
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
8000ea6: e7fe b.n 8000ea6 <BusFault_Handler+0x4>
08000ea8 <UsageFault_Handler>:
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
8000ea8: b480 push {r7}
8000eaa: af00 add r7, sp, #0
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
8000eac: e7fe b.n 8000eac <UsageFault_Handler+0x4>
08000eae <SVC_Handler>:
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
8000eae: b480 push {r7}
8000eb0: af00 add r7, sp, #0
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
}
8000eb2: bf00 nop
8000eb4: 46bd mov sp, r7
8000eb6: f85d 7b04 ldr.w r7, [sp], #4
8000eba: 4770 bx lr
08000ebc <DebugMon_Handler>:
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
8000ebc: b480 push {r7}
8000ebe: af00 add r7, sp, #0
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
8000ec0: bf00 nop
8000ec2: 46bd mov sp, r7
8000ec4: f85d 7b04 ldr.w r7, [sp], #4
8000ec8: 4770 bx lr
08000eca <PendSV_Handler>:
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
8000eca: b480 push {r7}
8000ecc: af00 add r7, sp, #0
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
8000ece: bf00 nop
8000ed0: 46bd mov sp, r7
8000ed2: f85d 7b04 ldr.w r7, [sp], #4
8000ed6: 4770 bx lr
08000ed8 <SysTick_Handler>:
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
8000ed8: b580 push {r7, lr}
8000eda: af00 add r7, sp, #0
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
8000edc: f000 f9a8 bl 8001230 <HAL_IncTick>
/* USER CODE BEGIN SysTick_IRQn 1 */
/* USER CODE END SysTick_IRQn 1 */
}
8000ee0: bf00 nop
8000ee2: bd80 pop {r7, pc}
08000ee4 <OTG_FS_IRQHandler>:
/**
* @brief This function handles USB On The Go FS global interrupt.
*/
void OTG_FS_IRQHandler(void)
{
8000ee4: b580 push {r7, lr}
8000ee6: af00 add r7, sp, #0
/* USER CODE BEGIN OTG_FS_IRQn 0 */
/* USER CODE END OTG_FS_IRQn 0 */
HAL_HCD_IRQHandler(&hhcd_USB_OTG_FS);
8000ee8: 4802 ldr r0, [pc, #8] ; (8000ef4 <OTG_FS_IRQHandler+0x10>)
8000eea: f000 ff3b bl 8001d64 <HAL_HCD_IRQHandler>
/* USER CODE BEGIN OTG_FS_IRQn 1 */
/* USER CODE END OTG_FS_IRQn 1 */
}
8000eee: bf00 nop
8000ef0: bd80 pop {r7, pc}
8000ef2: bf00 nop
8000ef4: 20000638 .word 0x20000638
08000ef8 <_read>:
_kill(status, -1);
while (1) {} /* Make sure we hang here */
}
__attribute__((weak)) int _read(int file, char *ptr, int len)
{
8000ef8: b580 push {r7, lr}
8000efa: b086 sub sp, #24
8000efc: af00 add r7, sp, #0
8000efe: 60f8 str r0, [r7, #12]
8000f00: 60b9 str r1, [r7, #8]
8000f02: 607a str r2, [r7, #4]
int DataIdx;
for (DataIdx = 0; DataIdx < len; DataIdx++)
8000f04: 2300 movs r3, #0
8000f06: 617b str r3, [r7, #20]
8000f08: e00a b.n 8000f20 <_read+0x28>
{
*ptr++ = __io_getchar();
8000f0a: f3af 8000 nop.w
8000f0e: 4601 mov r1, r0
8000f10: 68bb ldr r3, [r7, #8]
8000f12: 1c5a adds r2, r3, #1
8000f14: 60ba str r2, [r7, #8]
8000f16: b2ca uxtb r2, r1
8000f18: 701a strb r2, [r3, #0]
for (DataIdx = 0; DataIdx < len; DataIdx++)
8000f1a: 697b ldr r3, [r7, #20]
8000f1c: 3301 adds r3, #1
8000f1e: 617b str r3, [r7, #20]
8000f20: 697a ldr r2, [r7, #20]
8000f22: 687b ldr r3, [r7, #4]
8000f24: 429a cmp r2, r3
8000f26: dbf0 blt.n 8000f0a <_read+0x12>
}
return len;
8000f28: 687b ldr r3, [r7, #4]
}
8000f2a: 4618 mov r0, r3
8000f2c: 3718 adds r7, #24
8000f2e: 46bd mov sp, r7
8000f30: bd80 pop {r7, pc}
08000f32 <_write>:
__attribute__((weak)) int _write(int file, char *ptr, int len)
{
8000f32: b580 push {r7, lr}
8000f34: b086 sub sp, #24
8000f36: af00 add r7, sp, #0
8000f38: 60f8 str r0, [r7, #12]
8000f3a: 60b9 str r1, [r7, #8]
8000f3c: 607a str r2, [r7, #4]
int DataIdx;
for (DataIdx = 0; DataIdx < len; DataIdx++)
8000f3e: 2300 movs r3, #0
8000f40: 617b str r3, [r7, #20]
8000f42: e009 b.n 8000f58 <_write+0x26>
{
__io_putchar(*ptr++);
8000f44: 68bb ldr r3, [r7, #8]
8000f46: 1c5a adds r2, r3, #1
8000f48: 60ba str r2, [r7, #8]
8000f4a: 781b ldrb r3, [r3, #0]
8000f4c: 4618 mov r0, r3
8000f4e: f7ff fb65 bl 800061c <__io_putchar>
for (DataIdx = 0; DataIdx < len; DataIdx++)
8000f52: 697b ldr r3, [r7, #20]
8000f54: 3301 adds r3, #1
8000f56: 617b str r3, [r7, #20]
8000f58: 697a ldr r2, [r7, #20]
8000f5a: 687b ldr r3, [r7, #4]
8000f5c: 429a cmp r2, r3
8000f5e: dbf1 blt.n 8000f44 <_write+0x12>
}
return len;
8000f60: 687b ldr r3, [r7, #4]
}
8000f62: 4618 mov r0, r3
8000f64: 3718 adds r7, #24
8000f66: 46bd mov sp, r7
8000f68: bd80 pop {r7, pc}
08000f6a <_close>:
int _close(int file)
{
8000f6a: b480 push {r7}
8000f6c: b083 sub sp, #12
8000f6e: af00 add r7, sp, #0
8000f70: 6078 str r0, [r7, #4]
return -1;
8000f72: f04f 33ff mov.w r3, #4294967295
}
8000f76: 4618 mov r0, r3
8000f78: 370c adds r7, #12
8000f7a: 46bd mov sp, r7
8000f7c: f85d 7b04 ldr.w r7, [sp], #4
8000f80: 4770 bx lr
08000f82 <_fstat>:
int _fstat(int file, struct stat *st)
{
8000f82: b480 push {r7}
8000f84: b083 sub sp, #12
8000f86: af00 add r7, sp, #0
8000f88: 6078 str r0, [r7, #4]
8000f8a: 6039 str r1, [r7, #0]
st->st_mode = S_IFCHR;
8000f8c: 683b ldr r3, [r7, #0]
8000f8e: f44f 5200 mov.w r2, #8192 ; 0x2000
8000f92: 605a str r2, [r3, #4]
return 0;
8000f94: 2300 movs r3, #0
}
8000f96: 4618 mov r0, r3
8000f98: 370c adds r7, #12
8000f9a: 46bd mov sp, r7
8000f9c: f85d 7b04 ldr.w r7, [sp], #4
8000fa0: 4770 bx lr
08000fa2 <_isatty>:
int _isatty(int file)
{
8000fa2: b480 push {r7}
8000fa4: b083 sub sp, #12
8000fa6: af00 add r7, sp, #0
8000fa8: 6078 str r0, [r7, #4]
return 1;
8000faa: 2301 movs r3, #1
}
8000fac: 4618 mov r0, r3
8000fae: 370c adds r7, #12
8000fb0: 46bd mov sp, r7
8000fb2: f85d 7b04 ldr.w r7, [sp], #4
8000fb6: 4770 bx lr
08000fb8 <_lseek>:
int _lseek(int file, int ptr, int dir)
{
8000fb8: b480 push {r7}
8000fba: b085 sub sp, #20
8000fbc: af00 add r7, sp, #0
8000fbe: 60f8 str r0, [r7, #12]
8000fc0: 60b9 str r1, [r7, #8]
8000fc2: 607a str r2, [r7, #4]
return 0;
8000fc4: 2300 movs r3, #0
}
8000fc6: 4618 mov r0, r3
8000fc8: 3714 adds r7, #20
8000fca: 46bd mov sp, r7
8000fcc: f85d 7b04 ldr.w r7, [sp], #4
8000fd0: 4770 bx lr
...
08000fd4 <_sbrk>:
*
* @param incr Memory size
* @return Pointer to allocated memory
*/
void *_sbrk(ptrdiff_t incr)
{
8000fd4: b580 push {r7, lr}
8000fd6: b086 sub sp, #24
8000fd8: af00 add r7, sp, #0
8000fda: 6078 str r0, [r7, #4]
extern uint8_t _end; /* Symbol defined in the linker script */
extern uint8_t _estack; /* Symbol defined in the linker script */
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
8000fdc: 4a14 ldr r2, [pc, #80] ; (8001030 <_sbrk+0x5c>)
8000fde: 4b15 ldr r3, [pc, #84] ; (8001034 <_sbrk+0x60>)
8000fe0: 1ad3 subs r3, r2, r3
8000fe2: 617b str r3, [r7, #20]
const uint8_t *max_heap = (uint8_t *)stack_limit;
8000fe4: 697b ldr r3, [r7, #20]
8000fe6: 613b str r3, [r7, #16]
uint8_t *prev_heap_end;
/* Initialize heap end at first call */
if (NULL == __sbrk_heap_end)
8000fe8: 4b13 ldr r3, [pc, #76] ; (8001038 <_sbrk+0x64>)
8000fea: 681b ldr r3, [r3, #0]
8000fec: 2b00 cmp r3, #0
8000fee: d102 bne.n 8000ff6 <_sbrk+0x22>
{
__sbrk_heap_end = &_end;
8000ff0: 4b11 ldr r3, [pc, #68] ; (8001038 <_sbrk+0x64>)
8000ff2: 4a12 ldr r2, [pc, #72] ; (800103c <_sbrk+0x68>)
8000ff4: 601a str r2, [r3, #0]
}
/* Protect heap from growing into the reserved MSP stack */
if (__sbrk_heap_end + incr > max_heap)
8000ff6: 4b10 ldr r3, [pc, #64] ; (8001038 <_sbrk+0x64>)
8000ff8: 681a ldr r2, [r3, #0]
8000ffa: 687b ldr r3, [r7, #4]
8000ffc: 4413 add r3, r2
8000ffe: 693a ldr r2, [r7, #16]
8001000: 429a cmp r2, r3
8001002: d207 bcs.n 8001014 <_sbrk+0x40>
{
errno = ENOMEM;
8001004: f008 f944 bl 8009290 <__errno>
8001008: 4602 mov r2, r0
800100a: 230c movs r3, #12
800100c: 6013 str r3, [r2, #0]
return (void *)-1;
800100e: f04f 33ff mov.w r3, #4294967295
8001012: e009 b.n 8001028 <_sbrk+0x54>
}
prev_heap_end = __sbrk_heap_end;
8001014: 4b08 ldr r3, [pc, #32] ; (8001038 <_sbrk+0x64>)
8001016: 681b ldr r3, [r3, #0]
8001018: 60fb str r3, [r7, #12]
__sbrk_heap_end += incr;
800101a: 4b07 ldr r3, [pc, #28] ; (8001038 <_sbrk+0x64>)
800101c: 681a ldr r2, [r3, #0]
800101e: 687b ldr r3, [r7, #4]
8001020: 4413 add r3, r2
8001022: 4a05 ldr r2, [pc, #20] ; (8001038 <_sbrk+0x64>)
8001024: 6013 str r3, [r2, #0]
return (void *)prev_heap_end;
8001026: 68fb ldr r3, [r7, #12]
}
8001028: 4618 mov r0, r3
800102a: 3718 adds r7, #24
800102c: 46bd mov sp, r7
800102e: bd80 pop {r7, pc}
8001030: 20010000 .word 0x20010000
8001034: 00000400 .word 0x00000400
8001038: 200000c8 .word 0x200000c8
800103c: 20000900 .word 0x20000900
08001040 <SystemInit>:
* configuration.
* @param None
* @retval None
*/
void SystemInit(void)
{
8001040: b480 push {r7}
8001042: af00 add r7, sp, #0
/* FPU settings ------------------------------------------------------------*/
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
8001044: 4b08 ldr r3, [pc, #32] ; (8001068 <SystemInit+0x28>)
8001046: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
800104a: 4a07 ldr r2, [pc, #28] ; (8001068 <SystemInit+0x28>)
800104c: f443 0370 orr.w r3, r3, #15728640 ; 0xf00000
8001050: f8c2 3088 str.w r3, [r2, #136] ; 0x88
/* Configure the Vector Table location add offset address ------------------*/
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
8001054: 4b04 ldr r3, [pc, #16] ; (8001068 <SystemInit+0x28>)
8001056: f04f 6200 mov.w r2, #134217728 ; 0x8000000
800105a: 609a str r2, [r3, #8]
#endif
}
800105c: bf00 nop
800105e: 46bd mov sp, r7
8001060: f85d 7b04 ldr.w r7, [sp], #4
8001064: 4770 bx lr
8001066: bf00 nop
8001068: e000ed00 .word 0xe000ed00
0800106c <Reset_Handler>:
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
ldr sp, =_estack /* set stack pointer */
800106c: f8df d034 ldr.w sp, [pc, #52] ; 80010a4 <LoopFillZerobss+0x14>
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
8001070: 2100 movs r1, #0
b LoopCopyDataInit
8001072: e003 b.n 800107c <LoopCopyDataInit>
08001074 <CopyDataInit>:
CopyDataInit:
ldr r3, =_sidata
8001074: 4b0c ldr r3, [pc, #48] ; (80010a8 <LoopFillZerobss+0x18>)
ldr r3, [r3, r1]
8001076: 585b ldr r3, [r3, r1]
str r3, [r0, r1]
8001078: 5043 str r3, [r0, r1]
adds r1, r1, #4
800107a: 3104 adds r1, #4
0800107c <LoopCopyDataInit>:
LoopCopyDataInit:
ldr r0, =_sdata
800107c: 480b ldr r0, [pc, #44] ; (80010ac <LoopFillZerobss+0x1c>)
ldr r3, =_edata
800107e: 4b0c ldr r3, [pc, #48] ; (80010b0 <LoopFillZerobss+0x20>)
adds r2, r0, r1
8001080: 1842 adds r2, r0, r1
cmp r2, r3
8001082: 429a cmp r2, r3
bcc CopyDataInit
8001084: d3f6 bcc.n 8001074 <CopyDataInit>
ldr r2, =_sbss
8001086: 4a0b ldr r2, [pc, #44] ; (80010b4 <LoopFillZerobss+0x24>)
b LoopFillZerobss
8001088: e002 b.n 8001090 <LoopFillZerobss>
0800108a <FillZerobss>:
/* Zero fill the bss segment. */
FillZerobss:
movs r3, #0
800108a: 2300 movs r3, #0
str r3, [r2], #4
800108c: f842 3b04 str.w r3, [r2], #4
08001090 <LoopFillZerobss>:
LoopFillZerobss:
ldr r3, = _ebss
8001090: 4b09 ldr r3, [pc, #36] ; (80010b8 <LoopFillZerobss+0x28>)
cmp r2, r3
8001092: 429a cmp r2, r3
bcc FillZerobss
8001094: d3f9 bcc.n 800108a <FillZerobss>
/* Call the clock system intitialization function.*/
bl SystemInit
8001096: f7ff ffd3 bl 8001040 <SystemInit>
/* Call static constructors */
bl __libc_init_array
800109a: f008 f8ff bl 800929c <__libc_init_array>
/* Call the application's entry point.*/
bl main
800109e: f7ff facf bl 8000640 <main>
bx lr
80010a2: 4770 bx lr
ldr sp, =_estack /* set stack pointer */
80010a4: 20010000 .word 0x20010000
ldr r3, =_sidata
80010a8: 0800a2c0 .word 0x0800a2c0
ldr r0, =_sdata
80010ac: 20000000 .word 0x20000000
ldr r3, =_edata
80010b0: 200000a4 .word 0x200000a4
ldr r2, =_sbss
80010b4: 200000a4 .word 0x200000a4
ldr r3, = _ebss
80010b8: 20000900 .word 0x20000900
080010bc <ADC_IRQHandler>:
* @retval None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
80010bc: e7fe b.n 80010bc <ADC_IRQHandler>
...
080010c0 <CS43L22_Init>:
//CS43L22 register definition
static const uint8_t _ID = 0x01;
//Driver function definition
bool CS43L22_Init(CS43L22 *device, I2C_HandleTypeDef *i2cHandler)
{
80010c0: b580 push {r7, lr}
80010c2: b082 sub sp, #8
80010c4: af00 add r7, sp, #0
80010c6: 6078 str r0, [r7, #4]
80010c8: 6039 str r1, [r7, #0]
device->i2cHandler = i2cHandler;
80010ca: 687b ldr r3, [r7, #4]
80010cc: 683a ldr r2, [r7, #0]
80010ce: 601a str r2, [r3, #0]
//We check that the reset pin is not low...
HAL_GPIO_WritePin(GPIOD, GPIO_PIN_4, GPIO_PIN_SET);
80010d0: 2201 movs r2, #1
80010d2: 2110 movs r1, #16
80010d4: 4803 ldr r0, [pc, #12] ; (80010e4 <CS43L22_Init+0x24>)
80010d6: f000 fb81 bl 80017dc <HAL_GPIO_WritePin>
return true;
80010da: 2301 movs r3, #1
}
80010dc: 4618 mov r0, r3
80010de: 3708 adds r7, #8
80010e0: 46bd mov sp, r7
80010e2: bd80 pop {r7, pc}
80010e4: 40020c00 .word 0x40020c00
080010e8 <CS43L22_GetDeviceID>:
HAL_GPIO_WritePin(GPIOD, GPIO_PIN_4, GPIO_PIN_SET);
return true;
}
bool CS43L22_GetDeviceID(CS43L22 *device, uint8_t *chipID, uint8_t *chipREVID)
{
80010e8: b580 push {r7, lr}
80010ea: b086 sub sp, #24
80010ec: af00 add r7, sp, #0
80010ee: 60f8 str r0, [r7, #12]
80010f0: 60b9 str r1, [r7, #8]
80010f2: 607a str r2, [r7, #4]
uint8_t data;
if(!CS43L22_ReadRegister(device, ID, &data))
80010f4: f107 0317 add.w r3, r7, #23
80010f8: 461a mov r2, r3
80010fa: 2101 movs r1, #1
80010fc: 68f8 ldr r0, [r7, #12]
80010fe: f000 f815 bl 800112c <CS43L22_ReadRegister>
8001102: 4603 mov r3, r0
8001104: 2b00 cmp r3, #0
8001106: d101 bne.n 800110c <CS43L22_GetDeviceID+0x24>
return false;
8001108: 2300 movs r3, #0
800110a: e00b b.n 8001124 <CS43L22_GetDeviceID+0x3c>
*chipID = data >> 3;
800110c: 7dfb ldrb r3, [r7, #23]
800110e: 08db lsrs r3, r3, #3
8001110: b2da uxtb r2, r3
8001112: 68bb ldr r3, [r7, #8]
8001114: 701a strb r2, [r3, #0]
*chipREVID = data & 0x07;
8001116: 7dfb ldrb r3, [r7, #23]
8001118: f003 0307 and.w r3, r3, #7
800111c: b2da uxtb r2, r3
800111e: 687b ldr r3, [r7, #4]
8001120: 701a strb r2, [r3, #0]
return true;
8001122: 2301 movs r3, #1
}
8001124: 4618 mov r0, r3
8001126: 3718 adds r7, #24
8001128: 46bd mov sp, r7
800112a: bd80 pop {r7, pc}
0800112c <CS43L22_ReadRegister>:
bool CS43L22_ReadRegister(CS43L22 *device, uint8_t registerAddr, uint8_t *data)
{
800112c: b580 push {r7, lr}
800112e: b088 sub sp, #32
8001130: af02 add r7, sp, #8
8001132: 60f8 str r0, [r7, #12]
8001134: 460b mov r3, r1
8001136: 607a str r2, [r7, #4]
8001138: 72fb strb r3, [r7, #11]
HAL_StatusTypeDef status = HAL_I2C_Master_Transmit(device->i2cHandler, CS43L22_ADDR, &registerAddr, 1, HAL_MAX_DELAY);
800113a: 68fb ldr r3, [r7, #12]
800113c: 6818 ldr r0, [r3, #0]
800113e: 2394 movs r3, #148 ; 0x94
8001140: b299 uxth r1, r3
8001142: f107 020b add.w r2, r7, #11
8001146: f04f 33ff mov.w r3, #4294967295
800114a: 9300 str r3, [sp, #0]
800114c: 2301 movs r3, #1
800114e: f002 f9a3 bl 8003498 <HAL_I2C_Master_Transmit>
8001152: 4603 mov r3, r0
8001154: 75fb strb r3, [r7, #23]
if(status != HAL_OK)
8001156: 7dfb ldrb r3, [r7, #23]
8001158: 2b00 cmp r3, #0
800115a: d001 beq.n 8001160 <CS43L22_ReadRegister+0x34>
return false;
800115c: 2300 movs r3, #0
800115e: e010 b.n 8001182 <CS43L22_ReadRegister+0x56>
return HAL_I2C_Master_Receive(device->i2cHandler, CS43L22_ADDR, data, 1, HAL_MAX_DELAY) == HAL_OK ? true : false;
8001160: 68fb ldr r3, [r7, #12]
8001162: 6818 ldr r0, [r3, #0]
8001164: 2394 movs r3, #148 ; 0x94
8001166: b299 uxth r1, r3
8001168: f04f 33ff mov.w r3, #4294967295
800116c: 9300 str r3, [sp, #0]
800116e: 2301 movs r3, #1
8001170: 687a ldr r2, [r7, #4]
8001172: f002 fa8f bl 8003694 <HAL_I2C_Master_Receive>
8001176: 4603 mov r3, r0
8001178: 2b00 cmp r3, #0
800117a: bf0c ite eq
800117c: 2301 moveq r3, #1
800117e: 2300 movne r3, #0
8001180: b2db uxtb r3, r3
}
8001182: 4618 mov r0, r3
8001184: 3718 adds r7, #24
8001186: 46bd mov sp, r7
8001188: bd80 pop {r7, pc}
...
0800118c <HAL_Init>:
* need to ensure that the SysTick time base is always set to 1 millisecond
* to have correct HAL operation.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_Init(void)
{
800118c: b580 push {r7, lr}
800118e: af00 add r7, sp, #0
/* Configure Flash prefetch, Instruction cache, Data cache */
#if (INSTRUCTION_CACHE_ENABLE != 0U)
__HAL_FLASH_INSTRUCTION_CACHE_ENABLE();
8001190: 4b0e ldr r3, [pc, #56] ; (80011cc <HAL_Init+0x40>)
8001192: 681b ldr r3, [r3, #0]
8001194: 4a0d ldr r2, [pc, #52] ; (80011cc <HAL_Init+0x40>)
8001196: f443 7300 orr.w r3, r3, #512 ; 0x200
800119a: 6013 str r3, [r2, #0]
#endif /* INSTRUCTION_CACHE_ENABLE */
#if (DATA_CACHE_ENABLE != 0U)
__HAL_FLASH_DATA_CACHE_ENABLE();
800119c: 4b0b ldr r3, [pc, #44] ; (80011cc <HAL_Init+0x40>)
800119e: 681b ldr r3, [r3, #0]
80011a0: 4a0a ldr r2, [pc, #40] ; (80011cc <HAL_Init+0x40>)
80011a2: f443 6380 orr.w r3, r3, #1024 ; 0x400
80011a6: 6013 str r3, [r2, #0]
#endif /* DATA_CACHE_ENABLE */
#if (PREFETCH_ENABLE != 0U)
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
80011a8: 4b08 ldr r3, [pc, #32] ; (80011cc <HAL_Init+0x40>)
80011aa: 681b ldr r3, [r3, #0]
80011ac: 4a07 ldr r2, [pc, #28] ; (80011cc <HAL_Init+0x40>)
80011ae: f443 7380 orr.w r3, r3, #256 ; 0x100
80011b2: 6013 str r3, [r2, #0]
#endif /* PREFETCH_ENABLE */
/* Set Interrupt Group Priority */
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
80011b4: 2003 movs r0, #3
80011b6: f000 f94d bl 8001454 <HAL_NVIC_SetPriorityGrouping>
/* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
HAL_InitTick(TICK_INT_PRIORITY);
80011ba: 2000 movs r0, #0
80011bc: f000 f808 bl 80011d0 <HAL_InitTick>
/* Init the low level hardware */
HAL_MspInit();
80011c0: f7ff fca8 bl 8000b14 <HAL_MspInit>
/* Return function status */
return HAL_OK;
80011c4: 2300 movs r3, #0
}
80011c6: 4618 mov r0, r3
80011c8: bd80 pop {r7, pc}
80011ca: bf00 nop
80011cc: 40023c00 .word 0x40023c00
080011d0 <HAL_InitTick>:
* implementation in user file.
* @param TickPriority Tick interrupt priority.
* @retval HAL status
*/
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
80011d0: b580 push {r7, lr}
80011d2: b082 sub sp, #8
80011d4: af00 add r7, sp, #0
80011d6: 6078 str r0, [r7, #4]
/* Configure the SysTick to have interrupt in 1ms time basis*/
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
80011d8: 4b12 ldr r3, [pc, #72] ; (8001224 <HAL_InitTick+0x54>)
80011da: 681a ldr r2, [r3, #0]
80011dc: 4b12 ldr r3, [pc, #72] ; (8001228 <HAL_InitTick+0x58>)
80011de: 781b ldrb r3, [r3, #0]
80011e0: 4619 mov r1, r3
80011e2: f44f 737a mov.w r3, #1000 ; 0x3e8
80011e6: fbb3 f3f1 udiv r3, r3, r1
80011ea: fbb2 f3f3 udiv r3, r2, r3
80011ee: 4618 mov r0, r3
80011f0: f000 f965 bl 80014be <HAL_SYSTICK_Config>
80011f4: 4603 mov r3, r0
80011f6: 2b00 cmp r3, #0
80011f8: d001 beq.n 80011fe <HAL_InitTick+0x2e>
{
return HAL_ERROR;
80011fa: 2301 movs r3, #1
80011fc: e00e b.n 800121c <HAL_InitTick+0x4c>
}
/* Configure the SysTick IRQ priority */
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
80011fe: 687b ldr r3, [r7, #4]
8001200: 2b0f cmp r3, #15
8001202: d80a bhi.n 800121a <HAL_InitTick+0x4a>
{
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
8001204: 2200 movs r2, #0
8001206: 6879 ldr r1, [r7, #4]
8001208: f04f 30ff mov.w r0, #4294967295
800120c: f000 f92d bl 800146a <HAL_NVIC_SetPriority>
uwTickPrio = TickPriority;
8001210: 4a06 ldr r2, [pc, #24] ; (800122c <HAL_InitTick+0x5c>)
8001212: 687b ldr r3, [r7, #4]
8001214: 6013 str r3, [r2, #0]
{
return HAL_ERROR;
}
/* Return function status */
return HAL_OK;
8001216: 2300 movs r3, #0
8001218: e000 b.n 800121c <HAL_InitTick+0x4c>
return HAL_ERROR;
800121a: 2301 movs r3, #1
}
800121c: 4618 mov r0, r3
800121e: 3708 adds r7, #8
8001220: 46bd mov sp, r7
8001222: bd80 pop {r7, pc}
8001224: 20000014 .word 0x20000014
8001228: 2000001c .word 0x2000001c
800122c: 20000018 .word 0x20000018
08001230 <HAL_IncTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval None
*/
__weak void HAL_IncTick(void)
{
8001230: b480 push {r7}
8001232: af00 add r7, sp, #0
uwTick += uwTickFreq;
8001234: 4b06 ldr r3, [pc, #24] ; (8001250 <HAL_IncTick+0x20>)
8001236: 781b ldrb r3, [r3, #0]
8001238: 461a mov r2, r3
800123a: 4b06 ldr r3, [pc, #24] ; (8001254 <HAL_IncTick+0x24>)
800123c: 681b ldr r3, [r3, #0]
800123e: 4413 add r3, r2
8001240: 4a04 ldr r2, [pc, #16] ; (8001254 <HAL_IncTick+0x24>)
8001242: 6013 str r3, [r2, #0]
}
8001244: bf00 nop
8001246: 46bd mov sp, r7
8001248: f85d 7b04 ldr.w r7, [sp], #4
800124c: 4770 bx lr
800124e: bf00 nop
8001250: 2000001c .word 0x2000001c
8001254: 2000025c .word 0x2000025c
08001258 <HAL_GetTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval tick value
*/
__weak uint32_t HAL_GetTick(void)
{
8001258: b480 push {r7}
800125a: af00 add r7, sp, #0
return uwTick;
800125c: 4b03 ldr r3, [pc, #12] ; (800126c <HAL_GetTick+0x14>)
800125e: 681b ldr r3, [r3, #0]
}
8001260: 4618 mov r0, r3
8001262: 46bd mov sp, r7
8001264: f85d 7b04 ldr.w r7, [sp], #4
8001268: 4770 bx lr
800126a: bf00 nop
800126c: 2000025c .word 0x2000025c
08001270 <HAL_Delay>:
* implementations in user file.
* @param Delay specifies the delay time length, in milliseconds.
* @retval None
*/
__weak void HAL_Delay(uint32_t Delay)
{
8001270: b580 push {r7, lr}
8001272: b084 sub sp, #16
8001274: af00 add r7, sp, #0
8001276: 6078 str r0, [r7, #4]
uint32_t tickstart = HAL_GetTick();
8001278: f7ff ffee bl 8001258 <HAL_GetTick>
800127c: 60b8 str r0, [r7, #8]
uint32_t wait = Delay;
800127e: 687b ldr r3, [r7, #4]
8001280: 60fb str r3, [r7, #12]
/* Add a freq to guarantee minimum wait */
if (wait < HAL_MAX_DELAY)
8001282: 68fb ldr r3, [r7, #12]
8001284: f1b3 3fff cmp.w r3, #4294967295
8001288: d005 beq.n 8001296 <HAL_Delay+0x26>
{
wait += (uint32_t)(uwTickFreq);
800128a: 4b09 ldr r3, [pc, #36] ; (80012b0 <HAL_Delay+0x40>)
800128c: 781b ldrb r3, [r3, #0]
800128e: 461a mov r2, r3
8001290: 68fb ldr r3, [r7, #12]
8001292: 4413 add r3, r2
8001294: 60fb str r3, [r7, #12]
}
while((HAL_GetTick() - tickstart) < wait)
8001296: bf00 nop
8001298: f7ff ffde bl 8001258 <HAL_GetTick>
800129c: 4602 mov r2, r0
800129e: 68bb ldr r3, [r7, #8]
80012a0: 1ad3 subs r3, r2, r3
80012a2: 68fa ldr r2, [r7, #12]
80012a4: 429a cmp r2, r3
80012a6: d8f7 bhi.n 8001298 <HAL_Delay+0x28>
{
}
}
80012a8: bf00 nop
80012aa: 3710 adds r7, #16
80012ac: 46bd mov sp, r7
80012ae: bd80 pop {r7, pc}
80012b0: 2000001c .word 0x2000001c
080012b4 <__NVIC_SetPriorityGrouping>:
In case of a conflict between priority grouping and available
priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
\param [in] PriorityGroup Priority grouping field.
*/
__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
80012b4: b480 push {r7}
80012b6: b085 sub sp, #20
80012b8: af00 add r7, sp, #0
80012ba: 6078 str r0, [r7, #4]
uint32_t reg_value;
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
80012bc: 687b ldr r3, [r7, #4]
80012be: f003 0307 and.w r3, r3, #7
80012c2: 60fb str r3, [r7, #12]
reg_value = SCB->AIRCR; /* read old register configuration */
80012c4: 4b0c ldr r3, [pc, #48] ; (80012f8 <__NVIC_SetPriorityGrouping+0x44>)
80012c6: 68db ldr r3, [r3, #12]
80012c8: 60bb str r3, [r7, #8]
reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
80012ca: 68ba ldr r2, [r7, #8]
80012cc: f64f 03ff movw r3, #63743 ; 0xf8ff
80012d0: 4013 ands r3, r2
80012d2: 60bb str r3, [r7, #8]
reg_value = (reg_value |
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
(PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
80012d4: 68fb ldr r3, [r7, #12]
80012d6: 021a lsls r2, r3, #8
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
80012d8: 68bb ldr r3, [r7, #8]
80012da: 4313 orrs r3, r2
reg_value = (reg_value |
80012dc: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000
80012e0: f443 3300 orr.w r3, r3, #131072 ; 0x20000
80012e4: 60bb str r3, [r7, #8]
SCB->AIRCR = reg_value;
80012e6: 4a04 ldr r2, [pc, #16] ; (80012f8 <__NVIC_SetPriorityGrouping+0x44>)
80012e8: 68bb ldr r3, [r7, #8]
80012ea: 60d3 str r3, [r2, #12]
}
80012ec: bf00 nop
80012ee: 3714 adds r7, #20
80012f0: 46bd mov sp, r7
80012f2: f85d 7b04 ldr.w r7, [sp], #4
80012f6: 4770 bx lr
80012f8: e000ed00 .word 0xe000ed00
080012fc <__NVIC_GetPriorityGrouping>:
\brief Get Priority Grouping
\details Reads the priority grouping field from the NVIC Interrupt Controller.
\return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
*/
__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
{
80012fc: b480 push {r7}
80012fe: af00 add r7, sp, #0
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
8001300: 4b04 ldr r3, [pc, #16] ; (8001314 <__NVIC_GetPriorityGrouping+0x18>)
8001302: 68db ldr r3, [r3, #12]
8001304: 0a1b lsrs r3, r3, #8
8001306: f003 0307 and.w r3, r3, #7
}
800130a: 4618 mov r0, r3
800130c: 46bd mov sp, r7
800130e: f85d 7b04 ldr.w r7, [sp], #4
8001312: 4770 bx lr
8001314: e000ed00 .word 0xe000ed00
08001318 <__NVIC_EnableIRQ>:
\details Enables a device specific interrupt in the NVIC interrupt controller.
\param [in] IRQn Device specific interrupt number.
\note IRQn must not be negative.
*/
__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
{
8001318: b480 push {r7}
800131a: b083 sub sp, #12
800131c: af00 add r7, sp, #0
800131e: 4603 mov r3, r0
8001320: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
8001322: f997 3007 ldrsb.w r3, [r7, #7]
8001326: 2b00 cmp r3, #0
8001328: db0b blt.n 8001342 <__NVIC_EnableIRQ+0x2a>
{
NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
800132a: 79fb ldrb r3, [r7, #7]
800132c: f003 021f and.w r2, r3, #31
8001330: 4907 ldr r1, [pc, #28] ; (8001350 <__NVIC_EnableIRQ+0x38>)
8001332: f997 3007 ldrsb.w r3, [r7, #7]
8001336: 095b lsrs r3, r3, #5
8001338: 2001 movs r0, #1
800133a: fa00 f202 lsl.w r2, r0, r2
800133e: f841 2023 str.w r2, [r1, r3, lsl #2]
}
}
8001342: bf00 nop
8001344: 370c adds r7, #12
8001346: 46bd mov sp, r7
8001348: f85d 7b04 ldr.w r7, [sp], #4
800134c: 4770 bx lr
800134e: bf00 nop
8001350: e000e100 .word 0xe000e100
08001354 <__NVIC_SetPriority>:
\param [in] IRQn Interrupt number.
\param [in] priority Priority to set.
\note The priority cannot be set for every processor exception.
*/
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
8001354: b480 push {r7}
8001356: b083 sub sp, #12
8001358: af00 add r7, sp, #0
800135a: 4603 mov r3, r0
800135c: 6039 str r1, [r7, #0]
800135e: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
8001360: f997 3007 ldrsb.w r3, [r7, #7]
8001364: 2b00 cmp r3, #0
8001366: db0a blt.n 800137e <__NVIC_SetPriority+0x2a>
{
NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
8001368: 683b ldr r3, [r7, #0]
800136a: b2da uxtb r2, r3
800136c: 490c ldr r1, [pc, #48] ; (80013a0 <__NVIC_SetPriority+0x4c>)
800136e: f997 3007 ldrsb.w r3, [r7, #7]
8001372: 0112 lsls r2, r2, #4
8001374: b2d2 uxtb r2, r2
8001376: 440b add r3, r1
8001378: f883 2300 strb.w r2, [r3, #768] ; 0x300
}
else
{
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
}
}
800137c: e00a b.n 8001394 <__NVIC_SetPriority+0x40>
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
800137e: 683b ldr r3, [r7, #0]
8001380: b2da uxtb r2, r3
8001382: 4908 ldr r1, [pc, #32] ; (80013a4 <__NVIC_SetPriority+0x50>)
8001384: 79fb ldrb r3, [r7, #7]
8001386: f003 030f and.w r3, r3, #15
800138a: 3b04 subs r3, #4
800138c: 0112 lsls r2, r2, #4
800138e: b2d2 uxtb r2, r2
8001390: 440b add r3, r1
8001392: 761a strb r2, [r3, #24]
}
8001394: bf00 nop
8001396: 370c adds r7, #12
8001398: 46bd mov sp, r7
800139a: f85d 7b04 ldr.w r7, [sp], #4
800139e: 4770 bx lr
80013a0: e000e100 .word 0xe000e100
80013a4: e000ed00 .word 0xe000ed00
080013a8 <NVIC_EncodePriority>:
\param [in] PreemptPriority Preemptive priority value (starting from 0).
\param [in] SubPriority Subpriority value (starting from 0).
\return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
*/
__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
{
80013a8: b480 push {r7}
80013aa: b089 sub sp, #36 ; 0x24
80013ac: af00 add r7, sp, #0
80013ae: 60f8 str r0, [r7, #12]
80013b0: 60b9 str r1, [r7, #8]
80013b2: 607a str r2, [r7, #4]
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
80013b4: 68fb ldr r3, [r7, #12]
80013b6: f003 0307 and.w r3, r3, #7
80013ba: 61fb str r3, [r7, #28]
uint32_t PreemptPriorityBits;
uint32_t SubPriorityBits;
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
80013bc: 69fb ldr r3, [r7, #28]
80013be: f1c3 0307 rsb r3, r3, #7
80013c2: 2b04 cmp r3, #4
80013c4: bf28 it cs
80013c6: 2304 movcs r3, #4
80013c8: 61bb str r3, [r7, #24]
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
80013ca: 69fb ldr r3, [r7, #28]
80013cc: 3304 adds r3, #4
80013ce: 2b06 cmp r3, #6
80013d0: d902 bls.n 80013d8 <NVIC_EncodePriority+0x30>
80013d2: 69fb ldr r3, [r7, #28]
80013d4: 3b03 subs r3, #3
80013d6: e000 b.n 80013da <NVIC_EncodePriority+0x32>
80013d8: 2300 movs r3, #0
80013da: 617b str r3, [r7, #20]
return (
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
80013dc: f04f 32ff mov.w r2, #4294967295
80013e0: 69bb ldr r3, [r7, #24]
80013e2: fa02 f303 lsl.w r3, r2, r3
80013e6: 43da mvns r2, r3
80013e8: 68bb ldr r3, [r7, #8]
80013ea: 401a ands r2, r3
80013ec: 697b ldr r3, [r7, #20]
80013ee: 409a lsls r2, r3
((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
80013f0: f04f 31ff mov.w r1, #4294967295
80013f4: 697b ldr r3, [r7, #20]
80013f6: fa01 f303 lsl.w r3, r1, r3
80013fa: 43d9 mvns r1, r3
80013fc: 687b ldr r3, [r7, #4]
80013fe: 400b ands r3, r1
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
8001400: 4313 orrs r3, r2
);
}
8001402: 4618 mov r0, r3
8001404: 3724 adds r7, #36 ; 0x24
8001406: 46bd mov sp, r7
8001408: f85d 7b04 ldr.w r7, [sp], #4
800140c: 4770 bx lr
...
08001410 <SysTick_Config>:
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
must contain a vendor-specific implementation of this function.
*/
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
8001410: b580 push {r7, lr}
8001412: b082 sub sp, #8
8001414: af00 add r7, sp, #0
8001416: 6078 str r0, [r7, #4]
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
8001418: 687b ldr r3, [r7, #4]
800141a: 3b01 subs r3, #1
800141c: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000
8001420: d301 bcc.n 8001426 <SysTick_Config+0x16>
{
return (1UL); /* Reload value impossible */
8001422: 2301 movs r3, #1
8001424: e00f b.n 8001446 <SysTick_Config+0x36>
}
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
8001426: 4a0a ldr r2, [pc, #40] ; (8001450 <SysTick_Config+0x40>)
8001428: 687b ldr r3, [r7, #4]
800142a: 3b01 subs r3, #1
800142c: 6053 str r3, [r2, #4]
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
800142e: 210f movs r1, #15
8001430: f04f 30ff mov.w r0, #4294967295
8001434: f7ff ff8e bl 8001354 <__NVIC_SetPriority>
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
8001438: 4b05 ldr r3, [pc, #20] ; (8001450 <SysTick_Config+0x40>)
800143a: 2200 movs r2, #0
800143c: 609a str r2, [r3, #8]
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
800143e: 4b04 ldr r3, [pc, #16] ; (8001450 <SysTick_Config+0x40>)
8001440: 2207 movs r2, #7
8001442: 601a str r2, [r3, #0]
SysTick_CTRL_TICKINT_Msk |
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
return (0UL); /* Function successful */
8001444: 2300 movs r3, #0
}
8001446: 4618 mov r0, r3
8001448: 3708 adds r7, #8
800144a: 46bd mov sp, r7
800144c: bd80 pop {r7, pc}
800144e: bf00 nop
8001450: e000e010 .word 0xe000e010
08001454 <HAL_NVIC_SetPriorityGrouping>:
* @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
* The pending IRQ priority will be managed only by the subpriority.
* @retval None
*/
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
8001454: b580 push {r7, lr}
8001456: b082 sub sp, #8
8001458: af00 add r7, sp, #0
800145a: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
/* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
NVIC_SetPriorityGrouping(PriorityGroup);
800145c: 6878 ldr r0, [r7, #4]
800145e: f7ff ff29 bl 80012b4 <__NVIC_SetPriorityGrouping>
}
8001462: bf00 nop
8001464: 3708 adds r7, #8
8001466: 46bd mov sp, r7
8001468: bd80 pop {r7, pc}
0800146a <HAL_NVIC_SetPriority>:
* This parameter can be a value between 0 and 15
* A lower priority value indicates a higher priority.
* @retval None
*/
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{
800146a: b580 push {r7, lr}
800146c: b086 sub sp, #24
800146e: af00 add r7, sp, #0
8001470: 4603 mov r3, r0
8001472: 60b9 str r1, [r7, #8]
8001474: 607a str r2, [r7, #4]
8001476: 73fb strb r3, [r7, #15]
uint32_t prioritygroup = 0x00U;
8001478: 2300 movs r3, #0
800147a: 617b str r3, [r7, #20]
/* Check the parameters */
assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
prioritygroup = NVIC_GetPriorityGrouping();
800147c: f7ff ff3e bl 80012fc <__NVIC_GetPriorityGrouping>
8001480: 6178 str r0, [r7, #20]
NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
8001482: 687a ldr r2, [r7, #4]
8001484: 68b9 ldr r1, [r7, #8]
8001486: 6978 ldr r0, [r7, #20]
8001488: f7ff ff8e bl 80013a8 <NVIC_EncodePriority>
800148c: 4602 mov r2, r0
800148e: f997 300f ldrsb.w r3, [r7, #15]
8001492: 4611 mov r1, r2
8001494: 4618 mov r0, r3
8001496: f7ff ff5d bl 8001354 <__NVIC_SetPriority>
}
800149a: bf00 nop
800149c: 3718 adds r7, #24
800149e: 46bd mov sp, r7
80014a0: bd80 pop {r7, pc}
080014a2 <HAL_NVIC_EnableIRQ>:
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
* @retval None
*/
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
{
80014a2: b580 push {r7, lr}
80014a4: b082 sub sp, #8
80014a6: af00 add r7, sp, #0
80014a8: 4603 mov r3, r0
80014aa: 71fb strb r3, [r7, #7]
/* Check the parameters */
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
/* Enable interrupt */
NVIC_EnableIRQ(IRQn);
80014ac: f997 3007 ldrsb.w r3, [r7, #7]
80014b0: 4618 mov r0, r3
80014b2: f7ff ff31 bl 8001318 <__NVIC_EnableIRQ>
}
80014b6: bf00 nop
80014b8: 3708 adds r7, #8
80014ba: 46bd mov sp, r7
80014bc: bd80 pop {r7, pc}
080014be <HAL_SYSTICK_Config>:
* @param TicksNumb Specifies the ticks Number of ticks between two interrupts.
* @retval status: - 0 Function succeeded.
* - 1 Function failed.
*/
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
{
80014be: b580 push {r7, lr}
80014c0: b082 sub sp, #8
80014c2: af00 add r7, sp, #0
80014c4: 6078 str r0, [r7, #4]
return SysTick_Config(TicksNumb);
80014c6: 6878 ldr r0, [r7, #4]
80014c8: f7ff ffa2 bl 8001410 <SysTick_Config>
80014cc: 4603 mov r3, r0
}
80014ce: 4618 mov r0, r3
80014d0: 3708 adds r7, #8
80014d2: 46bd mov sp, r7
80014d4: bd80 pop {r7, pc}
...
080014d8 <HAL_GPIO_Init>:
* @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains
* the configuration information for the specified GPIO peripheral.
* @retval None
*/
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
80014d8: b480 push {r7}
80014da: b089 sub sp, #36 ; 0x24
80014dc: af00 add r7, sp, #0
80014de: 6078 str r0, [r7, #4]
80014e0: 6039 str r1, [r7, #0]
uint32_t position;
uint32_t ioposition = 0x00U;
80014e2: 2300 movs r3, #0
80014e4: 617b str r3, [r7, #20]
uint32_t iocurrent = 0x00U;
80014e6: 2300 movs r3, #0
80014e8: 613b str r3, [r7, #16]
uint32_t temp = 0x00U;
80014ea: 2300 movs r3, #0
80014ec: 61bb str r3, [r7, #24]
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
/* Configure the port pins */
for(position = 0U; position < GPIO_NUMBER; position++)
80014ee: 2300 movs r3, #0
80014f0: 61fb str r3, [r7, #28]
80014f2: e159 b.n 80017a8 <HAL_GPIO_Init+0x2d0>
{
/* Get the IO position */
ioposition = 0x01U << position;
80014f4: 2201 movs r2, #1
80014f6: 69fb ldr r3, [r7, #28]
80014f8: fa02 f303 lsl.w r3, r2, r3
80014fc: 617b str r3, [r7, #20]
/* Get the current IO position */
iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
80014fe: 683b ldr r3, [r7, #0]
8001500: 681b ldr r3, [r3, #0]
8001502: 697a ldr r2, [r7, #20]
8001504: 4013 ands r3, r2
8001506: 613b str r3, [r7, #16]
if(iocurrent == ioposition)
8001508: 693a ldr r2, [r7, #16]
800150a: 697b ldr r3, [r7, #20]
800150c: 429a cmp r2, r3
800150e: f040 8148 bne.w 80017a2 <HAL_GPIO_Init+0x2ca>
{
/*--------------------- GPIO Mode Configuration ------------------------*/
/* In case of Output or Alternate function mode selection */
if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
8001512: 683b ldr r3, [r7, #0]
8001514: 685b ldr r3, [r3, #4]
8001516: 2b01 cmp r3, #1
8001518: d00b beq.n 8001532 <HAL_GPIO_Init+0x5a>
800151a: 683b ldr r3, [r7, #0]
800151c: 685b ldr r3, [r3, #4]
800151e: 2b02 cmp r3, #2
8001520: d007 beq.n 8001532 <HAL_GPIO_Init+0x5a>
(GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
8001522: 683b ldr r3, [r7, #0]
8001524: 685b ldr r3, [r3, #4]
if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
8001526: 2b11 cmp r3, #17
8001528: d003 beq.n 8001532 <HAL_GPIO_Init+0x5a>
(GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
800152a: 683b ldr r3, [r7, #0]
800152c: 685b ldr r3, [r3, #4]
800152e: 2b12 cmp r3, #18
8001530: d130 bne.n 8001594 <HAL_GPIO_Init+0xbc>
{
/* Check the Speed parameter */
assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
/* Configure the IO Speed */
temp = GPIOx->OSPEEDR;
8001532: 687b ldr r3, [r7, #4]
8001534: 689b ldr r3, [r3, #8]
8001536: 61bb str r3, [r7, #24]
temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2U));
8001538: 69fb ldr r3, [r7, #28]
800153a: 005b lsls r3, r3, #1
800153c: 2203 movs r2, #3
800153e: fa02 f303 lsl.w r3, r2, r3
8001542: 43db mvns r3, r3
8001544: 69ba ldr r2, [r7, #24]
8001546: 4013 ands r3, r2
8001548: 61bb str r3, [r7, #24]
temp |= (GPIO_Init->Speed << (position * 2U));
800154a: 683b ldr r3, [r7, #0]
800154c: 68da ldr r2, [r3, #12]
800154e: 69fb ldr r3, [r7, #28]
8001550: 005b lsls r3, r3, #1
8001552: fa02 f303 lsl.w r3, r2, r3
8001556: 69ba ldr r2, [r7, #24]
8001558: 4313 orrs r3, r2
800155a: 61bb str r3, [r7, #24]
GPIOx->OSPEEDR = temp;
800155c: 687b ldr r3, [r7, #4]
800155e: 69ba ldr r2, [r7, #24]
8001560: 609a str r2, [r3, #8]
/* Configure the IO Output Type */
temp = GPIOx->OTYPER;
8001562: 687b ldr r3, [r7, #4]
8001564: 685b ldr r3, [r3, #4]
8001566: 61bb str r3, [r7, #24]
temp &= ~(GPIO_OTYPER_OT_0 << position) ;
8001568: 2201 movs r2, #1
800156a: 69fb ldr r3, [r7, #28]
800156c: fa02 f303 lsl.w r3, r2, r3
8001570: 43db mvns r3, r3
8001572: 69ba ldr r2, [r7, #24]
8001574: 4013 ands r3, r2
8001576: 61bb str r3, [r7, #24]
temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4U) << position);
8001578: 683b ldr r3, [r7, #0]
800157a: 685b ldr r3, [r3, #4]
800157c: 091b lsrs r3, r3, #4
800157e: f003 0201 and.w r2, r3, #1
8001582: 69fb ldr r3, [r7, #28]
8001584: fa02 f303 lsl.w r3, r2, r3
8001588: 69ba ldr r2, [r7, #24]
800158a: 4313 orrs r3, r2
800158c: 61bb str r3, [r7, #24]
GPIOx->OTYPER = temp;
800158e: 687b ldr r3, [r7, #4]
8001590: 69ba ldr r2, [r7, #24]
8001592: 605a str r2, [r3, #4]
}
/* Activate the Pull-up or Pull down resistor for the current IO */
temp = GPIOx->PUPDR;
8001594: 687b ldr r3, [r7, #4]
8001596: 68db ldr r3, [r3, #12]
8001598: 61bb str r3, [r7, #24]
temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2U));
800159a: 69fb ldr r3, [r7, #28]
800159c: 005b lsls r3, r3, #1
800159e: 2203 movs r2, #3
80015a0: fa02 f303 lsl.w r3, r2, r3
80015a4: 43db mvns r3, r3
80015a6: 69ba ldr r2, [r7, #24]
80015a8: 4013 ands r3, r2
80015aa: 61bb str r3, [r7, #24]
temp |= ((GPIO_Init->Pull) << (position * 2U));
80015ac: 683b ldr r3, [r7, #0]
80015ae: 689a ldr r2, [r3, #8]
80015b0: 69fb ldr r3, [r7, #28]
80015b2: 005b lsls r3, r3, #1
80015b4: fa02 f303 lsl.w r3, r2, r3
80015b8: 69ba ldr r2, [r7, #24]
80015ba: 4313 orrs r3, r2
80015bc: 61bb str r3, [r7, #24]
GPIOx->PUPDR = temp;
80015be: 687b ldr r3, [r7, #4]
80015c0: 69ba ldr r2, [r7, #24]
80015c2: 60da str r2, [r3, #12]
/* In case of Alternate function mode selection */
if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
80015c4: 683b ldr r3, [r7, #0]
80015c6: 685b ldr r3, [r3, #4]
80015c8: 2b02 cmp r3, #2
80015ca: d003 beq.n 80015d4 <HAL_GPIO_Init+0xfc>
80015cc: 683b ldr r3, [r7, #0]
80015ce: 685b ldr r3, [r3, #4]
80015d0: 2b12 cmp r3, #18
80015d2: d123 bne.n 800161c <HAL_GPIO_Init+0x144>
{
/* Check the Alternate function parameter */
assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
/* Configure Alternate function mapped with the current IO */
temp = GPIOx->AFR[position >> 3U];
80015d4: 69fb ldr r3, [r7, #28]
80015d6: 08da lsrs r2, r3, #3
80015d8: 687b ldr r3, [r7, #4]
80015da: 3208 adds r2, #8
80015dc: f853 3022 ldr.w r3, [r3, r2, lsl #2]
80015e0: 61bb str r3, [r7, #24]
temp &= ~(0xFU << ((uint32_t)(position & 0x07U) * 4U)) ;
80015e2: 69fb ldr r3, [r7, #28]
80015e4: f003 0307 and.w r3, r3, #7
80015e8: 009b lsls r3, r3, #2
80015ea: 220f movs r2, #15
80015ec: fa02 f303 lsl.w r3, r2, r3
80015f0: 43db mvns r3, r3
80015f2: 69ba ldr r2, [r7, #24]
80015f4: 4013 ands r3, r2
80015f6: 61bb str r3, [r7, #24]
temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4U));
80015f8: 683b ldr r3, [r7, #0]
80015fa: 691a ldr r2, [r3, #16]
80015fc: 69fb ldr r3, [r7, #28]
80015fe: f003 0307 and.w r3, r3, #7
8001602: 009b lsls r3, r3, #2
8001604: fa02 f303 lsl.w r3, r2, r3
8001608: 69ba ldr r2, [r7, #24]
800160a: 4313 orrs r3, r2
800160c: 61bb str r3, [r7, #24]
GPIOx->AFR[position >> 3U] = temp;
800160e: 69fb ldr r3, [r7, #28]
8001610: 08da lsrs r2, r3, #3
8001612: 687b ldr r3, [r7, #4]
8001614: 3208 adds r2, #8
8001616: 69b9 ldr r1, [r7, #24]
8001618: f843 1022 str.w r1, [r3, r2, lsl #2]
}
/* Configure IO Direction mode (Input, Output, Alternate or Analog) */
temp = GPIOx->MODER;
800161c: 687b ldr r3, [r7, #4]
800161e: 681b ldr r3, [r3, #0]
8001620: 61bb str r3, [r7, #24]
temp &= ~(GPIO_MODER_MODER0 << (position * 2U));
8001622: 69fb ldr r3, [r7, #28]
8001624: 005b lsls r3, r3, #1
8001626: 2203 movs r2, #3
8001628: fa02 f303 lsl.w r3, r2, r3
800162c: 43db mvns r3, r3
800162e: 69ba ldr r2, [r7, #24]
8001630: 4013 ands r3, r2
8001632: 61bb str r3, [r7, #24]
temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U));
8001634: 683b ldr r3, [r7, #0]
8001636: 685b ldr r3, [r3, #4]
8001638: f003 0203 and.w r2, r3, #3
800163c: 69fb ldr r3, [r7, #28]
800163e: 005b lsls r3, r3, #1
8001640: fa02 f303 lsl.w r3, r2, r3
8001644: 69ba ldr r2, [r7, #24]
8001646: 4313 orrs r3, r2
8001648: 61bb str r3, [r7, #24]
GPIOx->MODER = temp;
800164a: 687b ldr r3, [r7, #4]
800164c: 69ba ldr r2, [r7, #24]
800164e: 601a str r2, [r3, #0]
/*--------------------- EXTI Mode Configuration ------------------------*/
/* Configure the External Interrupt or event for the current IO */
if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
8001650: 683b ldr r3, [r7, #0]
8001652: 685b ldr r3, [r3, #4]
8001654: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
8001658: 2b00 cmp r3, #0
800165a: f000 80a2 beq.w 80017a2 <HAL_GPIO_Init+0x2ca>
{
/* Enable SYSCFG Clock */
__HAL_RCC_SYSCFG_CLK_ENABLE();
800165e: 2300 movs r3, #0
8001660: 60fb str r3, [r7, #12]
8001662: 4b56 ldr r3, [pc, #344] ; (80017bc <HAL_GPIO_Init+0x2e4>)
8001664: 6c5b ldr r3, [r3, #68] ; 0x44
8001666: 4a55 ldr r2, [pc, #340] ; (80017bc <HAL_GPIO_Init+0x2e4>)
8001668: f443 4380 orr.w r3, r3, #16384 ; 0x4000
800166c: 6453 str r3, [r2, #68] ; 0x44
800166e: 4b53 ldr r3, [pc, #332] ; (80017bc <HAL_GPIO_Init+0x2e4>)
8001670: 6c5b ldr r3, [r3, #68] ; 0x44
8001672: f403 4380 and.w r3, r3, #16384 ; 0x4000
8001676: 60fb str r3, [r7, #12]
8001678: 68fb ldr r3, [r7, #12]
temp = SYSCFG->EXTICR[position >> 2U];
800167a: 4a51 ldr r2, [pc, #324] ; (80017c0 <HAL_GPIO_Init+0x2e8>)
800167c: 69fb ldr r3, [r7, #28]
800167e: 089b lsrs r3, r3, #2
8001680: 3302 adds r3, #2
8001682: f852 3023 ldr.w r3, [r2, r3, lsl #2]
8001686: 61bb str r3, [r7, #24]
temp &= ~(0x0FU << (4U * (position & 0x03U)));
8001688: 69fb ldr r3, [r7, #28]
800168a: f003 0303 and.w r3, r3, #3
800168e: 009b lsls r3, r3, #2
8001690: 220f movs r2, #15
8001692: fa02 f303 lsl.w r3, r2, r3
8001696: 43db mvns r3, r3
8001698: 69ba ldr r2, [r7, #24]
800169a: 4013 ands r3, r2
800169c: 61bb str r3, [r7, #24]
temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
800169e: 687b ldr r3, [r7, #4]
80016a0: 4a48 ldr r2, [pc, #288] ; (80017c4 <HAL_GPIO_Init+0x2ec>)
80016a2: 4293 cmp r3, r2
80016a4: d019 beq.n 80016da <HAL_GPIO_Init+0x202>
80016a6: 687b ldr r3, [r7, #4]
80016a8: 4a47 ldr r2, [pc, #284] ; (80017c8 <HAL_GPIO_Init+0x2f0>)
80016aa: 4293 cmp r3, r2
80016ac: d013 beq.n 80016d6 <HAL_GPIO_Init+0x1fe>
80016ae: 687b ldr r3, [r7, #4]
80016b0: 4a46 ldr r2, [pc, #280] ; (80017cc <HAL_GPIO_Init+0x2f4>)
80016b2: 4293 cmp r3, r2
80016b4: d00d beq.n 80016d2 <HAL_GPIO_Init+0x1fa>
80016b6: 687b ldr r3, [r7, #4]
80016b8: 4a45 ldr r2, [pc, #276] ; (80017d0 <HAL_GPIO_Init+0x2f8>)
80016ba: 4293 cmp r3, r2
80016bc: d007 beq.n 80016ce <HAL_GPIO_Init+0x1f6>
80016be: 687b ldr r3, [r7, #4]
80016c0: 4a44 ldr r2, [pc, #272] ; (80017d4 <HAL_GPIO_Init+0x2fc>)
80016c2: 4293 cmp r3, r2
80016c4: d101 bne.n 80016ca <HAL_GPIO_Init+0x1f2>
80016c6: 2304 movs r3, #4
80016c8: e008 b.n 80016dc <HAL_GPIO_Init+0x204>
80016ca: 2307 movs r3, #7
80016cc: e006 b.n 80016dc <HAL_GPIO_Init+0x204>
80016ce: 2303 movs r3, #3
80016d0: e004 b.n 80016dc <HAL_GPIO_Init+0x204>
80016d2: 2302 movs r3, #2
80016d4: e002 b.n 80016dc <HAL_GPIO_Init+0x204>
80016d6: 2301 movs r3, #1
80016d8: e000 b.n 80016dc <HAL_GPIO_Init+0x204>
80016da: 2300 movs r3, #0
80016dc: 69fa ldr r2, [r7, #28]
80016de: f002 0203 and.w r2, r2, #3
80016e2: 0092 lsls r2, r2, #2
80016e4: 4093 lsls r3, r2
80016e6: 69ba ldr r2, [r7, #24]
80016e8: 4313 orrs r3, r2
80016ea: 61bb str r3, [r7, #24]
SYSCFG->EXTICR[position >> 2U] = temp;
80016ec: 4934 ldr r1, [pc, #208] ; (80017c0 <HAL_GPIO_Init+0x2e8>)
80016ee: 69fb ldr r3, [r7, #28]
80016f0: 089b lsrs r3, r3, #2
80016f2: 3302 adds r3, #2
80016f4: 69ba ldr r2, [r7, #24]
80016f6: f841 2023 str.w r2, [r1, r3, lsl #2]
/* Clear EXTI line configuration */
temp = EXTI->IMR;
80016fa: 4b37 ldr r3, [pc, #220] ; (80017d8 <HAL_GPIO_Init+0x300>)
80016fc: 681b ldr r3, [r3, #0]
80016fe: 61bb str r3, [r7, #24]
temp &= ~((uint32_t)iocurrent);
8001700: 693b ldr r3, [r7, #16]
8001702: 43db mvns r3, r3
8001704: 69ba ldr r2, [r7, #24]
8001706: 4013 ands r3, r2
8001708: 61bb str r3, [r7, #24]
if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
800170a: 683b ldr r3, [r7, #0]
800170c: 685b ldr r3, [r3, #4]
800170e: f403 3380 and.w r3, r3, #65536 ; 0x10000
8001712: 2b00 cmp r3, #0
8001714: d003 beq.n 800171e <HAL_GPIO_Init+0x246>
{
temp |= iocurrent;
8001716: 69ba ldr r2, [r7, #24]
8001718: 693b ldr r3, [r7, #16]
800171a: 4313 orrs r3, r2
800171c: 61bb str r3, [r7, #24]
}
EXTI->IMR = temp;
800171e: 4a2e ldr r2, [pc, #184] ; (80017d8 <HAL_GPIO_Init+0x300>)
8001720: 69bb ldr r3, [r7, #24]
8001722: 6013 str r3, [r2, #0]
temp = EXTI->EMR;
8001724: 4b2c ldr r3, [pc, #176] ; (80017d8 <HAL_GPIO_Init+0x300>)
8001726: 685b ldr r3, [r3, #4]
8001728: 61bb str r3, [r7, #24]
temp &= ~((uint32_t)iocurrent);
800172a: 693b ldr r3, [r7, #16]
800172c: 43db mvns r3, r3
800172e: 69ba ldr r2, [r7, #24]
8001730: 4013 ands r3, r2
8001732: 61bb str r3, [r7, #24]
if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
8001734: 683b ldr r3, [r7, #0]
8001736: 685b ldr r3, [r3, #4]
8001738: f403 3300 and.w r3, r3, #131072 ; 0x20000
800173c: 2b00 cmp r3, #0
800173e: d003 beq.n 8001748 <HAL_GPIO_Init+0x270>
{
temp |= iocurrent;
8001740: 69ba ldr r2, [r7, #24]
8001742: 693b ldr r3, [r7, #16]
8001744: 4313 orrs r3, r2
8001746: 61bb str r3, [r7, #24]
}
EXTI->EMR = temp;
8001748: 4a23 ldr r2, [pc, #140] ; (80017d8 <HAL_GPIO_Init+0x300>)
800174a: 69bb ldr r3, [r7, #24]
800174c: 6053 str r3, [r2, #4]
/* Clear Rising Falling edge configuration */
temp = EXTI->RTSR;
800174e: 4b22 ldr r3, [pc, #136] ; (80017d8 <HAL_GPIO_Init+0x300>)
8001750: 689b ldr r3, [r3, #8]
8001752: 61bb str r3, [r7, #24]
temp &= ~((uint32_t)iocurrent);
8001754: 693b ldr r3, [r7, #16]
8001756: 43db mvns r3, r3
8001758: 69ba ldr r2, [r7, #24]
800175a: 4013 ands r3, r2
800175c: 61bb str r3, [r7, #24]
if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
800175e: 683b ldr r3, [r7, #0]
8001760: 685b ldr r3, [r3, #4]
8001762: f403 1380 and.w r3, r3, #1048576 ; 0x100000
8001766: 2b00 cmp r3, #0
8001768: d003 beq.n 8001772 <HAL_GPIO_Init+0x29a>
{
temp |= iocurrent;
800176a: 69ba ldr r2, [r7, #24]
800176c: 693b ldr r3, [r7, #16]
800176e: 4313 orrs r3, r2
8001770: 61bb str r3, [r7, #24]
}
EXTI->RTSR = temp;
8001772: 4a19 ldr r2, [pc, #100] ; (80017d8 <HAL_GPIO_Init+0x300>)
8001774: 69bb ldr r3, [r7, #24]
8001776: 6093 str r3, [r2, #8]
temp = EXTI->FTSR;
8001778: 4b17 ldr r3, [pc, #92] ; (80017d8 <HAL_GPIO_Init+0x300>)
800177a: 68db ldr r3, [r3, #12]
800177c: 61bb str r3, [r7, #24]
temp &= ~((uint32_t)iocurrent);
800177e: 693b ldr r3, [r7, #16]
8001780: 43db mvns r3, r3
8001782: 69ba ldr r2, [r7, #24]
8001784: 4013 ands r3, r2
8001786: 61bb str r3, [r7, #24]
if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
8001788: 683b ldr r3, [r7, #0]
800178a: 685b ldr r3, [r3, #4]
800178c: f403 1300 and.w r3, r3, #2097152 ; 0x200000
8001790: 2b00 cmp r3, #0
8001792: d003 beq.n 800179c <HAL_GPIO_Init+0x2c4>
{
temp |= iocurrent;
8001794: 69ba ldr r2, [r7, #24]
8001796: 693b ldr r3, [r7, #16]
8001798: 4313 orrs r3, r2
800179a: 61bb str r3, [r7, #24]
}
EXTI->FTSR = temp;
800179c: 4a0e ldr r2, [pc, #56] ; (80017d8 <HAL_GPIO_Init+0x300>)
800179e: 69bb ldr r3, [r7, #24]
80017a0: 60d3 str r3, [r2, #12]
for(position = 0U; position < GPIO_NUMBER; position++)
80017a2: 69fb ldr r3, [r7, #28]
80017a4: 3301 adds r3, #1
80017a6: 61fb str r3, [r7, #28]
80017a8: 69fb ldr r3, [r7, #28]
80017aa: 2b0f cmp r3, #15
80017ac: f67f aea2 bls.w 80014f4 <HAL_GPIO_Init+0x1c>
}
}
}
}
80017b0: bf00 nop
80017b2: 3724 adds r7, #36 ; 0x24
80017b4: 46bd mov sp, r7
80017b6: f85d 7b04 ldr.w r7, [sp], #4
80017ba: 4770 bx lr
80017bc: 40023800 .word 0x40023800
80017c0: 40013800 .word 0x40013800
80017c4: 40020000 .word 0x40020000
80017c8: 40020400 .word 0x40020400
80017cc: 40020800 .word 0x40020800
80017d0: 40020c00 .word 0x40020c00
80017d4: 40021000 .word 0x40021000
80017d8: 40013c00 .word 0x40013c00
080017dc <HAL_GPIO_WritePin>:
* @arg GPIO_PIN_RESET: to clear the port pin
* @arg GPIO_PIN_SET: to set the port pin
* @retval None
*/
void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
{
80017dc: b480 push {r7}
80017de: b083 sub sp, #12
80017e0: af00 add r7, sp, #0
80017e2: 6078 str r0, [r7, #4]
80017e4: 460b mov r3, r1
80017e6: 807b strh r3, [r7, #2]
80017e8: 4613 mov r3, r2
80017ea: 707b strb r3, [r7, #1]
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
assert_param(IS_GPIO_PIN_ACTION(PinState));
if(PinState != GPIO_PIN_RESET)
80017ec: 787b ldrb r3, [r7, #1]
80017ee: 2b00 cmp r3, #0
80017f0: d003 beq.n 80017fa <HAL_GPIO_WritePin+0x1e>
{
GPIOx->BSRR = GPIO_Pin;
80017f2: 887a ldrh r2, [r7, #2]
80017f4: 687b ldr r3, [r7, #4]
80017f6: 619a str r2, [r3, #24]
}
else
{
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U;
}
}
80017f8: e003 b.n 8001802 <HAL_GPIO_WritePin+0x26>
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U;
80017fa: 887b ldrh r3, [r7, #2]
80017fc: 041a lsls r2, r3, #16
80017fe: 687b ldr r3, [r7, #4]
8001800: 619a str r2, [r3, #24]
}
8001802: bf00 nop
8001804: 370c adds r7, #12
8001806: 46bd mov sp, r7
8001808: f85d 7b04 ldr.w r7, [sp], #4
800180c: 4770 bx lr
0800180e <HAL_GPIO_TogglePin>:
* x can be (A..I) to select the GPIO peripheral for STM32F40XX and STM32F427X devices.
* @param GPIO_Pin Specifies the pins to be toggled.
* @retval None
*/
void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
{
800180e: b480 push {r7}
8001810: b083 sub sp, #12
8001812: af00 add r7, sp, #0
8001814: 6078 str r0, [r7, #4]
8001816: 460b mov r3, r1
8001818: 807b strh r3, [r7, #2]
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
if ((GPIOx->ODR & GPIO_Pin) == GPIO_Pin)
800181a: 687b ldr r3, [r7, #4]
800181c: 695a ldr r2, [r3, #20]
800181e: 887b ldrh r3, [r7, #2]
8001820: 401a ands r2, r3
8001822: 887b ldrh r3, [r7, #2]
8001824: 429a cmp r2, r3
8001826: d104 bne.n 8001832 <HAL_GPIO_TogglePin+0x24>
{
GPIOx->BSRR = (uint32_t)GPIO_Pin << GPIO_NUMBER;
8001828: 887b ldrh r3, [r7, #2]
800182a: 041a lsls r2, r3, #16
800182c: 687b ldr r3, [r7, #4]
800182e: 619a str r2, [r3, #24]
}
else
{
GPIOx->BSRR = GPIO_Pin;
}
}
8001830: e002 b.n 8001838 <HAL_GPIO_TogglePin+0x2a>
GPIOx->BSRR = GPIO_Pin;
8001832: 887a ldrh r2, [r7, #2]
8001834: 687b ldr r3, [r7, #4]
8001836: 619a str r2, [r3, #24]
}
8001838: bf00 nop
800183a: 370c adds r7, #12
800183c: 46bd mov sp, r7
800183e: f85d 7b04 ldr.w r7, [sp], #4
8001842: 4770 bx lr
08001844 <HAL_HCD_Init>:
* @brief Initialize the host driver.
* @param hhcd HCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_HCD_Init(HCD_HandleTypeDef *hhcd)
{
8001844: b5f0 push {r4, r5, r6, r7, lr}
8001846: b08f sub sp, #60 ; 0x3c
8001848: af0a add r7, sp, #40 ; 0x28
800184a: 6078 str r0, [r7, #4]
USB_OTG_GlobalTypeDef *USBx;
/* Check the HCD handle allocation */
if (hhcd == NULL)
800184c: 687b ldr r3, [r7, #4]
800184e: 2b00 cmp r3, #0
8001850: d101 bne.n 8001856 <HAL_HCD_Init+0x12>
{
return HAL_ERROR;
8001852: 2301 movs r3, #1
8001854: e054 b.n 8001900 <HAL_HCD_Init+0xbc>
}
/* Check the parameters */
assert_param(IS_HCD_ALL_INSTANCE(hhcd->Instance));
USBx = hhcd->Instance;
8001856: 687b ldr r3, [r7, #4]
8001858: 681b ldr r3, [r3, #0]
800185a: 60fb str r3, [r7, #12]
if (hhcd->State == HAL_HCD_STATE_RESET)
800185c: 687b ldr r3, [r7, #4]
800185e: f893 32b9 ldrb.w r3, [r3, #697] ; 0x2b9
8001862: b2db uxtb r3, r3
8001864: 2b00 cmp r3, #0
8001866: d106 bne.n 8001876 <HAL_HCD_Init+0x32>
{
/* Allocate lock resource and initialize it */
hhcd->Lock = HAL_UNLOCKED;
8001868: 687b ldr r3, [r7, #4]
800186a: 2200 movs r2, #0
800186c: f883 22b8 strb.w r2, [r3, #696] ; 0x2b8
/* Init the low level hardware */
hhcd->MspInitCallback(hhcd);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
HAL_HCD_MspInit(hhcd);
8001870: 6878 ldr r0, [r7, #4]
8001872: f007 fa63 bl 8008d3c <HAL_HCD_MspInit>
#endif /* (USE_HAL_HCD_REGISTER_CALLBACKS) */
}
hhcd->State = HAL_HCD_STATE_BUSY;
8001876: 687b ldr r3, [r7, #4]
8001878: 2203 movs r2, #3
800187a: f883 22b9 strb.w r2, [r3, #697] ; 0x2b9
/* Disable DMA mode for FS instance */
if ((USBx->CID & (0x1U << 8)) == 0U)
800187e: 68fb ldr r3, [r7, #12]
8001880: 6bdb ldr r3, [r3, #60] ; 0x3c
8001882: f403 7380 and.w r3, r3, #256 ; 0x100
8001886: 2b00 cmp r3, #0
8001888: d102 bne.n 8001890 <HAL_HCD_Init+0x4c>
{
hhcd->Init.dma_enable = 0U;
800188a: 687b ldr r3, [r7, #4]
800188c: 2200 movs r2, #0
800188e: 611a str r2, [r3, #16]
}
/* Disable the Interrupts */
__HAL_HCD_DISABLE(hhcd);
8001890: 687b ldr r3, [r7, #4]
8001892: 681b ldr r3, [r3, #0]
8001894: 4618 mov r0, r3
8001896: f004 fc1f bl 80060d8 <USB_DisableGlobalInt>
/* Init the Core (common init.) */
(void)USB_CoreInit(hhcd->Instance, hhcd->Init);
800189a: 687b ldr r3, [r7, #4]
800189c: 681b ldr r3, [r3, #0]
800189e: 603b str r3, [r7, #0]
80018a0: 687e ldr r6, [r7, #4]
80018a2: 466d mov r5, sp
80018a4: f106 0410 add.w r4, r6, #16
80018a8: cc0f ldmia r4!, {r0, r1, r2, r3}
80018aa: c50f stmia r5!, {r0, r1, r2, r3}
80018ac: cc0f ldmia r4!, {r0, r1, r2, r3}
80018ae: c50f stmia r5!, {r0, r1, r2, r3}
80018b0: e894 0003 ldmia.w r4, {r0, r1}
80018b4: e885 0003 stmia.w r5, {r0, r1}
80018b8: 1d33 adds r3, r6, #4
80018ba: cb0e ldmia r3, {r1, r2, r3}
80018bc: 6838 ldr r0, [r7, #0]
80018be: f004 fb99 bl 8005ff4 <USB_CoreInit>
/* Force Host Mode*/
(void)USB_SetCurrentMode(hhcd->Instance, USB_HOST_MODE);
80018c2: 687b ldr r3, [r7, #4]
80018c4: 681b ldr r3, [r3, #0]
80018c6: 2101 movs r1, #1
80018c8: 4618 mov r0, r3
80018ca: f004 fc16 bl 80060fa <USB_SetCurrentMode>
/* Init Host */
(void)USB_HostInit(hhcd->Instance, hhcd->Init);
80018ce: 687b ldr r3, [r7, #4]
80018d0: 681b ldr r3, [r3, #0]
80018d2: 603b str r3, [r7, #0]
80018d4: 687e ldr r6, [r7, #4]
80018d6: 466d mov r5, sp
80018d8: f106 0410 add.w r4, r6, #16
80018dc: cc0f ldmia r4!, {r0, r1, r2, r3}
80018de: c50f stmia r5!, {r0, r1, r2, r3}
80018e0: cc0f ldmia r4!, {r0, r1, r2, r3}
80018e2: c50f stmia r5!, {r0, r1, r2, r3}
80018e4: e894 0003 ldmia.w r4, {r0, r1}
80018e8: e885 0003 stmia.w r5, {r0, r1}
80018ec: 1d33 adds r3, r6, #4
80018ee: cb0e ldmia r3, {r1, r2, r3}
80018f0: 6838 ldr r0, [r7, #0]
80018f2: f004 fd29 bl 8006348 <USB_HostInit>
hhcd->State = HAL_HCD_STATE_READY;
80018f6: 687b ldr r3, [r7, #4]
80018f8: 2201 movs r2, #1
80018fa: f883 22b9 strb.w r2, [r3, #697] ; 0x2b9
return HAL_OK;
80018fe: 2300 movs r3, #0
}
8001900: 4618 mov r0, r3
8001902: 3714 adds r7, #20
8001904: 46bd mov sp, r7
8001906: bdf0 pop {r4, r5, r6, r7, pc}
08001908 <HAL_HCD_HC_Init>:
uint8_t epnum,
uint8_t dev_address,
uint8_t speed,
uint8_t ep_type,
uint16_t mps)
{
8001908: b590 push {r4, r7, lr}
800190a: b089 sub sp, #36 ; 0x24
800190c: af04 add r7, sp, #16
800190e: 6078 str r0, [r7, #4]
8001910: 4608 mov r0, r1
8001912: 4611 mov r1, r2
8001914: 461a mov r2, r3
8001916: 4603 mov r3, r0
8001918: 70fb strb r3, [r7, #3]
800191a: 460b mov r3, r1
800191c: 70bb strb r3, [r7, #2]
800191e: 4613 mov r3, r2
8001920: 707b strb r3, [r7, #1]
HAL_StatusTypeDef status;
__HAL_LOCK(hhcd);
8001922: 687b ldr r3, [r7, #4]
8001924: f893 32b8 ldrb.w r3, [r3, #696] ; 0x2b8
8001928: 2b01 cmp r3, #1
800192a: d101 bne.n 8001930 <HAL_HCD_HC_Init+0x28>
800192c: 2302 movs r3, #2
800192e: e07f b.n 8001a30 <HAL_HCD_HC_Init+0x128>
8001930: 687b ldr r3, [r7, #4]
8001932: 2201 movs r2, #1
8001934: f883 22b8 strb.w r2, [r3, #696] ; 0x2b8
hhcd->hc[ch_num].do_ping = 0U;
8001938: 78fa ldrb r2, [r7, #3]
800193a: 6879 ldr r1, [r7, #4]
800193c: 4613 mov r3, r2
800193e: 009b lsls r3, r3, #2
8001940: 4413 add r3, r2
8001942: 00db lsls r3, r3, #3
8001944: 440b add r3, r1
8001946: 333d adds r3, #61 ; 0x3d
8001948: 2200 movs r2, #0
800194a: 701a strb r2, [r3, #0]
hhcd->hc[ch_num].dev_addr = dev_address;
800194c: 78fa ldrb r2, [r7, #3]
800194e: 6879 ldr r1, [r7, #4]
8001950: 4613 mov r3, r2
8001952: 009b lsls r3, r3, #2
8001954: 4413 add r3, r2
8001956: 00db lsls r3, r3, #3
8001958: 440b add r3, r1
800195a: 3338 adds r3, #56 ; 0x38
800195c: 787a ldrb r2, [r7, #1]
800195e: 701a strb r2, [r3, #0]
hhcd->hc[ch_num].max_packet = mps;
8001960: 78fa ldrb r2, [r7, #3]
8001962: 6879 ldr r1, [r7, #4]
8001964: 4613 mov r3, r2
8001966: 009b lsls r3, r3, #2
8001968: 4413 add r3, r2
800196a: 00db lsls r3, r3, #3
800196c: 440b add r3, r1
800196e: 3340 adds r3, #64 ; 0x40
8001970: 8d3a ldrh r2, [r7, #40] ; 0x28
8001972: 801a strh r2, [r3, #0]
hhcd->hc[ch_num].ch_num = ch_num;
8001974: 78fa ldrb r2, [r7, #3]
8001976: 6879 ldr r1, [r7, #4]
8001978: 4613 mov r3, r2
800197a: 009b lsls r3, r3, #2
800197c: 4413 add r3, r2
800197e: 00db lsls r3, r3, #3
8001980: 440b add r3, r1
8001982: 3339 adds r3, #57 ; 0x39
8001984: 78fa ldrb r2, [r7, #3]
8001986: 701a strb r2, [r3, #0]
hhcd->hc[ch_num].ep_type = ep_type;
8001988: 78fa ldrb r2, [r7, #3]
800198a: 6879 ldr r1, [r7, #4]
800198c: 4613 mov r3, r2
800198e: 009b lsls r3, r3, #2
8001990: 4413 add r3, r2
8001992: 00db lsls r3, r3, #3
8001994: 440b add r3, r1
8001996: 333f adds r3, #63 ; 0x3f
8001998: f897 2024 ldrb.w r2, [r7, #36] ; 0x24
800199c: 701a strb r2, [r3, #0]
hhcd->hc[ch_num].ep_num = epnum & 0x7FU;
800199e: 78fa ldrb r2, [r7, #3]
80019a0: 78bb ldrb r3, [r7, #2]
80019a2: f003 037f and.w r3, r3, #127 ; 0x7f
80019a6: b2d8 uxtb r0, r3
80019a8: 6879 ldr r1, [r7, #4]
80019aa: 4613 mov r3, r2
80019ac: 009b lsls r3, r3, #2
80019ae: 4413 add r3, r2
80019b0: 00db lsls r3, r3, #3
80019b2: 440b add r3, r1
80019b4: 333a adds r3, #58 ; 0x3a
80019b6: 4602 mov r2, r0
80019b8: 701a strb r2, [r3, #0]
if ((epnum & 0x80U) == 0x80U)
80019ba: f997 3002 ldrsb.w r3, [r7, #2]
80019be: 2b00 cmp r3, #0
80019c0: da0a bge.n 80019d8 <HAL_HCD_HC_Init+0xd0>
{
hhcd->hc[ch_num].ep_is_in = 1U;
80019c2: 78fa ldrb r2, [r7, #3]
80019c4: 6879 ldr r1, [r7, #4]
80019c6: 4613 mov r3, r2
80019c8: 009b lsls r3, r3, #2
80019ca: 4413 add r3, r2
80019cc: 00db lsls r3, r3, #3
80019ce: 440b add r3, r1
80019d0: 333b adds r3, #59 ; 0x3b
80019d2: 2201 movs r2, #1
80019d4: 701a strb r2, [r3, #0]
80019d6: e009 b.n 80019ec <HAL_HCD_HC_Init+0xe4>
}
else
{
hhcd->hc[ch_num].ep_is_in = 0U;
80019d8: 78fa ldrb r2, [r7, #3]
80019da: 6879 ldr r1, [r7, #4]
80019dc: 4613 mov r3, r2
80019de: 009b lsls r3, r3, #2
80019e0: 4413 add r3, r2
80019e2: 00db lsls r3, r3, #3
80019e4: 440b add r3, r1
80019e6: 333b adds r3, #59 ; 0x3b
80019e8: 2200 movs r2, #0
80019ea: 701a strb r2, [r3, #0]
}
hhcd->hc[ch_num].speed = speed;
80019ec: 78fa ldrb r2, [r7, #3]
80019ee: 6879 ldr r1, [r7, #4]
80019f0: 4613 mov r3, r2
80019f2: 009b lsls r3, r3, #2
80019f4: 4413 add r3, r2
80019f6: 00db lsls r3, r3, #3
80019f8: 440b add r3, r1
80019fa: 333c adds r3, #60 ; 0x3c
80019fc: f897 2020 ldrb.w r2, [r7, #32]
8001a00: 701a strb r2, [r3, #0]
status = USB_HC_Init(hhcd->Instance,
8001a02: 687b ldr r3, [r7, #4]
8001a04: 6818 ldr r0, [r3, #0]
8001a06: 787c ldrb r4, [r7, #1]
8001a08: 78ba ldrb r2, [r7, #2]
8001a0a: 78f9 ldrb r1, [r7, #3]
8001a0c: 8d3b ldrh r3, [r7, #40] ; 0x28
8001a0e: 9302 str r3, [sp, #8]
8001a10: f897 3024 ldrb.w r3, [r7, #36] ; 0x24
8001a14: 9301 str r3, [sp, #4]
8001a16: f897 3020 ldrb.w r3, [r7, #32]
8001a1a: 9300 str r3, [sp, #0]
8001a1c: 4623 mov r3, r4
8001a1e: f004 fe15 bl 800664c <USB_HC_Init>
8001a22: 4603 mov r3, r0
8001a24: 73fb strb r3, [r7, #15]
epnum,
dev_address,
speed,
ep_type,
mps);
__HAL_UNLOCK(hhcd);
8001a26: 687b ldr r3, [r7, #4]
8001a28: 2200 movs r2, #0
8001a2a: f883 22b8 strb.w r2, [r3, #696] ; 0x2b8
return status;
8001a2e: 7bfb ldrb r3, [r7, #15]
}
8001a30: 4618 mov r0, r3
8001a32: 3714 adds r7, #20
8001a34: 46bd mov sp, r7
8001a36: bd90 pop {r4, r7, pc}
08001a38 <HAL_HCD_HC_Halt>:
* @param ch_num Channel number.
* This parameter can be a value from 1 to 15
* @retval HAL status
*/
HAL_StatusTypeDef HAL_HCD_HC_Halt(HCD_HandleTypeDef *hhcd, uint8_t ch_num)
{
8001a38: b580 push {r7, lr}
8001a3a: b084 sub sp, #16
8001a3c: af00 add r7, sp, #0
8001a3e: 6078 str r0, [r7, #4]
8001a40: 460b mov r3, r1
8001a42: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef status = HAL_OK;
8001a44: 2300 movs r3, #0
8001a46: 73fb strb r3, [r7, #15]
__HAL_LOCK(hhcd);
8001a48: 687b ldr r3, [r7, #4]
8001a4a: f893 32b8 ldrb.w r3, [r3, #696] ; 0x2b8
8001a4e: 2b01 cmp r3, #1
8001a50: d101 bne.n 8001a56 <HAL_HCD_HC_Halt+0x1e>
8001a52: 2302 movs r3, #2
8001a54: e00f b.n 8001a76 <HAL_HCD_HC_Halt+0x3e>
8001a56: 687b ldr r3, [r7, #4]
8001a58: 2201 movs r2, #1
8001a5a: f883 22b8 strb.w r2, [r3, #696] ; 0x2b8
(void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
8001a5e: 687b ldr r3, [r7, #4]
8001a60: 681b ldr r3, [r3, #0]
8001a62: 78fa ldrb r2, [r7, #3]
8001a64: 4611 mov r1, r2
8001a66: 4618 mov r0, r3
8001a68: f005 f851 bl 8006b0e <USB_HC_Halt>
__HAL_UNLOCK(hhcd);
8001a6c: 687b ldr r3, [r7, #4]
8001a6e: 2200 movs r2, #0
8001a70: f883 22b8 strb.w r2, [r3, #696] ; 0x2b8
return status;
8001a74: 7bfb ldrb r3, [r7, #15]
}
8001a76: 4618 mov r0, r3
8001a78: 3710 adds r7, #16
8001a7a: 46bd mov sp, r7
8001a7c: bd80 pop {r7, pc}
...
08001a80 <HAL_HCD_HC_SubmitRequest>:
uint8_t ep_type,
uint8_t token,
uint8_t *pbuff,
uint16_t length,
uint8_t do_ping)
{
8001a80: b580 push {r7, lr}
8001a82: b082 sub sp, #8
8001a84: af00 add r7, sp, #0
8001a86: 6078 str r0, [r7, #4]
8001a88: 4608 mov r0, r1
8001a8a: 4611 mov r1, r2
8001a8c: 461a mov r2, r3
8001a8e: 4603 mov r3, r0
8001a90: 70fb strb r3, [r7, #3]
8001a92: 460b mov r3, r1
8001a94: 70bb strb r3, [r7, #2]
8001a96: 4613 mov r3, r2
8001a98: 707b strb r3, [r7, #1]
hhcd->hc[ch_num].ep_is_in = direction;
8001a9a: 78fa ldrb r2, [r7, #3]
8001a9c: 6879 ldr r1, [r7, #4]
8001a9e: 4613 mov r3, r2
8001aa0: 009b lsls r3, r3, #2
8001aa2: 4413 add r3, r2
8001aa4: 00db lsls r3, r3, #3
8001aa6: 440b add r3, r1
8001aa8: 333b adds r3, #59 ; 0x3b
8001aaa: 78ba ldrb r2, [r7, #2]
8001aac: 701a strb r2, [r3, #0]
hhcd->hc[ch_num].ep_type = ep_type;
8001aae: 78fa ldrb r2, [r7, #3]
8001ab0: 6879 ldr r1, [r7, #4]
8001ab2: 4613 mov r3, r2
8001ab4: 009b lsls r3, r3, #2
8001ab6: 4413 add r3, r2
8001ab8: 00db lsls r3, r3, #3
8001aba: 440b add r3, r1
8001abc: 333f adds r3, #63 ; 0x3f
8001abe: 787a ldrb r2, [r7, #1]
8001ac0: 701a strb r2, [r3, #0]
if (token == 0U)
8001ac2: 7c3b ldrb r3, [r7, #16]
8001ac4: 2b00 cmp r3, #0
8001ac6: d114 bne.n 8001af2 <HAL_HCD_HC_SubmitRequest+0x72>
{
hhcd->hc[ch_num].data_pid = HC_PID_SETUP;
8001ac8: 78fa ldrb r2, [r7, #3]
8001aca: 6879 ldr r1, [r7, #4]
8001acc: 4613 mov r3, r2
8001ace: 009b lsls r3, r3, #2
8001ad0: 4413 add r3, r2
8001ad2: 00db lsls r3, r3, #3
8001ad4: 440b add r3, r1
8001ad6: 3342 adds r3, #66 ; 0x42
8001ad8: 2203 movs r2, #3
8001ada: 701a strb r2, [r3, #0]
hhcd->hc[ch_num].do_ping = do_ping;
8001adc: 78fa ldrb r2, [r7, #3]
8001ade: 6879 ldr r1, [r7, #4]
8001ae0: 4613 mov r3, r2
8001ae2: 009b lsls r3, r3, #2
8001ae4: 4413 add r3, r2
8001ae6: 00db lsls r3, r3, #3
8001ae8: 440b add r3, r1
8001aea: 333d adds r3, #61 ; 0x3d
8001aec: 7f3a ldrb r2, [r7, #28]
8001aee: 701a strb r2, [r3, #0]
8001af0: e009 b.n 8001b06 <HAL_HCD_HC_SubmitRequest+0x86>
}
else
{
hhcd->hc[ch_num].data_pid = HC_PID_DATA1;
8001af2: 78fa ldrb r2, [r7, #3]
8001af4: 6879 ldr r1, [r7, #4]
8001af6: 4613 mov r3, r2
8001af8: 009b lsls r3, r3, #2
8001afa: 4413 add r3, r2
8001afc: 00db lsls r3, r3, #3
8001afe: 440b add r3, r1
8001b00: 3342 adds r3, #66 ; 0x42
8001b02: 2202 movs r2, #2
8001b04: 701a strb r2, [r3, #0]
}
/* Manage Data Toggle */
switch (ep_type)
8001b06: 787b ldrb r3, [r7, #1]
8001b08: 2b03 cmp r3, #3
8001b0a: f200 80d6 bhi.w 8001cba <HAL_HCD_HC_SubmitRequest+0x23a>
8001b0e: a201 add r2, pc, #4 ; (adr r2, 8001b14 <HAL_HCD_HC_SubmitRequest+0x94>)
8001b10: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8001b14: 08001b25 .word 0x08001b25
8001b18: 08001ca5 .word 0x08001ca5
8001b1c: 08001b91 .word 0x08001b91
8001b20: 08001c1b .word 0x08001c1b
{
case EP_TYPE_CTRL:
if ((token == 1U) && (direction == 0U)) /*send data */
8001b24: 7c3b ldrb r3, [r7, #16]
8001b26: 2b01 cmp r3, #1
8001b28: f040 80c9 bne.w 8001cbe <HAL_HCD_HC_SubmitRequest+0x23e>
8001b2c: 78bb ldrb r3, [r7, #2]
8001b2e: 2b00 cmp r3, #0
8001b30: f040 80c5 bne.w 8001cbe <HAL_HCD_HC_SubmitRequest+0x23e>
{
if (length == 0U)
8001b34: 8b3b ldrh r3, [r7, #24]
8001b36: 2b00 cmp r3, #0
8001b38: d109 bne.n 8001b4e <HAL_HCD_HC_SubmitRequest+0xce>
{
/* For Status OUT stage, Length==0, Status Out PID = 1 */
hhcd->hc[ch_num].toggle_out = 1U;
8001b3a: 78fa ldrb r2, [r7, #3]
8001b3c: 6879 ldr r1, [r7, #4]
8001b3e: 4613 mov r3, r2
8001b40: 009b lsls r3, r3, #2
8001b42: 4413 add r3, r2
8001b44: 00db lsls r3, r3, #3
8001b46: 440b add r3, r1
8001b48: 3351 adds r3, #81 ; 0x51
8001b4a: 2201 movs r2, #1
8001b4c: 701a strb r2, [r3, #0]
}
/* Set the Data Toggle bit as per the Flag */
if (hhcd->hc[ch_num].toggle_out == 0U)
8001b4e: 78fa ldrb r2, [r7, #3]
8001b50: 6879 ldr r1, [r7, #4]
8001b52: 4613 mov r3, r2
8001b54: 009b lsls r3, r3, #2
8001b56: 4413 add r3, r2
8001b58: 00db lsls r3, r3, #3
8001b5a: 440b add r3, r1
8001b5c: 3351 adds r3, #81 ; 0x51
8001b5e: 781b ldrb r3, [r3, #0]
8001b60: 2b00 cmp r3, #0
8001b62: d10a bne.n 8001b7a <HAL_HCD_HC_SubmitRequest+0xfa>
{
/* Put the PID 0 */
hhcd->hc[ch_num].data_pid = HC_PID_DATA0;
8001b64: 78fa ldrb r2, [r7, #3]
8001b66: 6879 ldr r1, [r7, #4]
8001b68: 4613 mov r3, r2
8001b6a: 009b lsls r3, r3, #2
8001b6c: 4413 add r3, r2
8001b6e: 00db lsls r3, r3, #3
8001b70: 440b add r3, r1
8001b72: 3342 adds r3, #66 ; 0x42
8001b74: 2200 movs r2, #0
8001b76: 701a strb r2, [r3, #0]
{
/* Put the PID 1 */
hhcd->hc[ch_num].data_pid = HC_PID_DATA1;
}
}
break;
8001b78: e0a1 b.n 8001cbe <HAL_HCD_HC_SubmitRequest+0x23e>
hhcd->hc[ch_num].data_pid = HC_PID_DATA1;
8001b7a: 78fa ldrb r2, [r7, #3]
8001b7c: 6879 ldr r1, [r7, #4]
8001b7e: 4613 mov r3, r2
8001b80: 009b lsls r3, r3, #2
8001b82: 4413 add r3, r2
8001b84: 00db lsls r3, r3, #3
8001b86: 440b add r3, r1
8001b88: 3342 adds r3, #66 ; 0x42
8001b8a: 2202 movs r2, #2
8001b8c: 701a strb r2, [r3, #0]
break;
8001b8e: e096 b.n 8001cbe <HAL_HCD_HC_SubmitRequest+0x23e>
case EP_TYPE_BULK:
if (direction == 0U)
8001b90: 78bb ldrb r3, [r7, #2]
8001b92: 2b00 cmp r3, #0
8001b94: d120 bne.n 8001bd8 <HAL_HCD_HC_SubmitRequest+0x158>
{
/* Set the Data Toggle bit as per the Flag */
if (hhcd->hc[ch_num].toggle_out == 0U)
8001b96: 78fa ldrb r2, [r7, #3]
8001b98: 6879 ldr r1, [r7, #4]
8001b9a: 4613 mov r3, r2
8001b9c: 009b lsls r3, r3, #2
8001b9e: 4413 add r3, r2
8001ba0: 00db lsls r3, r3, #3
8001ba2: 440b add r3, r1
8001ba4: 3351 adds r3, #81 ; 0x51
8001ba6: 781b ldrb r3, [r3, #0]
8001ba8: 2b00 cmp r3, #0
8001baa: d10a bne.n 8001bc2 <HAL_HCD_HC_SubmitRequest+0x142>
{
/* Put the PID 0 */
hhcd->hc[ch_num].data_pid = HC_PID_DATA0;
8001bac: 78fa ldrb r2, [r7, #3]
8001bae: 6879 ldr r1, [r7, #4]
8001bb0: 4613 mov r3, r2
8001bb2: 009b lsls r3, r3, #2
8001bb4: 4413 add r3, r2
8001bb6: 00db lsls r3, r3, #3
8001bb8: 440b add r3, r1
8001bba: 3342 adds r3, #66 ; 0x42
8001bbc: 2200 movs r2, #0
8001bbe: 701a strb r2, [r3, #0]
{
hhcd->hc[ch_num].data_pid = HC_PID_DATA1;
}
}
break;
8001bc0: e07e b.n 8001cc0 <HAL_HCD_HC_SubmitRequest+0x240>
hhcd->hc[ch_num].data_pid = HC_PID_DATA1;
8001bc2: 78fa ldrb r2, [r7, #3]
8001bc4: 6879 ldr r1, [r7, #4]
8001bc6: 4613 mov r3, r2
8001bc8: 009b lsls r3, r3, #2
8001bca: 4413 add r3, r2
8001bcc: 00db lsls r3, r3, #3
8001bce: 440b add r3, r1
8001bd0: 3342 adds r3, #66 ; 0x42
8001bd2: 2202 movs r2, #2
8001bd4: 701a strb r2, [r3, #0]
break;
8001bd6: e073 b.n 8001cc0 <HAL_HCD_HC_SubmitRequest+0x240>
if (hhcd->hc[ch_num].toggle_in == 0U)
8001bd8: 78fa ldrb r2, [r7, #3]
8001bda: 6879 ldr r1, [r7, #4]
8001bdc: 4613 mov r3, r2
8001bde: 009b lsls r3, r3, #2
8001be0: 4413 add r3, r2
8001be2: 00db lsls r3, r3, #3
8001be4: 440b add r3, r1
8001be6: 3350 adds r3, #80 ; 0x50
8001be8: 781b ldrb r3, [r3, #0]
8001bea: 2b00 cmp r3, #0
8001bec: d10a bne.n 8001c04 <HAL_HCD_HC_SubmitRequest+0x184>
hhcd->hc[ch_num].data_pid = HC_PID_DATA0;
8001bee: 78fa ldrb r2, [r7, #3]
8001bf0: 6879 ldr r1, [r7, #4]
8001bf2: 4613 mov r3, r2
8001bf4: 009b lsls r3, r3, #2
8001bf6: 4413 add r3, r2
8001bf8: 00db lsls r3, r3, #3
8001bfa: 440b add r3, r1
8001bfc: 3342 adds r3, #66 ; 0x42
8001bfe: 2200 movs r2, #0
8001c00: 701a strb r2, [r3, #0]
break;
8001c02: e05d b.n 8001cc0 <HAL_HCD_HC_SubmitRequest+0x240>
hhcd->hc[ch_num].data_pid = HC_PID_DATA1;
8001c04: 78fa ldrb r2, [r7, #3]
8001c06: 6879 ldr r1, [r7, #4]
8001c08: 4613 mov r3, r2
8001c0a: 009b lsls r3, r3, #2
8001c0c: 4413 add r3, r2
8001c0e: 00db lsls r3, r3, #3
8001c10: 440b add r3, r1
8001c12: 3342 adds r3, #66 ; 0x42
8001c14: 2202 movs r2, #2
8001c16: 701a strb r2, [r3, #0]
break;
8001c18: e052 b.n 8001cc0 <HAL_HCD_HC_SubmitRequest+0x240>
case EP_TYPE_INTR:
if (direction == 0U)
8001c1a: 78bb ldrb r3, [r7, #2]
8001c1c: 2b00 cmp r3, #0
8001c1e: d120 bne.n 8001c62 <HAL_HCD_HC_SubmitRequest+0x1e2>
{
/* Set the Data Toggle bit as per the Flag */
if (hhcd->hc[ch_num].toggle_out == 0U)
8001c20: 78fa ldrb r2, [r7, #3]
8001c22: 6879 ldr r1, [r7, #4]
8001c24: 4613 mov r3, r2
8001c26: 009b lsls r3, r3, #2
8001c28: 4413 add r3, r2
8001c2a: 00db lsls r3, r3, #3
8001c2c: 440b add r3, r1
8001c2e: 3351 adds r3, #81 ; 0x51
8001c30: 781b ldrb r3, [r3, #0]
8001c32: 2b00 cmp r3, #0
8001c34: d10a bne.n 8001c4c <HAL_HCD_HC_SubmitRequest+0x1cc>
{
/* Put the PID 0 */
hhcd->hc[ch_num].data_pid = HC_PID_DATA0;
8001c36: 78fa ldrb r2, [r7, #3]
8001c38: 6879 ldr r1, [r7, #4]
8001c3a: 4613 mov r3, r2
8001c3c: 009b lsls r3, r3, #2
8001c3e: 4413 add r3, r2
8001c40: 00db lsls r3, r3, #3
8001c42: 440b add r3, r1
8001c44: 3342 adds r3, #66 ; 0x42
8001c46: 2200 movs r2, #0
8001c48: 701a strb r2, [r3, #0]
else
{
hhcd->hc[ch_num].data_pid = HC_PID_DATA1;
}
}
break;
8001c4a: e039 b.n 8001cc0 <HAL_HCD_HC_SubmitRequest+0x240>
hhcd->hc[ch_num].data_pid = HC_PID_DATA1;
8001c4c: 78fa ldrb r2, [r7, #3]
8001c4e: 6879 ldr r1, [r7, #4]
8001c50: 4613 mov r3, r2
8001c52: 009b lsls r3, r3, #2
8001c54: 4413 add r3, r2
8001c56: 00db lsls r3, r3, #3
8001c58: 440b add r3, r1
8001c5a: 3342 adds r3, #66 ; 0x42
8001c5c: 2202 movs r2, #2
8001c5e: 701a strb r2, [r3, #0]
break;
8001c60: e02e b.n 8001cc0 <HAL_HCD_HC_SubmitRequest+0x240>
if (hhcd->hc[ch_num].toggle_in == 0U)
8001c62: 78fa ldrb r2, [r7, #3]
8001c64: 6879 ldr r1, [r7, #4]
8001c66: 4613 mov r3, r2
8001c68: 009b lsls r3, r3, #2
8001c6a: 4413 add r3, r2
8001c6c: 00db lsls r3, r3, #3
8001c6e: 440b add r3, r1
8001c70: 3350 adds r3, #80 ; 0x50
8001c72: 781b ldrb r3, [r3, #0]
8001c74: 2b00 cmp r3, #0
8001c76: d10a bne.n 8001c8e <HAL_HCD_HC_SubmitRequest+0x20e>
hhcd->hc[ch_num].data_pid = HC_PID_DATA0;
8001c78: 78fa ldrb r2, [r7, #3]
8001c7a: 6879 ldr r1, [r7, #4]
8001c7c: 4613 mov r3, r2
8001c7e: 009b lsls r3, r3, #2
8001c80: 4413 add r3, r2
8001c82: 00db lsls r3, r3, #3
8001c84: 440b add r3, r1
8001c86: 3342 adds r3, #66 ; 0x42
8001c88: 2200 movs r2, #0
8001c8a: 701a strb r2, [r3, #0]
break;
8001c8c: e018 b.n 8001cc0 <HAL_HCD_HC_SubmitRequest+0x240>
hhcd->hc[ch_num].data_pid = HC_PID_DATA1;
8001c8e: 78fa ldrb r2, [r7, #3]
8001c90: 6879 ldr r1, [r7, #4]
8001c92: 4613 mov r3, r2
8001c94: 009b lsls r3, r3, #2
8001c96: 4413 add r3, r2
8001c98: 00db lsls r3, r3, #3
8001c9a: 440b add r3, r1
8001c9c: 3342 adds r3, #66 ; 0x42
8001c9e: 2202 movs r2, #2
8001ca0: 701a strb r2, [r3, #0]
break;
8001ca2: e00d b.n 8001cc0 <HAL_HCD_HC_SubmitRequest+0x240>
case EP_TYPE_ISOC:
hhcd->hc[ch_num].data_pid = HC_PID_DATA0;
8001ca4: 78fa ldrb r2, [r7, #3]
8001ca6: 6879 ldr r1, [r7, #4]
8001ca8: 4613 mov r3, r2
8001caa: 009b lsls r3, r3, #2
8001cac: 4413 add r3, r2
8001cae: 00db lsls r3, r3, #3
8001cb0: 440b add r3, r1
8001cb2: 3342 adds r3, #66 ; 0x42
8001cb4: 2200 movs r2, #0
8001cb6: 701a strb r2, [r3, #0]
break;
8001cb8: e002 b.n 8001cc0 <HAL_HCD_HC_SubmitRequest+0x240>
default:
break;
8001cba: bf00 nop
8001cbc: e000 b.n 8001cc0 <HAL_HCD_HC_SubmitRequest+0x240>
break;
8001cbe: bf00 nop
}
hhcd->hc[ch_num].xfer_buff = pbuff;
8001cc0: 78fa ldrb r2, [r7, #3]
8001cc2: 6879 ldr r1, [r7, #4]
8001cc4: 4613 mov r3, r2
8001cc6: 009b lsls r3, r3, #2
8001cc8: 4413 add r3, r2
8001cca: 00db lsls r3, r3, #3
8001ccc: 440b add r3, r1
8001cce: 3344 adds r3, #68 ; 0x44
8001cd0: 697a ldr r2, [r7, #20]
8001cd2: 601a str r2, [r3, #0]
hhcd->hc[ch_num].xfer_len = length;
8001cd4: 78fa ldrb r2, [r7, #3]
8001cd6: 8b39 ldrh r1, [r7, #24]
8001cd8: 6878 ldr r0, [r7, #4]
8001cda: 4613 mov r3, r2
8001cdc: 009b lsls r3, r3, #2
8001cde: 4413 add r3, r2
8001ce0: 00db lsls r3, r3, #3
8001ce2: 4403 add r3, r0
8001ce4: 3348 adds r3, #72 ; 0x48
8001ce6: 6019 str r1, [r3, #0]
hhcd->hc[ch_num].urb_state = URB_IDLE;
8001ce8: 78fa ldrb r2, [r7, #3]
8001cea: 6879 ldr r1, [r7, #4]
8001cec: 4613 mov r3, r2
8001cee: 009b lsls r3, r3, #2
8001cf0: 4413 add r3, r2
8001cf2: 00db lsls r3, r3, #3
8001cf4: 440b add r3, r1
8001cf6: 335c adds r3, #92 ; 0x5c
8001cf8: 2200 movs r2, #0
8001cfa: 701a strb r2, [r3, #0]
hhcd->hc[ch_num].xfer_count = 0U;
8001cfc: 78fa ldrb r2, [r7, #3]
8001cfe: 6879 ldr r1, [r7, #4]
8001d00: 4613 mov r3, r2
8001d02: 009b lsls r3, r3, #2
8001d04: 4413 add r3, r2
8001d06: 00db lsls r3, r3, #3
8001d08: 440b add r3, r1
8001d0a: 334c adds r3, #76 ; 0x4c
8001d0c: 2200 movs r2, #0
8001d0e: 601a str r2, [r3, #0]
hhcd->hc[ch_num].ch_num = ch_num;
8001d10: 78fa ldrb r2, [r7, #3]
8001d12: 6879 ldr r1, [r7, #4]
8001d14: 4613 mov r3, r2
8001d16: 009b lsls r3, r3, #2
8001d18: 4413 add r3, r2
8001d1a: 00db lsls r3, r3, #3
8001d1c: 440b add r3, r1
8001d1e: 3339 adds r3, #57 ; 0x39
8001d20: 78fa ldrb r2, [r7, #3]
8001d22: 701a strb r2, [r3, #0]
hhcd->hc[ch_num].state = HC_IDLE;
8001d24: 78fa ldrb r2, [r7, #3]
8001d26: 6879 ldr r1, [r7, #4]
8001d28: 4613 mov r3, r2
8001d2a: 009b lsls r3, r3, #2
8001d2c: 4413 add r3, r2
8001d2e: 00db lsls r3, r3, #3
8001d30: 440b add r3, r1
8001d32: 335d adds r3, #93 ; 0x5d
8001d34: 2200 movs r2, #0
8001d36: 701a strb r2, [r3, #0]
return USB_HC_StartXfer(hhcd->Instance, &hhcd->hc[ch_num], (uint8_t)hhcd->Init.dma_enable);
8001d38: 687b ldr r3, [r7, #4]
8001d3a: 6818 ldr r0, [r3, #0]
8001d3c: 78fa ldrb r2, [r7, #3]
8001d3e: 4613 mov r3, r2
8001d40: 009b lsls r3, r3, #2
8001d42: 4413 add r3, r2
8001d44: 00db lsls r3, r3, #3
8001d46: 3338 adds r3, #56 ; 0x38
8001d48: 687a ldr r2, [r7, #4]
8001d4a: 18d1 adds r1, r2, r3
8001d4c: 687b ldr r3, [r7, #4]
8001d4e: 691b ldr r3, [r3, #16]
8001d50: b2db uxtb r3, r3
8001d52: 461a mov r2, r3
8001d54: f004 fd84 bl 8006860 <USB_HC_StartXfer>
8001d58: 4603 mov r3, r0
}
8001d5a: 4618 mov r0, r3
8001d5c: 3708 adds r7, #8
8001d5e: 46bd mov sp, r7
8001d60: bd80 pop {r7, pc}
8001d62: bf00 nop
08001d64 <HAL_HCD_IRQHandler>:
* @brief Handle HCD interrupt request.
* @param hhcd HCD handle
* @retval None
*/
void HAL_HCD_IRQHandler(HCD_HandleTypeDef *hhcd)
{
8001d64: b580 push {r7, lr}
8001d66: b086 sub sp, #24
8001d68: af00 add r7, sp, #0
8001d6a: 6078 str r0, [r7, #4]
USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
8001d6c: 687b ldr r3, [r7, #4]
8001d6e: 681b ldr r3, [r3, #0]
8001d70: 613b str r3, [r7, #16]
uint32_t USBx_BASE = (uint32_t)USBx;
8001d72: 693b ldr r3, [r7, #16]
8001d74: 60fb str r3, [r7, #12]
uint32_t i, interrupt;
/* Ensure that we are in device mode */
if (USB_GetMode(hhcd->Instance) == USB_OTG_MODE_HOST)
8001d76: 687b ldr r3, [r7, #4]
8001d78: 681b ldr r3, [r3, #0]
8001d7a: 4618 mov r0, r3
8001d7c: f004 faa1 bl 80062c2 <USB_GetMode>
8001d80: 4603 mov r3, r0
8001d82: 2b01 cmp r3, #1
8001d84: f040 80ef bne.w 8001f66 <HAL_HCD_IRQHandler+0x202>
{
/* Avoid spurious interrupt */
if (__HAL_HCD_IS_INVALID_INTERRUPT(hhcd))
8001d88: 687b ldr r3, [r7, #4]
8001d8a: 681b ldr r3, [r3, #0]
8001d8c: 4618 mov r0, r3
8001d8e: f004 fa85 bl 800629c <USB_ReadInterrupts>
8001d92: 4603 mov r3, r0
8001d94: 2b00 cmp r3, #0
8001d96: f000 80e5 beq.w 8001f64 <HAL_HCD_IRQHandler+0x200>
{
return;
}
if (__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_PXFR_INCOMPISOOUT))
8001d9a: 687b ldr r3, [r7, #4]
8001d9c: 681b ldr r3, [r3, #0]
8001d9e: 4618 mov r0, r3
8001da0: f004 fa7c bl 800629c <USB_ReadInterrupts>
8001da4: 4603 mov r3, r0
8001da6: f403 1300 and.w r3, r3, #2097152 ; 0x200000
8001daa: f5b3 1f00 cmp.w r3, #2097152 ; 0x200000
8001dae: d104 bne.n 8001dba <HAL_HCD_IRQHandler+0x56>
{
/* Incorrect mode, acknowledge the interrupt */
__HAL_HCD_CLEAR_FLAG(hhcd, USB_OTG_GINTSTS_PXFR_INCOMPISOOUT);
8001db0: 687b ldr r3, [r7, #4]
8001db2: 681b ldr r3, [r3, #0]
8001db4: f44f 1200 mov.w r2, #2097152 ; 0x200000
8001db8: 615a str r2, [r3, #20]
}
if (__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_IISOIXFR))
8001dba: 687b ldr r3, [r7, #4]
8001dbc: 681b ldr r3, [r3, #0]
8001dbe: 4618 mov r0, r3
8001dc0: f004 fa6c bl 800629c <USB_ReadInterrupts>
8001dc4: 4603 mov r3, r0
8001dc6: f403 1380 and.w r3, r3, #1048576 ; 0x100000
8001dca: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000
8001dce: d104 bne.n 8001dda <HAL_HCD_IRQHandler+0x76>
{
/* Incorrect mode, acknowledge the interrupt */
__HAL_HCD_CLEAR_FLAG(hhcd, USB_OTG_GINTSTS_IISOIXFR);
8001dd0: 687b ldr r3, [r7, #4]
8001dd2: 681b ldr r3, [r3, #0]
8001dd4: f44f 1280 mov.w r2, #1048576 ; 0x100000
8001dd8: 615a str r2, [r3, #20]
}
if (__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_PTXFE))
8001dda: 687b ldr r3, [r7, #4]
8001ddc: 681b ldr r3, [r3, #0]
8001dde: 4618 mov r0, r3
8001de0: f004 fa5c bl 800629c <USB_ReadInterrupts>
8001de4: 4603 mov r3, r0
8001de6: f003 6380 and.w r3, r3, #67108864 ; 0x4000000
8001dea: f1b3 6f80 cmp.w r3, #67108864 ; 0x4000000
8001dee: d104 bne.n 8001dfa <HAL_HCD_IRQHandler+0x96>
{
/* Incorrect mode, acknowledge the interrupt */
__HAL_HCD_CLEAR_FLAG(hhcd, USB_OTG_GINTSTS_PTXFE);
8001df0: 687b ldr r3, [r7, #4]
8001df2: 681b ldr r3, [r3, #0]
8001df4: f04f 6280 mov.w r2, #67108864 ; 0x4000000
8001df8: 615a str r2, [r3, #20]
}
if (__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_MMIS))
8001dfa: 687b ldr r3, [r7, #4]
8001dfc: 681b ldr r3, [r3, #0]
8001dfe: 4618 mov r0, r3
8001e00: f004 fa4c bl 800629c <USB_ReadInterrupts>
8001e04: 4603 mov r3, r0
8001e06: f003 0302 and.w r3, r3, #2
8001e0a: 2b02 cmp r3, #2
8001e0c: d103 bne.n 8001e16 <HAL_HCD_IRQHandler+0xb2>
{
/* Incorrect mode, acknowledge the interrupt */
__HAL_HCD_CLEAR_FLAG(hhcd, USB_OTG_GINTSTS_MMIS);
8001e0e: 687b ldr r3, [r7, #4]
8001e10: 681b ldr r3, [r3, #0]
8001e12: 2202 movs r2, #2
8001e14: 615a str r2, [r3, #20]
}
/* Handle Host Disconnect Interrupts */
if (__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_DISCINT))
8001e16: 687b ldr r3, [r7, #4]
8001e18: 681b ldr r3, [r3, #0]
8001e1a: 4618 mov r0, r3
8001e1c: f004 fa3e bl 800629c <USB_ReadInterrupts>
8001e20: 4603 mov r3, r0
8001e22: f003 5300 and.w r3, r3, #536870912 ; 0x20000000
8001e26: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000
8001e2a: d115 bne.n 8001e58 <HAL_HCD_IRQHandler+0xf4>
{
__HAL_HCD_CLEAR_FLAG(hhcd, USB_OTG_GINTSTS_DISCINT);
8001e2c: 687b ldr r3, [r7, #4]
8001e2e: 681b ldr r3, [r3, #0]
8001e30: f04f 5200 mov.w r2, #536870912 ; 0x20000000
8001e34: 615a str r2, [r3, #20]
if ((USBx_HPRT0 & USB_OTG_HPRT_PCSTS) == 0U)
8001e36: 68fb ldr r3, [r7, #12]
8001e38: f503 6388 add.w r3, r3, #1088 ; 0x440
8001e3c: 681b ldr r3, [r3, #0]
8001e3e: f003 0301 and.w r3, r3, #1
8001e42: 2b00 cmp r3, #0
8001e44: d108 bne.n 8001e58 <HAL_HCD_IRQHandler+0xf4>
{
/* Handle Host Port Disconnect Interrupt */
#if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
hhcd->DisconnectCallback(hhcd);
#else
HAL_HCD_Disconnect_Callback(hhcd);
8001e46: 6878 ldr r0, [r7, #4]
8001e48: f006 fff6 bl 8008e38 <HAL_HCD_Disconnect_Callback>
#endif /* USE_HAL_HCD_REGISTER_CALLBACKS */
(void)USB_InitFSLSPClkSel(hhcd->Instance, HCFG_48_MHZ);
8001e4c: 687b ldr r3, [r7, #4]
8001e4e: 681b ldr r3, [r3, #0]
8001e50: 2101 movs r1, #1
8001e52: 4618 mov r0, r3
8001e54: f004 fb34 bl 80064c0 <USB_InitFSLSPClkSel>
}
}
/* Handle Host Port Interrupts */
if (__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_HPRTINT))
8001e58: 687b ldr r3, [r7, #4]
8001e5a: 681b ldr r3, [r3, #0]
8001e5c: 4618 mov r0, r3
8001e5e: f004 fa1d bl 800629c <USB_ReadInterrupts>
8001e62: 4603 mov r3, r0
8001e64: f003 7380 and.w r3, r3, #16777216 ; 0x1000000
8001e68: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000
8001e6c: d102 bne.n 8001e74 <HAL_HCD_IRQHandler+0x110>
{
HCD_Port_IRQHandler(hhcd);
8001e6e: 6878 ldr r0, [r7, #4]
8001e70: f001 f966 bl 8003140 <HCD_Port_IRQHandler>
}
/* Handle Host SOF Interrupt */
if (__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_SOF))
8001e74: 687b ldr r3, [r7, #4]
8001e76: 681b ldr r3, [r3, #0]
8001e78: 4618 mov r0, r3
8001e7a: f004 fa0f bl 800629c <USB_ReadInterrupts>
8001e7e: 4603 mov r3, r0
8001e80: f003 0308 and.w r3, r3, #8
8001e84: 2b08 cmp r3, #8
8001e86: d106 bne.n 8001e96 <HAL_HCD_IRQHandler+0x132>
{
#if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
hhcd->SOFCallback(hhcd);
#else
HAL_HCD_SOF_Callback(hhcd);
8001e88: 6878 ldr r0, [r7, #4]
8001e8a: f006 ffb9 bl 8008e00 <HAL_HCD_SOF_Callback>
#endif /* USE_HAL_HCD_REGISTER_CALLBACKS */
__HAL_HCD_CLEAR_FLAG(hhcd, USB_OTG_GINTSTS_SOF);
8001e8e: 687b ldr r3, [r7, #4]
8001e90: 681b ldr r3, [r3, #0]
8001e92: 2208 movs r2, #8
8001e94: 615a str r2, [r3, #20]
}
/* Handle Host channel Interrupt */
if (__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_HCINT))
8001e96: 687b ldr r3, [r7, #4]
8001e98: 681b ldr r3, [r3, #0]
8001e9a: 4618 mov r0, r3
8001e9c: f004 f9fe bl 800629c <USB_ReadInterrupts>
8001ea0: 4603 mov r3, r0
8001ea2: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
8001ea6: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000
8001eaa: d138 bne.n 8001f1e <HAL_HCD_IRQHandler+0x1ba>
{
interrupt = USB_HC_ReadInterrupt(hhcd->Instance);
8001eac: 687b ldr r3, [r7, #4]
8001eae: 681b ldr r3, [r3, #0]
8001eb0: 4618 mov r0, r3
8001eb2: f004 fe1b bl 8006aec <USB_HC_ReadInterrupt>
8001eb6: 60b8 str r0, [r7, #8]
for (i = 0U; i < hhcd->Init.Host_channels; i++)
8001eb8: 2300 movs r3, #0
8001eba: 617b str r3, [r7, #20]
8001ebc: e025 b.n 8001f0a <HAL_HCD_IRQHandler+0x1a6>
{
if ((interrupt & (1UL << (i & 0xFU))) != 0U)
8001ebe: 697b ldr r3, [r7, #20]
8001ec0: f003 030f and.w r3, r3, #15
8001ec4: 68ba ldr r2, [r7, #8]
8001ec6: fa22 f303 lsr.w r3, r2, r3
8001eca: f003 0301 and.w r3, r3, #1
8001ece: 2b00 cmp r3, #0
8001ed0: d018 beq.n 8001f04 <HAL_HCD_IRQHandler+0x1a0>
{
if ((USBx_HC(i)->HCCHAR & USB_OTG_HCCHAR_EPDIR) == USB_OTG_HCCHAR_EPDIR)
8001ed2: 697b ldr r3, [r7, #20]
8001ed4: 015a lsls r2, r3, #5
8001ed6: 68fb ldr r3, [r7, #12]
8001ed8: 4413 add r3, r2
8001eda: f503 63a0 add.w r3, r3, #1280 ; 0x500
8001ede: 681b ldr r3, [r3, #0]
8001ee0: f403 4300 and.w r3, r3, #32768 ; 0x8000
8001ee4: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
8001ee8: d106 bne.n 8001ef8 <HAL_HCD_IRQHandler+0x194>
{
HCD_HC_IN_IRQHandler(hhcd, (uint8_t)i);
8001eea: 697b ldr r3, [r7, #20]
8001eec: b2db uxtb r3, r3
8001eee: 4619 mov r1, r3
8001ef0: 6878 ldr r0, [r7, #4]
8001ef2: f000 f8cf bl 8002094 <HCD_HC_IN_IRQHandler>
8001ef6: e005 b.n 8001f04 <HAL_HCD_IRQHandler+0x1a0>
}
else
{
HCD_HC_OUT_IRQHandler(hhcd, (uint8_t)i);
8001ef8: 697b ldr r3, [r7, #20]
8001efa: b2db uxtb r3, r3
8001efc: 4619 mov r1, r3
8001efe: 6878 ldr r0, [r7, #4]
8001f00: f000 fcfd bl 80028fe <HCD_HC_OUT_IRQHandler>
for (i = 0U; i < hhcd->Init.Host_channels; i++)
8001f04: 697b ldr r3, [r7, #20]
8001f06: 3301 adds r3, #1
8001f08: 617b str r3, [r7, #20]
8001f0a: 687b ldr r3, [r7, #4]
8001f0c: 689b ldr r3, [r3, #8]
8001f0e: 697a ldr r2, [r7, #20]
8001f10: 429a cmp r2, r3
8001f12: d3d4 bcc.n 8001ebe <HAL_HCD_IRQHandler+0x15a>
}
}
}
__HAL_HCD_CLEAR_FLAG(hhcd, USB_OTG_GINTSTS_HCINT);
8001f14: 687b ldr r3, [r7, #4]
8001f16: 681b ldr r3, [r3, #0]
8001f18: f04f 7200 mov.w r2, #33554432 ; 0x2000000
8001f1c: 615a str r2, [r3, #20]
}
/* Handle Rx Queue Level Interrupts */
if ((__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_RXFLVL)) != 0U)
8001f1e: 687b ldr r3, [r7, #4]
8001f20: 681b ldr r3, [r3, #0]
8001f22: 4618 mov r0, r3
8001f24: f004 f9ba bl 800629c <USB_ReadInterrupts>
8001f28: 4603 mov r3, r0
8001f2a: f003 0310 and.w r3, r3, #16
8001f2e: 2b10 cmp r3, #16
8001f30: d101 bne.n 8001f36 <HAL_HCD_IRQHandler+0x1d2>
8001f32: 2301 movs r3, #1
8001f34: e000 b.n 8001f38 <HAL_HCD_IRQHandler+0x1d4>
8001f36: 2300 movs r3, #0
8001f38: 2b00 cmp r3, #0
8001f3a: d014 beq.n 8001f66 <HAL_HCD_IRQHandler+0x202>
{
USB_MASK_INTERRUPT(hhcd->Instance, USB_OTG_GINTSTS_RXFLVL);
8001f3c: 687b ldr r3, [r7, #4]
8001f3e: 681b ldr r3, [r3, #0]
8001f40: 699a ldr r2, [r3, #24]
8001f42: 687b ldr r3, [r7, #4]
8001f44: 681b ldr r3, [r3, #0]
8001f46: f022 0210 bic.w r2, r2, #16
8001f4a: 619a str r2, [r3, #24]
HCD_RXQLVL_IRQHandler(hhcd);
8001f4c: 6878 ldr r0, [r7, #4]
8001f4e: f001 f84b bl 8002fe8 <HCD_RXQLVL_IRQHandler>
USB_UNMASK_INTERRUPT(hhcd->Instance, USB_OTG_GINTSTS_RXFLVL);
8001f52: 687b ldr r3, [r7, #4]
8001f54: 681b ldr r3, [r3, #0]
8001f56: 699a ldr r2, [r3, #24]
8001f58: 687b ldr r3, [r7, #4]
8001f5a: 681b ldr r3, [r3, #0]
8001f5c: f042 0210 orr.w r2, r2, #16
8001f60: 619a str r2, [r3, #24]
8001f62: e000 b.n 8001f66 <HAL_HCD_IRQHandler+0x202>
return;
8001f64: bf00 nop
}
}
}
8001f66: 3718 adds r7, #24
8001f68: 46bd mov sp, r7
8001f6a: bd80 pop {r7, pc}
08001f6c <HAL_HCD_Start>:
* @brief Start the host driver.
* @param hhcd HCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_HCD_Start(HCD_HandleTypeDef *hhcd)
{
8001f6c: b580 push {r7, lr}
8001f6e: b082 sub sp, #8
8001f70: af00 add r7, sp, #0
8001f72: 6078 str r0, [r7, #4]
__HAL_LOCK(hhcd);
8001f74: 687b ldr r3, [r7, #4]
8001f76: f893 32b8 ldrb.w r3, [r3, #696] ; 0x2b8
8001f7a: 2b01 cmp r3, #1
8001f7c: d101 bne.n 8001f82 <HAL_HCD_Start+0x16>
8001f7e: 2302 movs r3, #2
8001f80: e013 b.n 8001faa <HAL_HCD_Start+0x3e>
8001f82: 687b ldr r3, [r7, #4]
8001f84: 2201 movs r2, #1
8001f86: f883 22b8 strb.w r2, [r3, #696] ; 0x2b8
__HAL_HCD_ENABLE(hhcd);
8001f8a: 687b ldr r3, [r7, #4]
8001f8c: 681b ldr r3, [r3, #0]
8001f8e: 4618 mov r0, r3
8001f90: f004 f891 bl 80060b6 <USB_EnableGlobalInt>
(void)USB_DriveVbus(hhcd->Instance, 1U);
8001f94: 687b ldr r3, [r7, #4]
8001f96: 681b ldr r3, [r3, #0]
8001f98: 2101 movs r1, #1
8001f9a: 4618 mov r0, r3
8001f9c: f004 faf4 bl 8006588 <USB_DriveVbus>
__HAL_UNLOCK(hhcd);
8001fa0: 687b ldr r3, [r7, #4]
8001fa2: 2200 movs r2, #0
8001fa4: f883 22b8 strb.w r2, [r3, #696] ; 0x2b8
return HAL_OK;
8001fa8: 2300 movs r3, #0
}
8001faa: 4618 mov r0, r3
8001fac: 3708 adds r7, #8
8001fae: 46bd mov sp, r7
8001fb0: bd80 pop {r7, pc}
08001fb2 <HAL_HCD_Stop>:
* @param hhcd HCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_HCD_Stop(HCD_HandleTypeDef *hhcd)
{
8001fb2: b580 push {r7, lr}
8001fb4: b082 sub sp, #8
8001fb6: af00 add r7, sp, #0
8001fb8: 6078 str r0, [r7, #4]
__HAL_LOCK(hhcd);
8001fba: 687b ldr r3, [r7, #4]
8001fbc: f893 32b8 ldrb.w r3, [r3, #696] ; 0x2b8
8001fc0: 2b01 cmp r3, #1
8001fc2: d101 bne.n 8001fc8 <HAL_HCD_Stop+0x16>
8001fc4: 2302 movs r3, #2
8001fc6: e00d b.n 8001fe4 <HAL_HCD_Stop+0x32>
8001fc8: 687b ldr r3, [r7, #4]
8001fca: 2201 movs r2, #1
8001fcc: f883 22b8 strb.w r2, [r3, #696] ; 0x2b8
(void)USB_StopHost(hhcd->Instance);
8001fd0: 687b ldr r3, [r7, #4]
8001fd2: 681b ldr r3, [r3, #0]
8001fd4: 4618 mov r0, r3
8001fd6: f004 fed5 bl 8006d84 <USB_StopHost>
__HAL_UNLOCK(hhcd);
8001fda: 687b ldr r3, [r7, #4]
8001fdc: 2200 movs r2, #0
8001fde: f883 22b8 strb.w r2, [r3, #696] ; 0x2b8
return HAL_OK;
8001fe2: 2300 movs r3, #0
}
8001fe4: 4618 mov r0, r3
8001fe6: 3708 adds r7, #8
8001fe8: 46bd mov sp, r7
8001fea: bd80 pop {r7, pc}
08001fec <HAL_HCD_ResetPort>:
* @brief Reset the host port.
* @param hhcd HCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_HCD_ResetPort(HCD_HandleTypeDef *hhcd)
{
8001fec: b580 push {r7, lr}
8001fee: b082 sub sp, #8
8001ff0: af00 add r7, sp, #0
8001ff2: 6078 str r0, [r7, #4]
return (USB_ResetPort(hhcd->Instance));
8001ff4: 687b ldr r3, [r7, #4]
8001ff6: 681b ldr r3, [r3, #0]
8001ff8: 4618 mov r0, r3
8001ffa: f004 fa9b bl 8006534 <USB_ResetPort>
8001ffe: 4603 mov r3, r0
}
8002000: 4618 mov r0, r3
8002002: 3708 adds r7, #8
8002004: 46bd mov sp, r7
8002006: bd80 pop {r7, pc}
08002008 <HAL_HCD_HC_GetURBState>:
* URB_NYET/
* URB_ERROR/
* URB_STALL
*/
HCD_URBStateTypeDef HAL_HCD_HC_GetURBState(HCD_HandleTypeDef *hhcd, uint8_t chnum)
{
8002008: b480 push {r7}
800200a: b083 sub sp, #12
800200c: af00 add r7, sp, #0
800200e: 6078 str r0, [r7, #4]
8002010: 460b mov r3, r1
8002012: 70fb strb r3, [r7, #3]
return hhcd->hc[chnum].urb_state;
8002014: 78fa ldrb r2, [r7, #3]
8002016: 6879 ldr r1, [r7, #4]
8002018: 4613 mov r3, r2
800201a: 009b lsls r3, r3, #2
800201c: 4413 add r3, r2
800201e: 00db lsls r3, r3, #3
8002020: 440b add r3, r1
8002022: 335c adds r3, #92 ; 0x5c
8002024: 781b ldrb r3, [r3, #0]
}
8002026: 4618 mov r0, r3
8002028: 370c adds r7, #12
800202a: 46bd mov sp, r7
800202c: f85d 7b04 ldr.w r7, [sp], #4
8002030: 4770 bx lr
08002032 <HAL_HCD_HC_GetXferCount>:
* @param chnum Channel number.
* This parameter can be a value from 1 to 15
* @retval last transfer size in byte
*/
uint32_t HAL_HCD_HC_GetXferCount(HCD_HandleTypeDef *hhcd, uint8_t chnum)
{
8002032: b480 push {r7}
8002034: b083 sub sp, #12
8002036: af00 add r7, sp, #0
8002038: 6078 str r0, [r7, #4]
800203a: 460b mov r3, r1
800203c: 70fb strb r3, [r7, #3]
return hhcd->hc[chnum].xfer_count;
800203e: 78fa ldrb r2, [r7, #3]
8002040: 6879 ldr r1, [r7, #4]
8002042: 4613 mov r3, r2
8002044: 009b lsls r3, r3, #2
8002046: 4413 add r3, r2
8002048: 00db lsls r3, r3, #3
800204a: 440b add r3, r1
800204c: 334c adds r3, #76 ; 0x4c
800204e: 681b ldr r3, [r3, #0]
}
8002050: 4618 mov r0, r3
8002052: 370c adds r7, #12
8002054: 46bd mov sp, r7
8002056: f85d 7b04 ldr.w r7, [sp], #4
800205a: 4770 bx lr
0800205c <HAL_HCD_GetCurrentFrame>:
* @brief Return the current Host frame number.
* @param hhcd HCD handle
* @retval Current Host frame number
*/
uint32_t HAL_HCD_GetCurrentFrame(HCD_HandleTypeDef *hhcd)
{
800205c: b580 push {r7, lr}
800205e: b082 sub sp, #8
8002060: af00 add r7, sp, #0
8002062: 6078 str r0, [r7, #4]
return (USB_GetCurrentFrame(hhcd->Instance));
8002064: 687b ldr r3, [r7, #4]
8002066: 681b ldr r3, [r3, #0]
8002068: 4618 mov r0, r3
800206a: f004 fadd bl 8006628 <USB_GetCurrentFrame>
800206e: 4603 mov r3, r0
}
8002070: 4618 mov r0, r3
8002072: 3708 adds r7, #8
8002074: 46bd mov sp, r7
8002076: bd80 pop {r7, pc}
08002078 <HAL_HCD_GetCurrentSpeed>:
* @brief Return the Host enumeration speed.
* @param hhcd HCD handle
* @retval Enumeration speed
*/
uint32_t HAL_HCD_GetCurrentSpeed(HCD_HandleTypeDef *hhcd)
{
8002078: b580 push {r7, lr}
800207a: b082 sub sp, #8
800207c: af00 add r7, sp, #0
800207e: 6078 str r0, [r7, #4]
return (USB_GetHostSpeed(hhcd->Instance));
8002080: 687b ldr r3, [r7, #4]
8002082: 681b ldr r3, [r3, #0]
8002084: 4618 mov r0, r3
8002086: f004 fab8 bl 80065fa <USB_GetHostSpeed>
800208a: 4603 mov r3, r0
}
800208c: 4618 mov r0, r3
800208e: 3708 adds r7, #8
8002090: 46bd mov sp, r7
8002092: bd80 pop {r7, pc}
08002094 <HCD_HC_IN_IRQHandler>:
* @param chnum Channel number.
* This parameter can be a value from 1 to 15
* @retval none
*/
static void HCD_HC_IN_IRQHandler(HCD_HandleTypeDef *hhcd, uint8_t chnum)
{
8002094: b580 push {r7, lr}
8002096: b086 sub sp, #24
8002098: af00 add r7, sp, #0
800209a: 6078 str r0, [r7, #4]
800209c: 460b mov r3, r1
800209e: 70fb strb r3, [r7, #3]
USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
80020a0: 687b ldr r3, [r7, #4]
80020a2: 681b ldr r3, [r3, #0]
80020a4: 617b str r3, [r7, #20]
uint32_t USBx_BASE = (uint32_t)USBx;
80020a6: 697b ldr r3, [r7, #20]
80020a8: 613b str r3, [r7, #16]
uint32_t ch_num = (uint32_t)chnum;
80020aa: 78fb ldrb r3, [r7, #3]
80020ac: 60fb str r3, [r7, #12]
uint32_t tmpreg;
if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_AHBERR) == USB_OTG_HCINT_AHBERR)
80020ae: 68fb ldr r3, [r7, #12]
80020b0: 015a lsls r2, r3, #5
80020b2: 693b ldr r3, [r7, #16]
80020b4: 4413 add r3, r2
80020b6: f503 63a0 add.w r3, r3, #1280 ; 0x500
80020ba: 689b ldr r3, [r3, #8]
80020bc: f003 0304 and.w r3, r3, #4
80020c0: 2b04 cmp r3, #4
80020c2: d119 bne.n 80020f8 <HCD_HC_IN_IRQHandler+0x64>
{
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_AHBERR);
80020c4: 68fb ldr r3, [r7, #12]
80020c6: 015a lsls r2, r3, #5
80020c8: 693b ldr r3, [r7, #16]
80020ca: 4413 add r3, r2
80020cc: f503 63a0 add.w r3, r3, #1280 ; 0x500
80020d0: 461a mov r2, r3
80020d2: 2304 movs r3, #4
80020d4: 6093 str r3, [r2, #8]
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
80020d6: 68fb ldr r3, [r7, #12]
80020d8: 015a lsls r2, r3, #5
80020da: 693b ldr r3, [r7, #16]
80020dc: 4413 add r3, r2
80020de: f503 63a0 add.w r3, r3, #1280 ; 0x500
80020e2: 68db ldr r3, [r3, #12]
80020e4: 68fa ldr r2, [r7, #12]
80020e6: 0151 lsls r1, r2, #5
80020e8: 693a ldr r2, [r7, #16]
80020ea: 440a add r2, r1
80020ec: f502 62a0 add.w r2, r2, #1280 ; 0x500
80020f0: f043 0302 orr.w r3, r3, #2
80020f4: 60d3 str r3, [r2, #12]
80020f6: e0ce b.n 8002296 <HCD_HC_IN_IRQHandler+0x202>
}
else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_BBERR) == USB_OTG_HCINT_BBERR)
80020f8: 68fb ldr r3, [r7, #12]
80020fa: 015a lsls r2, r3, #5
80020fc: 693b ldr r3, [r7, #16]
80020fe: 4413 add r3, r2
8002100: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002104: 689b ldr r3, [r3, #8]
8002106: f403 7380 and.w r3, r3, #256 ; 0x100
800210a: f5b3 7f80 cmp.w r3, #256 ; 0x100
800210e: d12c bne.n 800216a <HCD_HC_IN_IRQHandler+0xd6>
{
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_BBERR);
8002110: 68fb ldr r3, [r7, #12]
8002112: 015a lsls r2, r3, #5
8002114: 693b ldr r3, [r7, #16]
8002116: 4413 add r3, r2
8002118: f503 63a0 add.w r3, r3, #1280 ; 0x500
800211c: 461a mov r2, r3
800211e: f44f 7380 mov.w r3, #256 ; 0x100
8002122: 6093 str r3, [r2, #8]
hhcd->hc[ch_num].state = HC_BBLERR;
8002124: 6879 ldr r1, [r7, #4]
8002126: 68fa ldr r2, [r7, #12]
8002128: 4613 mov r3, r2
800212a: 009b lsls r3, r3, #2
800212c: 4413 add r3, r2
800212e: 00db lsls r3, r3, #3
8002130: 440b add r3, r1
8002132: 335d adds r3, #93 ; 0x5d
8002134: 2207 movs r2, #7
8002136: 701a strb r2, [r3, #0]
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
8002138: 68fb ldr r3, [r7, #12]
800213a: 015a lsls r2, r3, #5
800213c: 693b ldr r3, [r7, #16]
800213e: 4413 add r3, r2
8002140: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002144: 68db ldr r3, [r3, #12]
8002146: 68fa ldr r2, [r7, #12]
8002148: 0151 lsls r1, r2, #5
800214a: 693a ldr r2, [r7, #16]
800214c: 440a add r2, r1
800214e: f502 62a0 add.w r2, r2, #1280 ; 0x500
8002152: f043 0302 orr.w r3, r3, #2
8002156: 60d3 str r3, [r2, #12]
(void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
8002158: 687b ldr r3, [r7, #4]
800215a: 681b ldr r3, [r3, #0]
800215c: 68fa ldr r2, [r7, #12]
800215e: b2d2 uxtb r2, r2
8002160: 4611 mov r1, r2
8002162: 4618 mov r0, r3
8002164: f004 fcd3 bl 8006b0e <USB_HC_Halt>
8002168: e095 b.n 8002296 <HCD_HC_IN_IRQHandler+0x202>
}
else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_ACK) == USB_OTG_HCINT_ACK)
800216a: 68fb ldr r3, [r7, #12]
800216c: 015a lsls r2, r3, #5
800216e: 693b ldr r3, [r7, #16]
8002170: 4413 add r3, r2
8002172: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002176: 689b ldr r3, [r3, #8]
8002178: f003 0320 and.w r3, r3, #32
800217c: 2b20 cmp r3, #32
800217e: d109 bne.n 8002194 <HCD_HC_IN_IRQHandler+0x100>
{
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_ACK);
8002180: 68fb ldr r3, [r7, #12]
8002182: 015a lsls r2, r3, #5
8002184: 693b ldr r3, [r7, #16]
8002186: 4413 add r3, r2
8002188: f503 63a0 add.w r3, r3, #1280 ; 0x500
800218c: 461a mov r2, r3
800218e: 2320 movs r3, #32
8002190: 6093 str r3, [r2, #8]
8002192: e080 b.n 8002296 <HCD_HC_IN_IRQHandler+0x202>
}
else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_STALL) == USB_OTG_HCINT_STALL)
8002194: 68fb ldr r3, [r7, #12]
8002196: 015a lsls r2, r3, #5
8002198: 693b ldr r3, [r7, #16]
800219a: 4413 add r3, r2
800219c: f503 63a0 add.w r3, r3, #1280 ; 0x500
80021a0: 689b ldr r3, [r3, #8]
80021a2: f003 0308 and.w r3, r3, #8
80021a6: 2b08 cmp r3, #8
80021a8: d134 bne.n 8002214 <HCD_HC_IN_IRQHandler+0x180>
{
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
80021aa: 68fb ldr r3, [r7, #12]
80021ac: 015a lsls r2, r3, #5
80021ae: 693b ldr r3, [r7, #16]
80021b0: 4413 add r3, r2
80021b2: f503 63a0 add.w r3, r3, #1280 ; 0x500
80021b6: 68db ldr r3, [r3, #12]
80021b8: 68fa ldr r2, [r7, #12]
80021ba: 0151 lsls r1, r2, #5
80021bc: 693a ldr r2, [r7, #16]
80021be: 440a add r2, r1
80021c0: f502 62a0 add.w r2, r2, #1280 ; 0x500
80021c4: f043 0302 orr.w r3, r3, #2
80021c8: 60d3 str r3, [r2, #12]
hhcd->hc[ch_num].state = HC_STALL;
80021ca: 6879 ldr r1, [r7, #4]
80021cc: 68fa ldr r2, [r7, #12]
80021ce: 4613 mov r3, r2
80021d0: 009b lsls r3, r3, #2
80021d2: 4413 add r3, r2
80021d4: 00db lsls r3, r3, #3
80021d6: 440b add r3, r1
80021d8: 335d adds r3, #93 ; 0x5d
80021da: 2205 movs r2, #5
80021dc: 701a strb r2, [r3, #0]
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_NAK);
80021de: 68fb ldr r3, [r7, #12]
80021e0: 015a lsls r2, r3, #5
80021e2: 693b ldr r3, [r7, #16]
80021e4: 4413 add r3, r2
80021e6: f503 63a0 add.w r3, r3, #1280 ; 0x500
80021ea: 461a mov r2, r3
80021ec: 2310 movs r3, #16
80021ee: 6093 str r3, [r2, #8]
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_STALL);
80021f0: 68fb ldr r3, [r7, #12]
80021f2: 015a lsls r2, r3, #5
80021f4: 693b ldr r3, [r7, #16]
80021f6: 4413 add r3, r2
80021f8: f503 63a0 add.w r3, r3, #1280 ; 0x500
80021fc: 461a mov r2, r3
80021fe: 2308 movs r3, #8
8002200: 6093 str r3, [r2, #8]
(void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
8002202: 687b ldr r3, [r7, #4]
8002204: 681b ldr r3, [r3, #0]
8002206: 68fa ldr r2, [r7, #12]
8002208: b2d2 uxtb r2, r2
800220a: 4611 mov r1, r2
800220c: 4618 mov r0, r3
800220e: f004 fc7e bl 8006b0e <USB_HC_Halt>
8002212: e040 b.n 8002296 <HCD_HC_IN_IRQHandler+0x202>
}
else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_DTERR) == USB_OTG_HCINT_DTERR)
8002214: 68fb ldr r3, [r7, #12]
8002216: 015a lsls r2, r3, #5
8002218: 693b ldr r3, [r7, #16]
800221a: 4413 add r3, r2
800221c: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002220: 689b ldr r3, [r3, #8]
8002222: f403 6380 and.w r3, r3, #1024 ; 0x400
8002226: f5b3 6f80 cmp.w r3, #1024 ; 0x400
800222a: d134 bne.n 8002296 <HCD_HC_IN_IRQHandler+0x202>
{
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
800222c: 68fb ldr r3, [r7, #12]
800222e: 015a lsls r2, r3, #5
8002230: 693b ldr r3, [r7, #16]
8002232: 4413 add r3, r2
8002234: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002238: 68db ldr r3, [r3, #12]
800223a: 68fa ldr r2, [r7, #12]
800223c: 0151 lsls r1, r2, #5
800223e: 693a ldr r2, [r7, #16]
8002240: 440a add r2, r1
8002242: f502 62a0 add.w r2, r2, #1280 ; 0x500
8002246: f043 0302 orr.w r3, r3, #2
800224a: 60d3 str r3, [r2, #12]
(void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
800224c: 687b ldr r3, [r7, #4]
800224e: 681b ldr r3, [r3, #0]
8002250: 68fa ldr r2, [r7, #12]
8002252: b2d2 uxtb r2, r2
8002254: 4611 mov r1, r2
8002256: 4618 mov r0, r3
8002258: f004 fc59 bl 8006b0e <USB_HC_Halt>
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_NAK);
800225c: 68fb ldr r3, [r7, #12]
800225e: 015a lsls r2, r3, #5
8002260: 693b ldr r3, [r7, #16]
8002262: 4413 add r3, r2
8002264: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002268: 461a mov r2, r3
800226a: 2310 movs r3, #16
800226c: 6093 str r3, [r2, #8]
hhcd->hc[ch_num].state = HC_DATATGLERR;
800226e: 6879 ldr r1, [r7, #4]
8002270: 68fa ldr r2, [r7, #12]
8002272: 4613 mov r3, r2
8002274: 009b lsls r3, r3, #2
8002276: 4413 add r3, r2
8002278: 00db lsls r3, r3, #3
800227a: 440b add r3, r1
800227c: 335d adds r3, #93 ; 0x5d
800227e: 2208 movs r2, #8
8002280: 701a strb r2, [r3, #0]
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_DTERR);
8002282: 68fb ldr r3, [r7, #12]
8002284: 015a lsls r2, r3, #5
8002286: 693b ldr r3, [r7, #16]
8002288: 4413 add r3, r2
800228a: f503 63a0 add.w r3, r3, #1280 ; 0x500
800228e: 461a mov r2, r3
8002290: f44f 6380 mov.w r3, #1024 ; 0x400
8002294: 6093 str r3, [r2, #8]
else
{
/* ... */
}
if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_FRMOR) == USB_OTG_HCINT_FRMOR)
8002296: 68fb ldr r3, [r7, #12]
8002298: 015a lsls r2, r3, #5
800229a: 693b ldr r3, [r7, #16]
800229c: 4413 add r3, r2
800229e: f503 63a0 add.w r3, r3, #1280 ; 0x500
80022a2: 689b ldr r3, [r3, #8]
80022a4: f403 7300 and.w r3, r3, #512 ; 0x200
80022a8: f5b3 7f00 cmp.w r3, #512 ; 0x200
80022ac: d122 bne.n 80022f4 <HCD_HC_IN_IRQHandler+0x260>
{
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
80022ae: 68fb ldr r3, [r7, #12]
80022b0: 015a lsls r2, r3, #5
80022b2: 693b ldr r3, [r7, #16]
80022b4: 4413 add r3, r2
80022b6: f503 63a0 add.w r3, r3, #1280 ; 0x500
80022ba: 68db ldr r3, [r3, #12]
80022bc: 68fa ldr r2, [r7, #12]
80022be: 0151 lsls r1, r2, #5
80022c0: 693a ldr r2, [r7, #16]
80022c2: 440a add r2, r1
80022c4: f502 62a0 add.w r2, r2, #1280 ; 0x500
80022c8: f043 0302 orr.w r3, r3, #2
80022cc: 60d3 str r3, [r2, #12]
(void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
80022ce: 687b ldr r3, [r7, #4]
80022d0: 681b ldr r3, [r3, #0]
80022d2: 68fa ldr r2, [r7, #12]
80022d4: b2d2 uxtb r2, r2
80022d6: 4611 mov r1, r2
80022d8: 4618 mov r0, r3
80022da: f004 fc18 bl 8006b0e <USB_HC_Halt>
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_FRMOR);
80022de: 68fb ldr r3, [r7, #12]
80022e0: 015a lsls r2, r3, #5
80022e2: 693b ldr r3, [r7, #16]
80022e4: 4413 add r3, r2
80022e6: f503 63a0 add.w r3, r3, #1280 ; 0x500
80022ea: 461a mov r2, r3
80022ec: f44f 7300 mov.w r3, #512 ; 0x200
80022f0: 6093 str r3, [r2, #8]
}
else
{
/* ... */
}
}
80022f2: e300 b.n 80028f6 <HCD_HC_IN_IRQHandler+0x862>
else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_XFRC) == USB_OTG_HCINT_XFRC)
80022f4: 68fb ldr r3, [r7, #12]
80022f6: 015a lsls r2, r3, #5
80022f8: 693b ldr r3, [r7, #16]
80022fa: 4413 add r3, r2
80022fc: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002300: 689b ldr r3, [r3, #8]
8002302: f003 0301 and.w r3, r3, #1
8002306: 2b01 cmp r3, #1
8002308: f040 80fd bne.w 8002506 <HCD_HC_IN_IRQHandler+0x472>
if (hhcd->Init.dma_enable != 0U)
800230c: 687b ldr r3, [r7, #4]
800230e: 691b ldr r3, [r3, #16]
8002310: 2b00 cmp r3, #0
8002312: d01b beq.n 800234c <HCD_HC_IN_IRQHandler+0x2b8>
hhcd->hc[ch_num].xfer_count = hhcd->hc[ch_num].xfer_len - \
8002314: 6879 ldr r1, [r7, #4]
8002316: 68fa ldr r2, [r7, #12]
8002318: 4613 mov r3, r2
800231a: 009b lsls r3, r3, #2
800231c: 4413 add r3, r2
800231e: 00db lsls r3, r3, #3
8002320: 440b add r3, r1
8002322: 3348 adds r3, #72 ; 0x48
8002324: 681a ldr r2, [r3, #0]
(USBx_HC(ch_num)->HCTSIZ & USB_OTG_HCTSIZ_XFRSIZ);
8002326: 68fb ldr r3, [r7, #12]
8002328: 0159 lsls r1, r3, #5
800232a: 693b ldr r3, [r7, #16]
800232c: 440b add r3, r1
800232e: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002332: 691b ldr r3, [r3, #16]
8002334: f3c3 0312 ubfx r3, r3, #0, #19
hhcd->hc[ch_num].xfer_count = hhcd->hc[ch_num].xfer_len - \
8002338: 1ad1 subs r1, r2, r3
800233a: 6878 ldr r0, [r7, #4]
800233c: 68fa ldr r2, [r7, #12]
800233e: 4613 mov r3, r2
8002340: 009b lsls r3, r3, #2
8002342: 4413 add r3, r2
8002344: 00db lsls r3, r3, #3
8002346: 4403 add r3, r0
8002348: 334c adds r3, #76 ; 0x4c
800234a: 6019 str r1, [r3, #0]
hhcd->hc[ch_num].state = HC_XFRC;
800234c: 6879 ldr r1, [r7, #4]
800234e: 68fa ldr r2, [r7, #12]
8002350: 4613 mov r3, r2
8002352: 009b lsls r3, r3, #2
8002354: 4413 add r3, r2
8002356: 00db lsls r3, r3, #3
8002358: 440b add r3, r1
800235a: 335d adds r3, #93 ; 0x5d
800235c: 2201 movs r2, #1
800235e: 701a strb r2, [r3, #0]
hhcd->hc[ch_num].ErrCnt = 0U;
8002360: 6879 ldr r1, [r7, #4]
8002362: 68fa ldr r2, [r7, #12]
8002364: 4613 mov r3, r2
8002366: 009b lsls r3, r3, #2
8002368: 4413 add r3, r2
800236a: 00db lsls r3, r3, #3
800236c: 440b add r3, r1
800236e: 3358 adds r3, #88 ; 0x58
8002370: 2200 movs r2, #0
8002372: 601a str r2, [r3, #0]
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_XFRC);
8002374: 68fb ldr r3, [r7, #12]
8002376: 015a lsls r2, r3, #5
8002378: 693b ldr r3, [r7, #16]
800237a: 4413 add r3, r2
800237c: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002380: 461a mov r2, r3
8002382: 2301 movs r3, #1
8002384: 6093 str r3, [r2, #8]
if ((hhcd->hc[ch_num].ep_type == EP_TYPE_CTRL) ||
8002386: 6879 ldr r1, [r7, #4]
8002388: 68fa ldr r2, [r7, #12]
800238a: 4613 mov r3, r2
800238c: 009b lsls r3, r3, #2
800238e: 4413 add r3, r2
8002390: 00db lsls r3, r3, #3
8002392: 440b add r3, r1
8002394: 333f adds r3, #63 ; 0x3f
8002396: 781b ldrb r3, [r3, #0]
8002398: 2b00 cmp r3, #0
800239a: d00a beq.n 80023b2 <HCD_HC_IN_IRQHandler+0x31e>
(hhcd->hc[ch_num].ep_type == EP_TYPE_BULK))
800239c: 6879 ldr r1, [r7, #4]
800239e: 68fa ldr r2, [r7, #12]
80023a0: 4613 mov r3, r2
80023a2: 009b lsls r3, r3, #2
80023a4: 4413 add r3, r2
80023a6: 00db lsls r3, r3, #3
80023a8: 440b add r3, r1
80023aa: 333f adds r3, #63 ; 0x3f
80023ac: 781b ldrb r3, [r3, #0]
if ((hhcd->hc[ch_num].ep_type == EP_TYPE_CTRL) ||
80023ae: 2b02 cmp r3, #2
80023b0: d121 bne.n 80023f6 <HCD_HC_IN_IRQHandler+0x362>
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
80023b2: 68fb ldr r3, [r7, #12]
80023b4: 015a lsls r2, r3, #5
80023b6: 693b ldr r3, [r7, #16]
80023b8: 4413 add r3, r2
80023ba: f503 63a0 add.w r3, r3, #1280 ; 0x500
80023be: 68db ldr r3, [r3, #12]
80023c0: 68fa ldr r2, [r7, #12]
80023c2: 0151 lsls r1, r2, #5
80023c4: 693a ldr r2, [r7, #16]
80023c6: 440a add r2, r1
80023c8: f502 62a0 add.w r2, r2, #1280 ; 0x500
80023cc: f043 0302 orr.w r3, r3, #2
80023d0: 60d3 str r3, [r2, #12]
(void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
80023d2: 687b ldr r3, [r7, #4]
80023d4: 681b ldr r3, [r3, #0]
80023d6: 68fa ldr r2, [r7, #12]
80023d8: b2d2 uxtb r2, r2
80023da: 4611 mov r1, r2
80023dc: 4618 mov r0, r3
80023de: f004 fb96 bl 8006b0e <USB_HC_Halt>
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_NAK);
80023e2: 68fb ldr r3, [r7, #12]
80023e4: 015a lsls r2, r3, #5
80023e6: 693b ldr r3, [r7, #16]
80023e8: 4413 add r3, r2
80023ea: f503 63a0 add.w r3, r3, #1280 ; 0x500
80023ee: 461a mov r2, r3
80023f0: 2310 movs r3, #16
80023f2: 6093 str r3, [r2, #8]
80023f4: e070 b.n 80024d8 <HCD_HC_IN_IRQHandler+0x444>
else if (hhcd->hc[ch_num].ep_type == EP_TYPE_INTR)
80023f6: 6879 ldr r1, [r7, #4]
80023f8: 68fa ldr r2, [r7, #12]
80023fa: 4613 mov r3, r2
80023fc: 009b lsls r3, r3, #2
80023fe: 4413 add r3, r2
8002400: 00db lsls r3, r3, #3
8002402: 440b add r3, r1
8002404: 333f adds r3, #63 ; 0x3f
8002406: 781b ldrb r3, [r3, #0]
8002408: 2b03 cmp r3, #3
800240a: d12a bne.n 8002462 <HCD_HC_IN_IRQHandler+0x3ce>
USBx_HC(ch_num)->HCCHAR |= USB_OTG_HCCHAR_ODDFRM;
800240c: 68fb ldr r3, [r7, #12]
800240e: 015a lsls r2, r3, #5
8002410: 693b ldr r3, [r7, #16]
8002412: 4413 add r3, r2
8002414: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002418: 681b ldr r3, [r3, #0]
800241a: 68fa ldr r2, [r7, #12]
800241c: 0151 lsls r1, r2, #5
800241e: 693a ldr r2, [r7, #16]
8002420: 440a add r2, r1
8002422: f502 62a0 add.w r2, r2, #1280 ; 0x500
8002426: f043 5300 orr.w r3, r3, #536870912 ; 0x20000000
800242a: 6013 str r3, [r2, #0]
hhcd->hc[ch_num].urb_state = URB_DONE;
800242c: 6879 ldr r1, [r7, #4]
800242e: 68fa ldr r2, [r7, #12]
8002430: 4613 mov r3, r2
8002432: 009b lsls r3, r3, #2
8002434: 4413 add r3, r2
8002436: 00db lsls r3, r3, #3
8002438: 440b add r3, r1
800243a: 335c adds r3, #92 ; 0x5c
800243c: 2201 movs r2, #1
800243e: 701a strb r2, [r3, #0]
HAL_HCD_HC_NotifyURBChange_Callback(hhcd, (uint8_t)ch_num, hhcd->hc[ch_num].urb_state);
8002440: 68fb ldr r3, [r7, #12]
8002442: b2d8 uxtb r0, r3
8002444: 6879 ldr r1, [r7, #4]
8002446: 68fa ldr r2, [r7, #12]
8002448: 4613 mov r3, r2
800244a: 009b lsls r3, r3, #2
800244c: 4413 add r3, r2
800244e: 00db lsls r3, r3, #3
8002450: 440b add r3, r1
8002452: 335c adds r3, #92 ; 0x5c
8002454: 781b ldrb r3, [r3, #0]
8002456: 461a mov r2, r3
8002458: 4601 mov r1, r0
800245a: 6878 ldr r0, [r7, #4]
800245c: f006 fcfa bl 8008e54 <HAL_HCD_HC_NotifyURBChange_Callback>
8002460: e03a b.n 80024d8 <HCD_HC_IN_IRQHandler+0x444>
else if (hhcd->hc[ch_num].ep_type == EP_TYPE_ISOC)
8002462: 6879 ldr r1, [r7, #4]
8002464: 68fa ldr r2, [r7, #12]
8002466: 4613 mov r3, r2
8002468: 009b lsls r3, r3, #2
800246a: 4413 add r3, r2
800246c: 00db lsls r3, r3, #3
800246e: 440b add r3, r1
8002470: 333f adds r3, #63 ; 0x3f
8002472: 781b ldrb r3, [r3, #0]
8002474: 2b01 cmp r3, #1
8002476: d12f bne.n 80024d8 <HCD_HC_IN_IRQHandler+0x444>
hhcd->hc[ch_num].urb_state = URB_DONE;
8002478: 6879 ldr r1, [r7, #4]
800247a: 68fa ldr r2, [r7, #12]
800247c: 4613 mov r3, r2
800247e: 009b lsls r3, r3, #2
8002480: 4413 add r3, r2
8002482: 00db lsls r3, r3, #3
8002484: 440b add r3, r1
8002486: 335c adds r3, #92 ; 0x5c
8002488: 2201 movs r2, #1
800248a: 701a strb r2, [r3, #0]
hhcd->hc[ch_num].toggle_in ^= 1U;
800248c: 6879 ldr r1, [r7, #4]
800248e: 68fa ldr r2, [r7, #12]
8002490: 4613 mov r3, r2
8002492: 009b lsls r3, r3, #2
8002494: 4413 add r3, r2
8002496: 00db lsls r3, r3, #3
8002498: 440b add r3, r1
800249a: 3350 adds r3, #80 ; 0x50
800249c: 781b ldrb r3, [r3, #0]
800249e: f083 0301 eor.w r3, r3, #1
80024a2: b2d8 uxtb r0, r3
80024a4: 6879 ldr r1, [r7, #4]
80024a6: 68fa ldr r2, [r7, #12]
80024a8: 4613 mov r3, r2
80024aa: 009b lsls r3, r3, #2
80024ac: 4413 add r3, r2
80024ae: 00db lsls r3, r3, #3
80024b0: 440b add r3, r1
80024b2: 3350 adds r3, #80 ; 0x50
80024b4: 4602 mov r2, r0
80024b6: 701a strb r2, [r3, #0]
HAL_HCD_HC_NotifyURBChange_Callback(hhcd, (uint8_t)ch_num, hhcd->hc[ch_num].urb_state);
80024b8: 68fb ldr r3, [r7, #12]
80024ba: b2d8 uxtb r0, r3
80024bc: 6879 ldr r1, [r7, #4]
80024be: 68fa ldr r2, [r7, #12]
80024c0: 4613 mov r3, r2
80024c2: 009b lsls r3, r3, #2
80024c4: 4413 add r3, r2
80024c6: 00db lsls r3, r3, #3
80024c8: 440b add r3, r1
80024ca: 335c adds r3, #92 ; 0x5c
80024cc: 781b ldrb r3, [r3, #0]
80024ce: 461a mov r2, r3
80024d0: 4601 mov r1, r0
80024d2: 6878 ldr r0, [r7, #4]
80024d4: f006 fcbe bl 8008e54 <HAL_HCD_HC_NotifyURBChange_Callback>
hhcd->hc[ch_num].toggle_in ^= 1U;
80024d8: 6879 ldr r1, [r7, #4]
80024da: 68fa ldr r2, [r7, #12]
80024dc: 4613 mov r3, r2
80024de: 009b lsls r3, r3, #2
80024e0: 4413 add r3, r2
80024e2: 00db lsls r3, r3, #3
80024e4: 440b add r3, r1
80024e6: 3350 adds r3, #80 ; 0x50
80024e8: 781b ldrb r3, [r3, #0]
80024ea: f083 0301 eor.w r3, r3, #1
80024ee: b2d8 uxtb r0, r3
80024f0: 6879 ldr r1, [r7, #4]
80024f2: 68fa ldr r2, [r7, #12]
80024f4: 4613 mov r3, r2
80024f6: 009b lsls r3, r3, #2
80024f8: 4413 add r3, r2
80024fa: 00db lsls r3, r3, #3
80024fc: 440b add r3, r1
80024fe: 3350 adds r3, #80 ; 0x50
8002500: 4602 mov r2, r0
8002502: 701a strb r2, [r3, #0]
}
8002504: e1f7 b.n 80028f6 <HCD_HC_IN_IRQHandler+0x862>
else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_CHH) == USB_OTG_HCINT_CHH)
8002506: 68fb ldr r3, [r7, #12]
8002508: 015a lsls r2, r3, #5
800250a: 693b ldr r3, [r7, #16]
800250c: 4413 add r3, r2
800250e: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002512: 689b ldr r3, [r3, #8]
8002514: f003 0302 and.w r3, r3, #2
8002518: 2b02 cmp r3, #2
800251a: f040 811a bne.w 8002752 <HCD_HC_IN_IRQHandler+0x6be>
__HAL_HCD_MASK_HALT_HC_INT(ch_num);
800251e: 68fb ldr r3, [r7, #12]
8002520: 015a lsls r2, r3, #5
8002522: 693b ldr r3, [r7, #16]
8002524: 4413 add r3, r2
8002526: f503 63a0 add.w r3, r3, #1280 ; 0x500
800252a: 68db ldr r3, [r3, #12]
800252c: 68fa ldr r2, [r7, #12]
800252e: 0151 lsls r1, r2, #5
8002530: 693a ldr r2, [r7, #16]
8002532: 440a add r2, r1
8002534: f502 62a0 add.w r2, r2, #1280 ; 0x500
8002538: f023 0302 bic.w r3, r3, #2
800253c: 60d3 str r3, [r2, #12]
if (hhcd->hc[ch_num].state == HC_XFRC)
800253e: 6879 ldr r1, [r7, #4]
8002540: 68fa ldr r2, [r7, #12]
8002542: 4613 mov r3, r2
8002544: 009b lsls r3, r3, #2
8002546: 4413 add r3, r2
8002548: 00db lsls r3, r3, #3
800254a: 440b add r3, r1
800254c: 335d adds r3, #93 ; 0x5d
800254e: 781b ldrb r3, [r3, #0]
8002550: 2b01 cmp r3, #1
8002552: d10a bne.n 800256a <HCD_HC_IN_IRQHandler+0x4d6>
hhcd->hc[ch_num].urb_state = URB_DONE;
8002554: 6879 ldr r1, [r7, #4]
8002556: 68fa ldr r2, [r7, #12]
8002558: 4613 mov r3, r2
800255a: 009b lsls r3, r3, #2
800255c: 4413 add r3, r2
800255e: 00db lsls r3, r3, #3
8002560: 440b add r3, r1
8002562: 335c adds r3, #92 ; 0x5c
8002564: 2201 movs r2, #1
8002566: 701a strb r2, [r3, #0]
8002568: e0d9 b.n 800271e <HCD_HC_IN_IRQHandler+0x68a>
else if (hhcd->hc[ch_num].state == HC_STALL)
800256a: 6879 ldr r1, [r7, #4]
800256c: 68fa ldr r2, [r7, #12]
800256e: 4613 mov r3, r2
8002570: 009b lsls r3, r3, #2
8002572: 4413 add r3, r2
8002574: 00db lsls r3, r3, #3
8002576: 440b add r3, r1
8002578: 335d adds r3, #93 ; 0x5d
800257a: 781b ldrb r3, [r3, #0]
800257c: 2b05 cmp r3, #5
800257e: d10a bne.n 8002596 <HCD_HC_IN_IRQHandler+0x502>
hhcd->hc[ch_num].urb_state = URB_STALL;
8002580: 6879 ldr r1, [r7, #4]
8002582: 68fa ldr r2, [r7, #12]
8002584: 4613 mov r3, r2
8002586: 009b lsls r3, r3, #2
8002588: 4413 add r3, r2
800258a: 00db lsls r3, r3, #3
800258c: 440b add r3, r1
800258e: 335c adds r3, #92 ; 0x5c
8002590: 2205 movs r2, #5
8002592: 701a strb r2, [r3, #0]
8002594: e0c3 b.n 800271e <HCD_HC_IN_IRQHandler+0x68a>
else if ((hhcd->hc[ch_num].state == HC_XACTERR) ||
8002596: 6879 ldr r1, [r7, #4]
8002598: 68fa ldr r2, [r7, #12]
800259a: 4613 mov r3, r2
800259c: 009b lsls r3, r3, #2
800259e: 4413 add r3, r2
80025a0: 00db lsls r3, r3, #3
80025a2: 440b add r3, r1
80025a4: 335d adds r3, #93 ; 0x5d
80025a6: 781b ldrb r3, [r3, #0]
80025a8: 2b06 cmp r3, #6
80025aa: d00a beq.n 80025c2 <HCD_HC_IN_IRQHandler+0x52e>
(hhcd->hc[ch_num].state == HC_DATATGLERR))
80025ac: 6879 ldr r1, [r7, #4]
80025ae: 68fa ldr r2, [r7, #12]
80025b0: 4613 mov r3, r2
80025b2: 009b lsls r3, r3, #2
80025b4: 4413 add r3, r2
80025b6: 00db lsls r3, r3, #3
80025b8: 440b add r3, r1
80025ba: 335d adds r3, #93 ; 0x5d
80025bc: 781b ldrb r3, [r3, #0]
else if ((hhcd->hc[ch_num].state == HC_XACTERR) ||
80025be: 2b08 cmp r3, #8
80025c0: d156 bne.n 8002670 <HCD_HC_IN_IRQHandler+0x5dc>
hhcd->hc[ch_num].ErrCnt++;
80025c2: 6879 ldr r1, [r7, #4]
80025c4: 68fa ldr r2, [r7, #12]
80025c6: 4613 mov r3, r2
80025c8: 009b lsls r3, r3, #2
80025ca: 4413 add r3, r2
80025cc: 00db lsls r3, r3, #3
80025ce: 440b add r3, r1
80025d0: 3358 adds r3, #88 ; 0x58
80025d2: 681b ldr r3, [r3, #0]
80025d4: 1c59 adds r1, r3, #1
80025d6: 6878 ldr r0, [r7, #4]
80025d8: 68fa ldr r2, [r7, #12]
80025da: 4613 mov r3, r2
80025dc: 009b lsls r3, r3, #2
80025de: 4413 add r3, r2
80025e0: 00db lsls r3, r3, #3
80025e2: 4403 add r3, r0
80025e4: 3358 adds r3, #88 ; 0x58
80025e6: 6019 str r1, [r3, #0]
if (hhcd->hc[ch_num].ErrCnt > 3U)
80025e8: 6879 ldr r1, [r7, #4]
80025ea: 68fa ldr r2, [r7, #12]
80025ec: 4613 mov r3, r2
80025ee: 009b lsls r3, r3, #2
80025f0: 4413 add r3, r2
80025f2: 00db lsls r3, r3, #3
80025f4: 440b add r3, r1
80025f6: 3358 adds r3, #88 ; 0x58
80025f8: 681b ldr r3, [r3, #0]
80025fa: 2b03 cmp r3, #3
80025fc: d914 bls.n 8002628 <HCD_HC_IN_IRQHandler+0x594>
hhcd->hc[ch_num].ErrCnt = 0U;
80025fe: 6879 ldr r1, [r7, #4]
8002600: 68fa ldr r2, [r7, #12]
8002602: 4613 mov r3, r2
8002604: 009b lsls r3, r3, #2
8002606: 4413 add r3, r2
8002608: 00db lsls r3, r3, #3
800260a: 440b add r3, r1
800260c: 3358 adds r3, #88 ; 0x58
800260e: 2200 movs r2, #0
8002610: 601a str r2, [r3, #0]
hhcd->hc[ch_num].urb_state = URB_ERROR;
8002612: 6879 ldr r1, [r7, #4]
8002614: 68fa ldr r2, [r7, #12]
8002616: 4613 mov r3, r2
8002618: 009b lsls r3, r3, #2
800261a: 4413 add r3, r2
800261c: 00db lsls r3, r3, #3
800261e: 440b add r3, r1
8002620: 335c adds r3, #92 ; 0x5c
8002622: 2204 movs r2, #4
8002624: 701a strb r2, [r3, #0]
8002626: e009 b.n 800263c <HCD_HC_IN_IRQHandler+0x5a8>
hhcd->hc[ch_num].urb_state = URB_NOTREADY;
8002628: 6879 ldr r1, [r7, #4]
800262a: 68fa ldr r2, [r7, #12]
800262c: 4613 mov r3, r2
800262e: 009b lsls r3, r3, #2
8002630: 4413 add r3, r2
8002632: 00db lsls r3, r3, #3
8002634: 440b add r3, r1
8002636: 335c adds r3, #92 ; 0x5c
8002638: 2202 movs r2, #2
800263a: 701a strb r2, [r3, #0]
tmpreg = USBx_HC(ch_num)->HCCHAR;
800263c: 68fb ldr r3, [r7, #12]
800263e: 015a lsls r2, r3, #5
8002640: 693b ldr r3, [r7, #16]
8002642: 4413 add r3, r2
8002644: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002648: 681b ldr r3, [r3, #0]
800264a: 60bb str r3, [r7, #8]
tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
800264c: 68bb ldr r3, [r7, #8]
800264e: f023 4380 bic.w r3, r3, #1073741824 ; 0x40000000
8002652: 60bb str r3, [r7, #8]
tmpreg |= USB_OTG_HCCHAR_CHENA;
8002654: 68bb ldr r3, [r7, #8]
8002656: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
800265a: 60bb str r3, [r7, #8]
USBx_HC(ch_num)->HCCHAR = tmpreg;
800265c: 68fb ldr r3, [r7, #12]
800265e: 015a lsls r2, r3, #5
8002660: 693b ldr r3, [r7, #16]
8002662: 4413 add r3, r2
8002664: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002668: 461a mov r2, r3
800266a: 68bb ldr r3, [r7, #8]
800266c: 6013 str r3, [r2, #0]
800266e: e056 b.n 800271e <HCD_HC_IN_IRQHandler+0x68a>
else if (hhcd->hc[ch_num].state == HC_NAK)
8002670: 6879 ldr r1, [r7, #4]
8002672: 68fa ldr r2, [r7, #12]
8002674: 4613 mov r3, r2
8002676: 009b lsls r3, r3, #2
8002678: 4413 add r3, r2
800267a: 00db lsls r3, r3, #3
800267c: 440b add r3, r1
800267e: 335d adds r3, #93 ; 0x5d
8002680: 781b ldrb r3, [r3, #0]
8002682: 2b03 cmp r3, #3
8002684: d123 bne.n 80026ce <HCD_HC_IN_IRQHandler+0x63a>
hhcd->hc[ch_num].urb_state = URB_NOTREADY;
8002686: 6879 ldr r1, [r7, #4]
8002688: 68fa ldr r2, [r7, #12]
800268a: 4613 mov r3, r2
800268c: 009b lsls r3, r3, #2
800268e: 4413 add r3, r2
8002690: 00db lsls r3, r3, #3
8002692: 440b add r3, r1
8002694: 335c adds r3, #92 ; 0x5c
8002696: 2202 movs r2, #2
8002698: 701a strb r2, [r3, #0]
tmpreg = USBx_HC(ch_num)->HCCHAR;
800269a: 68fb ldr r3, [r7, #12]
800269c: 015a lsls r2, r3, #5
800269e: 693b ldr r3, [r7, #16]
80026a0: 4413 add r3, r2
80026a2: f503 63a0 add.w r3, r3, #1280 ; 0x500
80026a6: 681b ldr r3, [r3, #0]
80026a8: 60bb str r3, [r7, #8]
tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
80026aa: 68bb ldr r3, [r7, #8]
80026ac: f023 4380 bic.w r3, r3, #1073741824 ; 0x40000000
80026b0: 60bb str r3, [r7, #8]
tmpreg |= USB_OTG_HCCHAR_CHENA;
80026b2: 68bb ldr r3, [r7, #8]
80026b4: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
80026b8: 60bb str r3, [r7, #8]
USBx_HC(ch_num)->HCCHAR = tmpreg;
80026ba: 68fb ldr r3, [r7, #12]
80026bc: 015a lsls r2, r3, #5
80026be: 693b ldr r3, [r7, #16]
80026c0: 4413 add r3, r2
80026c2: f503 63a0 add.w r3, r3, #1280 ; 0x500
80026c6: 461a mov r2, r3
80026c8: 68bb ldr r3, [r7, #8]
80026ca: 6013 str r3, [r2, #0]
80026cc: e027 b.n 800271e <HCD_HC_IN_IRQHandler+0x68a>
else if (hhcd->hc[ch_num].state == HC_BBLERR)
80026ce: 6879 ldr r1, [r7, #4]
80026d0: 68fa ldr r2, [r7, #12]
80026d2: 4613 mov r3, r2
80026d4: 009b lsls r3, r3, #2
80026d6: 4413 add r3, r2
80026d8: 00db lsls r3, r3, #3
80026da: 440b add r3, r1
80026dc: 335d adds r3, #93 ; 0x5d
80026de: 781b ldrb r3, [r3, #0]
80026e0: 2b07 cmp r3, #7
80026e2: d11c bne.n 800271e <HCD_HC_IN_IRQHandler+0x68a>
hhcd->hc[ch_num].ErrCnt++;
80026e4: 6879 ldr r1, [r7, #4]
80026e6: 68fa ldr r2, [r7, #12]
80026e8: 4613 mov r3, r2
80026ea: 009b lsls r3, r3, #2
80026ec: 4413 add r3, r2
80026ee: 00db lsls r3, r3, #3
80026f0: 440b add r3, r1
80026f2: 3358 adds r3, #88 ; 0x58
80026f4: 681b ldr r3, [r3, #0]
80026f6: 1c59 adds r1, r3, #1
80026f8: 6878 ldr r0, [r7, #4]
80026fa: 68fa ldr r2, [r7, #12]
80026fc: 4613 mov r3, r2
80026fe: 009b lsls r3, r3, #2
8002700: 4413 add r3, r2
8002702: 00db lsls r3, r3, #3
8002704: 4403 add r3, r0
8002706: 3358 adds r3, #88 ; 0x58
8002708: 6019 str r1, [r3, #0]
hhcd->hc[ch_num].urb_state = URB_ERROR;
800270a: 6879 ldr r1, [r7, #4]
800270c: 68fa ldr r2, [r7, #12]
800270e: 4613 mov r3, r2
8002710: 009b lsls r3, r3, #2
8002712: 4413 add r3, r2
8002714: 00db lsls r3, r3, #3
8002716: 440b add r3, r1
8002718: 335c adds r3, #92 ; 0x5c
800271a: 2204 movs r2, #4
800271c: 701a strb r2, [r3, #0]
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_CHH);
800271e: 68fb ldr r3, [r7, #12]
8002720: 015a lsls r2, r3, #5
8002722: 693b ldr r3, [r7, #16]
8002724: 4413 add r3, r2
8002726: f503 63a0 add.w r3, r3, #1280 ; 0x500
800272a: 461a mov r2, r3
800272c: 2302 movs r3, #2
800272e: 6093 str r3, [r2, #8]
HAL_HCD_HC_NotifyURBChange_Callback(hhcd, (uint8_t)ch_num, hhcd->hc[ch_num].urb_state);
8002730: 68fb ldr r3, [r7, #12]
8002732: b2d8 uxtb r0, r3
8002734: 6879 ldr r1, [r7, #4]
8002736: 68fa ldr r2, [r7, #12]
8002738: 4613 mov r3, r2
800273a: 009b lsls r3, r3, #2
800273c: 4413 add r3, r2
800273e: 00db lsls r3, r3, #3
8002740: 440b add r3, r1
8002742: 335c adds r3, #92 ; 0x5c
8002744: 781b ldrb r3, [r3, #0]
8002746: 461a mov r2, r3
8002748: 4601 mov r1, r0
800274a: 6878 ldr r0, [r7, #4]
800274c: f006 fb82 bl 8008e54 <HAL_HCD_HC_NotifyURBChange_Callback>
}
8002750: e0d1 b.n 80028f6 <HCD_HC_IN_IRQHandler+0x862>
else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_TXERR) == USB_OTG_HCINT_TXERR)
8002752: 68fb ldr r3, [r7, #12]
8002754: 015a lsls r2, r3, #5
8002756: 693b ldr r3, [r7, #16]
8002758: 4413 add r3, r2
800275a: f503 63a0 add.w r3, r3, #1280 ; 0x500
800275e: 689b ldr r3, [r3, #8]
8002760: f003 0380 and.w r3, r3, #128 ; 0x80
8002764: 2b80 cmp r3, #128 ; 0x80
8002766: d13e bne.n 80027e6 <HCD_HC_IN_IRQHandler+0x752>
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
8002768: 68fb ldr r3, [r7, #12]
800276a: 015a lsls r2, r3, #5
800276c: 693b ldr r3, [r7, #16]
800276e: 4413 add r3, r2
8002770: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002774: 68db ldr r3, [r3, #12]
8002776: 68fa ldr r2, [r7, #12]
8002778: 0151 lsls r1, r2, #5
800277a: 693a ldr r2, [r7, #16]
800277c: 440a add r2, r1
800277e: f502 62a0 add.w r2, r2, #1280 ; 0x500
8002782: f043 0302 orr.w r3, r3, #2
8002786: 60d3 str r3, [r2, #12]
hhcd->hc[ch_num].ErrCnt++;
8002788: 6879 ldr r1, [r7, #4]
800278a: 68fa ldr r2, [r7, #12]
800278c: 4613 mov r3, r2
800278e: 009b lsls r3, r3, #2
8002790: 4413 add r3, r2
8002792: 00db lsls r3, r3, #3
8002794: 440b add r3, r1
8002796: 3358 adds r3, #88 ; 0x58
8002798: 681b ldr r3, [r3, #0]
800279a: 1c59 adds r1, r3, #1
800279c: 6878 ldr r0, [r7, #4]
800279e: 68fa ldr r2, [r7, #12]
80027a0: 4613 mov r3, r2
80027a2: 009b lsls r3, r3, #2
80027a4: 4413 add r3, r2
80027a6: 00db lsls r3, r3, #3
80027a8: 4403 add r3, r0
80027aa: 3358 adds r3, #88 ; 0x58
80027ac: 6019 str r1, [r3, #0]
hhcd->hc[ch_num].state = HC_XACTERR;
80027ae: 6879 ldr r1, [r7, #4]
80027b0: 68fa ldr r2, [r7, #12]
80027b2: 4613 mov r3, r2
80027b4: 009b lsls r3, r3, #2
80027b6: 4413 add r3, r2
80027b8: 00db lsls r3, r3, #3
80027ba: 440b add r3, r1
80027bc: 335d adds r3, #93 ; 0x5d
80027be: 2206 movs r2, #6
80027c0: 701a strb r2, [r3, #0]
(void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
80027c2: 687b ldr r3, [r7, #4]
80027c4: 681b ldr r3, [r3, #0]
80027c6: 68fa ldr r2, [r7, #12]
80027c8: b2d2 uxtb r2, r2
80027ca: 4611 mov r1, r2
80027cc: 4618 mov r0, r3
80027ce: f004 f99e bl 8006b0e <USB_HC_Halt>
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_TXERR);
80027d2: 68fb ldr r3, [r7, #12]
80027d4: 015a lsls r2, r3, #5
80027d6: 693b ldr r3, [r7, #16]
80027d8: 4413 add r3, r2
80027da: f503 63a0 add.w r3, r3, #1280 ; 0x500
80027de: 461a mov r2, r3
80027e0: 2380 movs r3, #128 ; 0x80
80027e2: 6093 str r3, [r2, #8]
}
80027e4: e087 b.n 80028f6 <HCD_HC_IN_IRQHandler+0x862>
else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_NAK) == USB_OTG_HCINT_NAK)
80027e6: 68fb ldr r3, [r7, #12]
80027e8: 015a lsls r2, r3, #5
80027ea: 693b ldr r3, [r7, #16]
80027ec: 4413 add r3, r2
80027ee: f503 63a0 add.w r3, r3, #1280 ; 0x500
80027f2: 689b ldr r3, [r3, #8]
80027f4: f003 0310 and.w r3, r3, #16
80027f8: 2b10 cmp r3, #16
80027fa: d17c bne.n 80028f6 <HCD_HC_IN_IRQHandler+0x862>
if (hhcd->hc[ch_num].ep_type == EP_TYPE_INTR)
80027fc: 6879 ldr r1, [r7, #4]
80027fe: 68fa ldr r2, [r7, #12]
8002800: 4613 mov r3, r2
8002802: 009b lsls r3, r3, #2
8002804: 4413 add r3, r2
8002806: 00db lsls r3, r3, #3
8002808: 440b add r3, r1
800280a: 333f adds r3, #63 ; 0x3f
800280c: 781b ldrb r3, [r3, #0]
800280e: 2b03 cmp r3, #3
8002810: d122 bne.n 8002858 <HCD_HC_IN_IRQHandler+0x7c4>
hhcd->hc[ch_num].ErrCnt = 0U;
8002812: 6879 ldr r1, [r7, #4]
8002814: 68fa ldr r2, [r7, #12]
8002816: 4613 mov r3, r2
8002818: 009b lsls r3, r3, #2
800281a: 4413 add r3, r2
800281c: 00db lsls r3, r3, #3
800281e: 440b add r3, r1
8002820: 3358 adds r3, #88 ; 0x58
8002822: 2200 movs r2, #0
8002824: 601a str r2, [r3, #0]
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
8002826: 68fb ldr r3, [r7, #12]
8002828: 015a lsls r2, r3, #5
800282a: 693b ldr r3, [r7, #16]
800282c: 4413 add r3, r2
800282e: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002832: 68db ldr r3, [r3, #12]
8002834: 68fa ldr r2, [r7, #12]
8002836: 0151 lsls r1, r2, #5
8002838: 693a ldr r2, [r7, #16]
800283a: 440a add r2, r1
800283c: f502 62a0 add.w r2, r2, #1280 ; 0x500
8002840: f043 0302 orr.w r3, r3, #2
8002844: 60d3 str r3, [r2, #12]
(void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
8002846: 687b ldr r3, [r7, #4]
8002848: 681b ldr r3, [r3, #0]
800284a: 68fa ldr r2, [r7, #12]
800284c: b2d2 uxtb r2, r2
800284e: 4611 mov r1, r2
8002850: 4618 mov r0, r3
8002852: f004 f95c bl 8006b0e <USB_HC_Halt>
8002856: e045 b.n 80028e4 <HCD_HC_IN_IRQHandler+0x850>
else if ((hhcd->hc[ch_num].ep_type == EP_TYPE_CTRL) ||
8002858: 6879 ldr r1, [r7, #4]
800285a: 68fa ldr r2, [r7, #12]
800285c: 4613 mov r3, r2
800285e: 009b lsls r3, r3, #2
8002860: 4413 add r3, r2
8002862: 00db lsls r3, r3, #3
8002864: 440b add r3, r1
8002866: 333f adds r3, #63 ; 0x3f
8002868: 781b ldrb r3, [r3, #0]
800286a: 2b00 cmp r3, #0
800286c: d00a beq.n 8002884 <HCD_HC_IN_IRQHandler+0x7f0>
(hhcd->hc[ch_num].ep_type == EP_TYPE_BULK))
800286e: 6879 ldr r1, [r7, #4]
8002870: 68fa ldr r2, [r7, #12]
8002872: 4613 mov r3, r2
8002874: 009b lsls r3, r3, #2
8002876: 4413 add r3, r2
8002878: 00db lsls r3, r3, #3
800287a: 440b add r3, r1
800287c: 333f adds r3, #63 ; 0x3f
800287e: 781b ldrb r3, [r3, #0]
else if ((hhcd->hc[ch_num].ep_type == EP_TYPE_CTRL) ||
8002880: 2b02 cmp r3, #2
8002882: d12f bne.n 80028e4 <HCD_HC_IN_IRQHandler+0x850>
hhcd->hc[ch_num].ErrCnt = 0U;
8002884: 6879 ldr r1, [r7, #4]
8002886: 68fa ldr r2, [r7, #12]
8002888: 4613 mov r3, r2
800288a: 009b lsls r3, r3, #2
800288c: 4413 add r3, r2
800288e: 00db lsls r3, r3, #3
8002890: 440b add r3, r1
8002892: 3358 adds r3, #88 ; 0x58
8002894: 2200 movs r2, #0
8002896: 601a str r2, [r3, #0]
if (hhcd->Init.dma_enable == 0U)
8002898: 687b ldr r3, [r7, #4]
800289a: 691b ldr r3, [r3, #16]
800289c: 2b00 cmp r3, #0
800289e: d121 bne.n 80028e4 <HCD_HC_IN_IRQHandler+0x850>
hhcd->hc[ch_num].state = HC_NAK;
80028a0: 6879 ldr r1, [r7, #4]
80028a2: 68fa ldr r2, [r7, #12]
80028a4: 4613 mov r3, r2
80028a6: 009b lsls r3, r3, #2
80028a8: 4413 add r3, r2
80028aa: 00db lsls r3, r3, #3
80028ac: 440b add r3, r1
80028ae: 335d adds r3, #93 ; 0x5d
80028b0: 2203 movs r2, #3
80028b2: 701a strb r2, [r3, #0]
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
80028b4: 68fb ldr r3, [r7, #12]
80028b6: 015a lsls r2, r3, #5
80028b8: 693b ldr r3, [r7, #16]
80028ba: 4413 add r3, r2
80028bc: f503 63a0 add.w r3, r3, #1280 ; 0x500
80028c0: 68db ldr r3, [r3, #12]
80028c2: 68fa ldr r2, [r7, #12]
80028c4: 0151 lsls r1, r2, #5
80028c6: 693a ldr r2, [r7, #16]
80028c8: 440a add r2, r1
80028ca: f502 62a0 add.w r2, r2, #1280 ; 0x500
80028ce: f043 0302 orr.w r3, r3, #2
80028d2: 60d3 str r3, [r2, #12]
(void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
80028d4: 687b ldr r3, [r7, #4]
80028d6: 681b ldr r3, [r3, #0]
80028d8: 68fa ldr r2, [r7, #12]
80028da: b2d2 uxtb r2, r2
80028dc: 4611 mov r1, r2
80028de: 4618 mov r0, r3
80028e0: f004 f915 bl 8006b0e <USB_HC_Halt>
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_NAK);
80028e4: 68fb ldr r3, [r7, #12]
80028e6: 015a lsls r2, r3, #5
80028e8: 693b ldr r3, [r7, #16]
80028ea: 4413 add r3, r2
80028ec: f503 63a0 add.w r3, r3, #1280 ; 0x500
80028f0: 461a mov r2, r3
80028f2: 2310 movs r3, #16
80028f4: 6093 str r3, [r2, #8]
}
80028f6: bf00 nop
80028f8: 3718 adds r7, #24
80028fa: 46bd mov sp, r7
80028fc: bd80 pop {r7, pc}
080028fe <HCD_HC_OUT_IRQHandler>:
* @param chnum Channel number.
* This parameter can be a value from 1 to 15
* @retval none
*/
static void HCD_HC_OUT_IRQHandler(HCD_HandleTypeDef *hhcd, uint8_t chnum)
{
80028fe: b580 push {r7, lr}
8002900: b086 sub sp, #24
8002902: af00 add r7, sp, #0
8002904: 6078 str r0, [r7, #4]
8002906: 460b mov r3, r1
8002908: 70fb strb r3, [r7, #3]
USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
800290a: 687b ldr r3, [r7, #4]
800290c: 681b ldr r3, [r3, #0]
800290e: 617b str r3, [r7, #20]
uint32_t USBx_BASE = (uint32_t)USBx;
8002910: 697b ldr r3, [r7, #20]
8002912: 613b str r3, [r7, #16]
uint32_t ch_num = (uint32_t)chnum;
8002914: 78fb ldrb r3, [r7, #3]
8002916: 60fb str r3, [r7, #12]
uint32_t tmpreg;
if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_AHBERR) == USB_OTG_HCINT_AHBERR)
8002918: 68fb ldr r3, [r7, #12]
800291a: 015a lsls r2, r3, #5
800291c: 693b ldr r3, [r7, #16]
800291e: 4413 add r3, r2
8002920: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002924: 689b ldr r3, [r3, #8]
8002926: f003 0304 and.w r3, r3, #4
800292a: 2b04 cmp r3, #4
800292c: d119 bne.n 8002962 <HCD_HC_OUT_IRQHandler+0x64>
{
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_AHBERR);
800292e: 68fb ldr r3, [r7, #12]
8002930: 015a lsls r2, r3, #5
8002932: 693b ldr r3, [r7, #16]
8002934: 4413 add r3, r2
8002936: f503 63a0 add.w r3, r3, #1280 ; 0x500
800293a: 461a mov r2, r3
800293c: 2304 movs r3, #4
800293e: 6093 str r3, [r2, #8]
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
8002940: 68fb ldr r3, [r7, #12]
8002942: 015a lsls r2, r3, #5
8002944: 693b ldr r3, [r7, #16]
8002946: 4413 add r3, r2
8002948: f503 63a0 add.w r3, r3, #1280 ; 0x500
800294c: 68db ldr r3, [r3, #12]
800294e: 68fa ldr r2, [r7, #12]
8002950: 0151 lsls r1, r2, #5
8002952: 693a ldr r2, [r7, #16]
8002954: 440a add r2, r1
8002956: f502 62a0 add.w r2, r2, #1280 ; 0x500
800295a: f043 0302 orr.w r3, r3, #2
800295e: 60d3 str r3, [r2, #12]
}
else
{
/* ... */
}
}
8002960: e33e b.n 8002fe0 <HCD_HC_OUT_IRQHandler+0x6e2>
else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_ACK) == USB_OTG_HCINT_ACK)
8002962: 68fb ldr r3, [r7, #12]
8002964: 015a lsls r2, r3, #5
8002966: 693b ldr r3, [r7, #16]
8002968: 4413 add r3, r2
800296a: f503 63a0 add.w r3, r3, #1280 ; 0x500
800296e: 689b ldr r3, [r3, #8]
8002970: f003 0320 and.w r3, r3, #32
8002974: 2b20 cmp r3, #32
8002976: d141 bne.n 80029fc <HCD_HC_OUT_IRQHandler+0xfe>
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_ACK);
8002978: 68fb ldr r3, [r7, #12]
800297a: 015a lsls r2, r3, #5
800297c: 693b ldr r3, [r7, #16]
800297e: 4413 add r3, r2
8002980: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002984: 461a mov r2, r3
8002986: 2320 movs r3, #32
8002988: 6093 str r3, [r2, #8]
if (hhcd->hc[ch_num].do_ping == 1U)
800298a: 6879 ldr r1, [r7, #4]
800298c: 68fa ldr r2, [r7, #12]
800298e: 4613 mov r3, r2
8002990: 009b lsls r3, r3, #2
8002992: 4413 add r3, r2
8002994: 00db lsls r3, r3, #3
8002996: 440b add r3, r1
8002998: 333d adds r3, #61 ; 0x3d
800299a: 781b ldrb r3, [r3, #0]
800299c: 2b01 cmp r3, #1
800299e: f040 831f bne.w 8002fe0 <HCD_HC_OUT_IRQHandler+0x6e2>
hhcd->hc[ch_num].do_ping = 0U;
80029a2: 6879 ldr r1, [r7, #4]
80029a4: 68fa ldr r2, [r7, #12]
80029a6: 4613 mov r3, r2
80029a8: 009b lsls r3, r3, #2
80029aa: 4413 add r3, r2
80029ac: 00db lsls r3, r3, #3
80029ae: 440b add r3, r1
80029b0: 333d adds r3, #61 ; 0x3d
80029b2: 2200 movs r2, #0
80029b4: 701a strb r2, [r3, #0]
hhcd->hc[ch_num].urb_state = URB_NOTREADY;
80029b6: 6879 ldr r1, [r7, #4]
80029b8: 68fa ldr r2, [r7, #12]
80029ba: 4613 mov r3, r2
80029bc: 009b lsls r3, r3, #2
80029be: 4413 add r3, r2
80029c0: 00db lsls r3, r3, #3
80029c2: 440b add r3, r1
80029c4: 335c adds r3, #92 ; 0x5c
80029c6: 2202 movs r2, #2
80029c8: 701a strb r2, [r3, #0]
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
80029ca: 68fb ldr r3, [r7, #12]
80029cc: 015a lsls r2, r3, #5
80029ce: 693b ldr r3, [r7, #16]
80029d0: 4413 add r3, r2
80029d2: f503 63a0 add.w r3, r3, #1280 ; 0x500
80029d6: 68db ldr r3, [r3, #12]
80029d8: 68fa ldr r2, [r7, #12]
80029da: 0151 lsls r1, r2, #5
80029dc: 693a ldr r2, [r7, #16]
80029de: 440a add r2, r1
80029e0: f502 62a0 add.w r2, r2, #1280 ; 0x500
80029e4: f043 0302 orr.w r3, r3, #2
80029e8: 60d3 str r3, [r2, #12]
(void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
80029ea: 687b ldr r3, [r7, #4]
80029ec: 681b ldr r3, [r3, #0]
80029ee: 68fa ldr r2, [r7, #12]
80029f0: b2d2 uxtb r2, r2
80029f2: 4611 mov r1, r2
80029f4: 4618 mov r0, r3
80029f6: f004 f88a bl 8006b0e <USB_HC_Halt>
}
80029fa: e2f1 b.n 8002fe0 <HCD_HC_OUT_IRQHandler+0x6e2>
else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_NYET) == USB_OTG_HCINT_NYET)
80029fc: 68fb ldr r3, [r7, #12]
80029fe: 015a lsls r2, r3, #5
8002a00: 693b ldr r3, [r7, #16]
8002a02: 4413 add r3, r2
8002a04: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002a08: 689b ldr r3, [r3, #8]
8002a0a: f003 0340 and.w r3, r3, #64 ; 0x40
8002a0e: 2b40 cmp r3, #64 ; 0x40
8002a10: d13f bne.n 8002a92 <HCD_HC_OUT_IRQHandler+0x194>
hhcd->hc[ch_num].state = HC_NYET;
8002a12: 6879 ldr r1, [r7, #4]
8002a14: 68fa ldr r2, [r7, #12]
8002a16: 4613 mov r3, r2
8002a18: 009b lsls r3, r3, #2
8002a1a: 4413 add r3, r2
8002a1c: 00db lsls r3, r3, #3
8002a1e: 440b add r3, r1
8002a20: 335d adds r3, #93 ; 0x5d
8002a22: 2204 movs r2, #4
8002a24: 701a strb r2, [r3, #0]
hhcd->hc[ch_num].do_ping = 1U;
8002a26: 6879 ldr r1, [r7, #4]
8002a28: 68fa ldr r2, [r7, #12]
8002a2a: 4613 mov r3, r2
8002a2c: 009b lsls r3, r3, #2
8002a2e: 4413 add r3, r2
8002a30: 00db lsls r3, r3, #3
8002a32: 440b add r3, r1
8002a34: 333d adds r3, #61 ; 0x3d
8002a36: 2201 movs r2, #1
8002a38: 701a strb r2, [r3, #0]
hhcd->hc[ch_num].ErrCnt = 0U;
8002a3a: 6879 ldr r1, [r7, #4]
8002a3c: 68fa ldr r2, [r7, #12]
8002a3e: 4613 mov r3, r2
8002a40: 009b lsls r3, r3, #2
8002a42: 4413 add r3, r2
8002a44: 00db lsls r3, r3, #3
8002a46: 440b add r3, r1
8002a48: 3358 adds r3, #88 ; 0x58
8002a4a: 2200 movs r2, #0
8002a4c: 601a str r2, [r3, #0]
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
8002a4e: 68fb ldr r3, [r7, #12]
8002a50: 015a lsls r2, r3, #5
8002a52: 693b ldr r3, [r7, #16]
8002a54: 4413 add r3, r2
8002a56: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002a5a: 68db ldr r3, [r3, #12]
8002a5c: 68fa ldr r2, [r7, #12]
8002a5e: 0151 lsls r1, r2, #5
8002a60: 693a ldr r2, [r7, #16]
8002a62: 440a add r2, r1
8002a64: f502 62a0 add.w r2, r2, #1280 ; 0x500
8002a68: f043 0302 orr.w r3, r3, #2
8002a6c: 60d3 str r3, [r2, #12]
(void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
8002a6e: 687b ldr r3, [r7, #4]
8002a70: 681b ldr r3, [r3, #0]
8002a72: 68fa ldr r2, [r7, #12]
8002a74: b2d2 uxtb r2, r2
8002a76: 4611 mov r1, r2
8002a78: 4618 mov r0, r3
8002a7a: f004 f848 bl 8006b0e <USB_HC_Halt>
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_NYET);
8002a7e: 68fb ldr r3, [r7, #12]
8002a80: 015a lsls r2, r3, #5
8002a82: 693b ldr r3, [r7, #16]
8002a84: 4413 add r3, r2
8002a86: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002a8a: 461a mov r2, r3
8002a8c: 2340 movs r3, #64 ; 0x40
8002a8e: 6093 str r3, [r2, #8]
}
8002a90: e2a6 b.n 8002fe0 <HCD_HC_OUT_IRQHandler+0x6e2>
else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_FRMOR) == USB_OTG_HCINT_FRMOR)
8002a92: 68fb ldr r3, [r7, #12]
8002a94: 015a lsls r2, r3, #5
8002a96: 693b ldr r3, [r7, #16]
8002a98: 4413 add r3, r2
8002a9a: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002a9e: 689b ldr r3, [r3, #8]
8002aa0: f403 7300 and.w r3, r3, #512 ; 0x200
8002aa4: f5b3 7f00 cmp.w r3, #512 ; 0x200
8002aa8: d122 bne.n 8002af0 <HCD_HC_OUT_IRQHandler+0x1f2>
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
8002aaa: 68fb ldr r3, [r7, #12]
8002aac: 015a lsls r2, r3, #5
8002aae: 693b ldr r3, [r7, #16]
8002ab0: 4413 add r3, r2
8002ab2: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002ab6: 68db ldr r3, [r3, #12]
8002ab8: 68fa ldr r2, [r7, #12]
8002aba: 0151 lsls r1, r2, #5
8002abc: 693a ldr r2, [r7, #16]
8002abe: 440a add r2, r1
8002ac0: f502 62a0 add.w r2, r2, #1280 ; 0x500
8002ac4: f043 0302 orr.w r3, r3, #2
8002ac8: 60d3 str r3, [r2, #12]
(void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
8002aca: 687b ldr r3, [r7, #4]
8002acc: 681b ldr r3, [r3, #0]
8002ace: 68fa ldr r2, [r7, #12]
8002ad0: b2d2 uxtb r2, r2
8002ad2: 4611 mov r1, r2
8002ad4: 4618 mov r0, r3
8002ad6: f004 f81a bl 8006b0e <USB_HC_Halt>
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_FRMOR);
8002ada: 68fb ldr r3, [r7, #12]
8002adc: 015a lsls r2, r3, #5
8002ade: 693b ldr r3, [r7, #16]
8002ae0: 4413 add r3, r2
8002ae2: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002ae6: 461a mov r2, r3
8002ae8: f44f 7300 mov.w r3, #512 ; 0x200
8002aec: 6093 str r3, [r2, #8]
}
8002aee: e277 b.n 8002fe0 <HCD_HC_OUT_IRQHandler+0x6e2>
else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_XFRC) == USB_OTG_HCINT_XFRC)
8002af0: 68fb ldr r3, [r7, #12]
8002af2: 015a lsls r2, r3, #5
8002af4: 693b ldr r3, [r7, #16]
8002af6: 4413 add r3, r2
8002af8: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002afc: 689b ldr r3, [r3, #8]
8002afe: f003 0301 and.w r3, r3, #1
8002b02: 2b01 cmp r3, #1
8002b04: d135 bne.n 8002b72 <HCD_HC_OUT_IRQHandler+0x274>
hhcd->hc[ch_num].ErrCnt = 0U;
8002b06: 6879 ldr r1, [r7, #4]
8002b08: 68fa ldr r2, [r7, #12]
8002b0a: 4613 mov r3, r2
8002b0c: 009b lsls r3, r3, #2
8002b0e: 4413 add r3, r2
8002b10: 00db lsls r3, r3, #3
8002b12: 440b add r3, r1
8002b14: 3358 adds r3, #88 ; 0x58
8002b16: 2200 movs r2, #0
8002b18: 601a str r2, [r3, #0]
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
8002b1a: 68fb ldr r3, [r7, #12]
8002b1c: 015a lsls r2, r3, #5
8002b1e: 693b ldr r3, [r7, #16]
8002b20: 4413 add r3, r2
8002b22: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002b26: 68db ldr r3, [r3, #12]
8002b28: 68fa ldr r2, [r7, #12]
8002b2a: 0151 lsls r1, r2, #5
8002b2c: 693a ldr r2, [r7, #16]
8002b2e: 440a add r2, r1
8002b30: f502 62a0 add.w r2, r2, #1280 ; 0x500
8002b34: f043 0302 orr.w r3, r3, #2
8002b38: 60d3 str r3, [r2, #12]
(void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
8002b3a: 687b ldr r3, [r7, #4]
8002b3c: 681b ldr r3, [r3, #0]
8002b3e: 68fa ldr r2, [r7, #12]
8002b40: b2d2 uxtb r2, r2
8002b42: 4611 mov r1, r2
8002b44: 4618 mov r0, r3
8002b46: f003 ffe2 bl 8006b0e <USB_HC_Halt>
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_XFRC);
8002b4a: 68fb ldr r3, [r7, #12]
8002b4c: 015a lsls r2, r3, #5
8002b4e: 693b ldr r3, [r7, #16]
8002b50: 4413 add r3, r2
8002b52: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002b56: 461a mov r2, r3
8002b58: 2301 movs r3, #1
8002b5a: 6093 str r3, [r2, #8]
hhcd->hc[ch_num].state = HC_XFRC;
8002b5c: 6879 ldr r1, [r7, #4]
8002b5e: 68fa ldr r2, [r7, #12]
8002b60: 4613 mov r3, r2
8002b62: 009b lsls r3, r3, #2
8002b64: 4413 add r3, r2
8002b66: 00db lsls r3, r3, #3
8002b68: 440b add r3, r1
8002b6a: 335d adds r3, #93 ; 0x5d
8002b6c: 2201 movs r2, #1
8002b6e: 701a strb r2, [r3, #0]
}
8002b70: e236 b.n 8002fe0 <HCD_HC_OUT_IRQHandler+0x6e2>
else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_STALL) == USB_OTG_HCINT_STALL)
8002b72: 68fb ldr r3, [r7, #12]
8002b74: 015a lsls r2, r3, #5
8002b76: 693b ldr r3, [r7, #16]
8002b78: 4413 add r3, r2
8002b7a: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002b7e: 689b ldr r3, [r3, #8]
8002b80: f003 0308 and.w r3, r3, #8
8002b84: 2b08 cmp r3, #8
8002b86: d12b bne.n 8002be0 <HCD_HC_OUT_IRQHandler+0x2e2>
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_STALL);
8002b88: 68fb ldr r3, [r7, #12]
8002b8a: 015a lsls r2, r3, #5
8002b8c: 693b ldr r3, [r7, #16]
8002b8e: 4413 add r3, r2
8002b90: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002b94: 461a mov r2, r3
8002b96: 2308 movs r3, #8
8002b98: 6093 str r3, [r2, #8]
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
8002b9a: 68fb ldr r3, [r7, #12]
8002b9c: 015a lsls r2, r3, #5
8002b9e: 693b ldr r3, [r7, #16]
8002ba0: 4413 add r3, r2
8002ba2: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002ba6: 68db ldr r3, [r3, #12]
8002ba8: 68fa ldr r2, [r7, #12]
8002baa: 0151 lsls r1, r2, #5
8002bac: 693a ldr r2, [r7, #16]
8002bae: 440a add r2, r1
8002bb0: f502 62a0 add.w r2, r2, #1280 ; 0x500
8002bb4: f043 0302 orr.w r3, r3, #2
8002bb8: 60d3 str r3, [r2, #12]
(void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
8002bba: 687b ldr r3, [r7, #4]
8002bbc: 681b ldr r3, [r3, #0]
8002bbe: 68fa ldr r2, [r7, #12]
8002bc0: b2d2 uxtb r2, r2
8002bc2: 4611 mov r1, r2
8002bc4: 4618 mov r0, r3
8002bc6: f003 ffa2 bl 8006b0e <USB_HC_Halt>
hhcd->hc[ch_num].state = HC_STALL;
8002bca: 6879 ldr r1, [r7, #4]
8002bcc: 68fa ldr r2, [r7, #12]
8002bce: 4613 mov r3, r2
8002bd0: 009b lsls r3, r3, #2
8002bd2: 4413 add r3, r2
8002bd4: 00db lsls r3, r3, #3
8002bd6: 440b add r3, r1
8002bd8: 335d adds r3, #93 ; 0x5d
8002bda: 2205 movs r2, #5
8002bdc: 701a strb r2, [r3, #0]
}
8002bde: e1ff b.n 8002fe0 <HCD_HC_OUT_IRQHandler+0x6e2>
else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_NAK) == USB_OTG_HCINT_NAK)
8002be0: 68fb ldr r3, [r7, #12]
8002be2: 015a lsls r2, r3, #5
8002be4: 693b ldr r3, [r7, #16]
8002be6: 4413 add r3, r2
8002be8: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002bec: 689b ldr r3, [r3, #8]
8002bee: f003 0310 and.w r3, r3, #16
8002bf2: 2b10 cmp r3, #16
8002bf4: d155 bne.n 8002ca2 <HCD_HC_OUT_IRQHandler+0x3a4>
hhcd->hc[ch_num].ErrCnt = 0U;
8002bf6: 6879 ldr r1, [r7, #4]
8002bf8: 68fa ldr r2, [r7, #12]
8002bfa: 4613 mov r3, r2
8002bfc: 009b lsls r3, r3, #2
8002bfe: 4413 add r3, r2
8002c00: 00db lsls r3, r3, #3
8002c02: 440b add r3, r1
8002c04: 3358 adds r3, #88 ; 0x58
8002c06: 2200 movs r2, #0
8002c08: 601a str r2, [r3, #0]
hhcd->hc[ch_num].state = HC_NAK;
8002c0a: 6879 ldr r1, [r7, #4]
8002c0c: 68fa ldr r2, [r7, #12]
8002c0e: 4613 mov r3, r2
8002c10: 009b lsls r3, r3, #2
8002c12: 4413 add r3, r2
8002c14: 00db lsls r3, r3, #3
8002c16: 440b add r3, r1
8002c18: 335d adds r3, #93 ; 0x5d
8002c1a: 2203 movs r2, #3
8002c1c: 701a strb r2, [r3, #0]
if (hhcd->hc[ch_num].do_ping == 0U)
8002c1e: 6879 ldr r1, [r7, #4]
8002c20: 68fa ldr r2, [r7, #12]
8002c22: 4613 mov r3, r2
8002c24: 009b lsls r3, r3, #2
8002c26: 4413 add r3, r2
8002c28: 00db lsls r3, r3, #3
8002c2a: 440b add r3, r1
8002c2c: 333d adds r3, #61 ; 0x3d
8002c2e: 781b ldrb r3, [r3, #0]
8002c30: 2b00 cmp r3, #0
8002c32: d114 bne.n 8002c5e <HCD_HC_OUT_IRQHandler+0x360>
if (hhcd->hc[ch_num].speed == HCD_SPEED_HIGH)
8002c34: 6879 ldr r1, [r7, #4]
8002c36: 68fa ldr r2, [r7, #12]
8002c38: 4613 mov r3, r2
8002c3a: 009b lsls r3, r3, #2
8002c3c: 4413 add r3, r2
8002c3e: 00db lsls r3, r3, #3
8002c40: 440b add r3, r1
8002c42: 333c adds r3, #60 ; 0x3c
8002c44: 781b ldrb r3, [r3, #0]
8002c46: 2b00 cmp r3, #0
8002c48: d109 bne.n 8002c5e <HCD_HC_OUT_IRQHandler+0x360>
hhcd->hc[ch_num].do_ping = 1U;
8002c4a: 6879 ldr r1, [r7, #4]
8002c4c: 68fa ldr r2, [r7, #12]
8002c4e: 4613 mov r3, r2
8002c50: 009b lsls r3, r3, #2
8002c52: 4413 add r3, r2
8002c54: 00db lsls r3, r3, #3
8002c56: 440b add r3, r1
8002c58: 333d adds r3, #61 ; 0x3d
8002c5a: 2201 movs r2, #1
8002c5c: 701a strb r2, [r3, #0]
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
8002c5e: 68fb ldr r3, [r7, #12]
8002c60: 015a lsls r2, r3, #5
8002c62: 693b ldr r3, [r7, #16]
8002c64: 4413 add r3, r2
8002c66: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002c6a: 68db ldr r3, [r3, #12]
8002c6c: 68fa ldr r2, [r7, #12]
8002c6e: 0151 lsls r1, r2, #5
8002c70: 693a ldr r2, [r7, #16]
8002c72: 440a add r2, r1
8002c74: f502 62a0 add.w r2, r2, #1280 ; 0x500
8002c78: f043 0302 orr.w r3, r3, #2
8002c7c: 60d3 str r3, [r2, #12]
(void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
8002c7e: 687b ldr r3, [r7, #4]
8002c80: 681b ldr r3, [r3, #0]
8002c82: 68fa ldr r2, [r7, #12]
8002c84: b2d2 uxtb r2, r2
8002c86: 4611 mov r1, r2
8002c88: 4618 mov r0, r3
8002c8a: f003 ff40 bl 8006b0e <USB_HC_Halt>
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_NAK);
8002c8e: 68fb ldr r3, [r7, #12]
8002c90: 015a lsls r2, r3, #5
8002c92: 693b ldr r3, [r7, #16]
8002c94: 4413 add r3, r2
8002c96: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002c9a: 461a mov r2, r3
8002c9c: 2310 movs r3, #16
8002c9e: 6093 str r3, [r2, #8]
}
8002ca0: e19e b.n 8002fe0 <HCD_HC_OUT_IRQHandler+0x6e2>
else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_TXERR) == USB_OTG_HCINT_TXERR)
8002ca2: 68fb ldr r3, [r7, #12]
8002ca4: 015a lsls r2, r3, #5
8002ca6: 693b ldr r3, [r7, #16]
8002ca8: 4413 add r3, r2
8002caa: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002cae: 689b ldr r3, [r3, #8]
8002cb0: f003 0380 and.w r3, r3, #128 ; 0x80
8002cb4: 2b80 cmp r3, #128 ; 0x80
8002cb6: d12b bne.n 8002d10 <HCD_HC_OUT_IRQHandler+0x412>
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
8002cb8: 68fb ldr r3, [r7, #12]
8002cba: 015a lsls r2, r3, #5
8002cbc: 693b ldr r3, [r7, #16]
8002cbe: 4413 add r3, r2
8002cc0: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002cc4: 68db ldr r3, [r3, #12]
8002cc6: 68fa ldr r2, [r7, #12]
8002cc8: 0151 lsls r1, r2, #5
8002cca: 693a ldr r2, [r7, #16]
8002ccc: 440a add r2, r1
8002cce: f502 62a0 add.w r2, r2, #1280 ; 0x500
8002cd2: f043 0302 orr.w r3, r3, #2
8002cd6: 60d3 str r3, [r2, #12]
(void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
8002cd8: 687b ldr r3, [r7, #4]
8002cda: 681b ldr r3, [r3, #0]
8002cdc: 68fa ldr r2, [r7, #12]
8002cde: b2d2 uxtb r2, r2
8002ce0: 4611 mov r1, r2
8002ce2: 4618 mov r0, r3
8002ce4: f003 ff13 bl 8006b0e <USB_HC_Halt>
hhcd->hc[ch_num].state = HC_XACTERR;
8002ce8: 6879 ldr r1, [r7, #4]
8002cea: 68fa ldr r2, [r7, #12]
8002cec: 4613 mov r3, r2
8002cee: 009b lsls r3, r3, #2
8002cf0: 4413 add r3, r2
8002cf2: 00db lsls r3, r3, #3
8002cf4: 440b add r3, r1
8002cf6: 335d adds r3, #93 ; 0x5d
8002cf8: 2206 movs r2, #6
8002cfa: 701a strb r2, [r3, #0]
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_TXERR);
8002cfc: 68fb ldr r3, [r7, #12]
8002cfe: 015a lsls r2, r3, #5
8002d00: 693b ldr r3, [r7, #16]
8002d02: 4413 add r3, r2
8002d04: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002d08: 461a mov r2, r3
8002d0a: 2380 movs r3, #128 ; 0x80
8002d0c: 6093 str r3, [r2, #8]
}
8002d0e: e167 b.n 8002fe0 <HCD_HC_OUT_IRQHandler+0x6e2>
else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_DTERR) == USB_OTG_HCINT_DTERR)
8002d10: 68fb ldr r3, [r7, #12]
8002d12: 015a lsls r2, r3, #5
8002d14: 693b ldr r3, [r7, #16]
8002d16: 4413 add r3, r2
8002d18: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002d1c: 689b ldr r3, [r3, #8]
8002d1e: f403 6380 and.w r3, r3, #1024 ; 0x400
8002d22: f5b3 6f80 cmp.w r3, #1024 ; 0x400
8002d26: d135 bne.n 8002d94 <HCD_HC_OUT_IRQHandler+0x496>
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
8002d28: 68fb ldr r3, [r7, #12]
8002d2a: 015a lsls r2, r3, #5
8002d2c: 693b ldr r3, [r7, #16]
8002d2e: 4413 add r3, r2
8002d30: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002d34: 68db ldr r3, [r3, #12]
8002d36: 68fa ldr r2, [r7, #12]
8002d38: 0151 lsls r1, r2, #5
8002d3a: 693a ldr r2, [r7, #16]
8002d3c: 440a add r2, r1
8002d3e: f502 62a0 add.w r2, r2, #1280 ; 0x500
8002d42: f043 0302 orr.w r3, r3, #2
8002d46: 60d3 str r3, [r2, #12]
(void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
8002d48: 687b ldr r3, [r7, #4]
8002d4a: 681b ldr r3, [r3, #0]
8002d4c: 68fa ldr r2, [r7, #12]
8002d4e: b2d2 uxtb r2, r2
8002d50: 4611 mov r1, r2
8002d52: 4618 mov r0, r3
8002d54: f003 fedb bl 8006b0e <USB_HC_Halt>
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_NAK);
8002d58: 68fb ldr r3, [r7, #12]
8002d5a: 015a lsls r2, r3, #5
8002d5c: 693b ldr r3, [r7, #16]
8002d5e: 4413 add r3, r2
8002d60: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002d64: 461a mov r2, r3
8002d66: 2310 movs r3, #16
8002d68: 6093 str r3, [r2, #8]
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_DTERR);
8002d6a: 68fb ldr r3, [r7, #12]
8002d6c: 015a lsls r2, r3, #5
8002d6e: 693b ldr r3, [r7, #16]
8002d70: 4413 add r3, r2
8002d72: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002d76: 461a mov r2, r3
8002d78: f44f 6380 mov.w r3, #1024 ; 0x400
8002d7c: 6093 str r3, [r2, #8]
hhcd->hc[ch_num].state = HC_DATATGLERR;
8002d7e: 6879 ldr r1, [r7, #4]
8002d80: 68fa ldr r2, [r7, #12]
8002d82: 4613 mov r3, r2
8002d84: 009b lsls r3, r3, #2
8002d86: 4413 add r3, r2
8002d88: 00db lsls r3, r3, #3
8002d8a: 440b add r3, r1
8002d8c: 335d adds r3, #93 ; 0x5d
8002d8e: 2208 movs r2, #8
8002d90: 701a strb r2, [r3, #0]
}
8002d92: e125 b.n 8002fe0 <HCD_HC_OUT_IRQHandler+0x6e2>
else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_CHH) == USB_OTG_HCINT_CHH)
8002d94: 68fb ldr r3, [r7, #12]
8002d96: 015a lsls r2, r3, #5
8002d98: 693b ldr r3, [r7, #16]
8002d9a: 4413 add r3, r2
8002d9c: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002da0: 689b ldr r3, [r3, #8]
8002da2: f003 0302 and.w r3, r3, #2
8002da6: 2b02 cmp r3, #2
8002da8: f040 811a bne.w 8002fe0 <HCD_HC_OUT_IRQHandler+0x6e2>
__HAL_HCD_MASK_HALT_HC_INT(ch_num);
8002dac: 68fb ldr r3, [r7, #12]
8002dae: 015a lsls r2, r3, #5
8002db0: 693b ldr r3, [r7, #16]
8002db2: 4413 add r3, r2
8002db4: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002db8: 68db ldr r3, [r3, #12]
8002dba: 68fa ldr r2, [r7, #12]
8002dbc: 0151 lsls r1, r2, #5
8002dbe: 693a ldr r2, [r7, #16]
8002dc0: 440a add r2, r1
8002dc2: f502 62a0 add.w r2, r2, #1280 ; 0x500
8002dc6: f023 0302 bic.w r3, r3, #2
8002dca: 60d3 str r3, [r2, #12]
if (hhcd->hc[ch_num].state == HC_XFRC)
8002dcc: 6879 ldr r1, [r7, #4]
8002dce: 68fa ldr r2, [r7, #12]
8002dd0: 4613 mov r3, r2
8002dd2: 009b lsls r3, r3, #2
8002dd4: 4413 add r3, r2
8002dd6: 00db lsls r3, r3, #3
8002dd8: 440b add r3, r1
8002dda: 335d adds r3, #93 ; 0x5d
8002ddc: 781b ldrb r3, [r3, #0]
8002dde: 2b01 cmp r3, #1
8002de0: d137 bne.n 8002e52 <HCD_HC_OUT_IRQHandler+0x554>
hhcd->hc[ch_num].urb_state = URB_DONE;
8002de2: 6879 ldr r1, [r7, #4]
8002de4: 68fa ldr r2, [r7, #12]
8002de6: 4613 mov r3, r2
8002de8: 009b lsls r3, r3, #2
8002dea: 4413 add r3, r2
8002dec: 00db lsls r3, r3, #3
8002dee: 440b add r3, r1
8002df0: 335c adds r3, #92 ; 0x5c
8002df2: 2201 movs r2, #1
8002df4: 701a strb r2, [r3, #0]
if ((hhcd->hc[ch_num].ep_type == EP_TYPE_BULK) ||
8002df6: 6879 ldr r1, [r7, #4]
8002df8: 68fa ldr r2, [r7, #12]
8002dfa: 4613 mov r3, r2
8002dfc: 009b lsls r3, r3, #2
8002dfe: 4413 add r3, r2
8002e00: 00db lsls r3, r3, #3
8002e02: 440b add r3, r1
8002e04: 333f adds r3, #63 ; 0x3f
8002e06: 781b ldrb r3, [r3, #0]
8002e08: 2b02 cmp r3, #2
8002e0a: d00b beq.n 8002e24 <HCD_HC_OUT_IRQHandler+0x526>
(hhcd->hc[ch_num].ep_type == EP_TYPE_INTR))
8002e0c: 6879 ldr r1, [r7, #4]
8002e0e: 68fa ldr r2, [r7, #12]
8002e10: 4613 mov r3, r2
8002e12: 009b lsls r3, r3, #2
8002e14: 4413 add r3, r2
8002e16: 00db lsls r3, r3, #3
8002e18: 440b add r3, r1
8002e1a: 333f adds r3, #63 ; 0x3f
8002e1c: 781b ldrb r3, [r3, #0]
if ((hhcd->hc[ch_num].ep_type == EP_TYPE_BULK) ||
8002e1e: 2b03 cmp r3, #3
8002e20: f040 80c5 bne.w 8002fae <HCD_HC_OUT_IRQHandler+0x6b0>
hhcd->hc[ch_num].toggle_out ^= 1U;
8002e24: 6879 ldr r1, [r7, #4]
8002e26: 68fa ldr r2, [r7, #12]
8002e28: 4613 mov r3, r2
8002e2a: 009b lsls r3, r3, #2
8002e2c: 4413 add r3, r2
8002e2e: 00db lsls r3, r3, #3
8002e30: 440b add r3, r1
8002e32: 3351 adds r3, #81 ; 0x51
8002e34: 781b ldrb r3, [r3, #0]
8002e36: f083 0301 eor.w r3, r3, #1
8002e3a: b2d8 uxtb r0, r3
8002e3c: 6879 ldr r1, [r7, #4]
8002e3e: 68fa ldr r2, [r7, #12]
8002e40: 4613 mov r3, r2
8002e42: 009b lsls r3, r3, #2
8002e44: 4413 add r3, r2
8002e46: 00db lsls r3, r3, #3
8002e48: 440b add r3, r1
8002e4a: 3351 adds r3, #81 ; 0x51
8002e4c: 4602 mov r2, r0
8002e4e: 701a strb r2, [r3, #0]
8002e50: e0ad b.n 8002fae <HCD_HC_OUT_IRQHandler+0x6b0>
else if (hhcd->hc[ch_num].state == HC_NAK)
8002e52: 6879 ldr r1, [r7, #4]
8002e54: 68fa ldr r2, [r7, #12]
8002e56: 4613 mov r3, r2
8002e58: 009b lsls r3, r3, #2
8002e5a: 4413 add r3, r2
8002e5c: 00db lsls r3, r3, #3
8002e5e: 440b add r3, r1
8002e60: 335d adds r3, #93 ; 0x5d
8002e62: 781b ldrb r3, [r3, #0]
8002e64: 2b03 cmp r3, #3
8002e66: d10a bne.n 8002e7e <HCD_HC_OUT_IRQHandler+0x580>
hhcd->hc[ch_num].urb_state = URB_NOTREADY;
8002e68: 6879 ldr r1, [r7, #4]
8002e6a: 68fa ldr r2, [r7, #12]
8002e6c: 4613 mov r3, r2
8002e6e: 009b lsls r3, r3, #2
8002e70: 4413 add r3, r2
8002e72: 00db lsls r3, r3, #3
8002e74: 440b add r3, r1
8002e76: 335c adds r3, #92 ; 0x5c
8002e78: 2202 movs r2, #2
8002e7a: 701a strb r2, [r3, #0]
8002e7c: e097 b.n 8002fae <HCD_HC_OUT_IRQHandler+0x6b0>
else if (hhcd->hc[ch_num].state == HC_NYET)
8002e7e: 6879 ldr r1, [r7, #4]
8002e80: 68fa ldr r2, [r7, #12]
8002e82: 4613 mov r3, r2
8002e84: 009b lsls r3, r3, #2
8002e86: 4413 add r3, r2
8002e88: 00db lsls r3, r3, #3
8002e8a: 440b add r3, r1
8002e8c: 335d adds r3, #93 ; 0x5d
8002e8e: 781b ldrb r3, [r3, #0]
8002e90: 2b04 cmp r3, #4
8002e92: d10a bne.n 8002eaa <HCD_HC_OUT_IRQHandler+0x5ac>
hhcd->hc[ch_num].urb_state = URB_NOTREADY;
8002e94: 6879 ldr r1, [r7, #4]
8002e96: 68fa ldr r2, [r7, #12]
8002e98: 4613 mov r3, r2
8002e9a: 009b lsls r3, r3, #2
8002e9c: 4413 add r3, r2
8002e9e: 00db lsls r3, r3, #3
8002ea0: 440b add r3, r1
8002ea2: 335c adds r3, #92 ; 0x5c
8002ea4: 2202 movs r2, #2
8002ea6: 701a strb r2, [r3, #0]
8002ea8: e081 b.n 8002fae <HCD_HC_OUT_IRQHandler+0x6b0>
else if (hhcd->hc[ch_num].state == HC_STALL)
8002eaa: 6879 ldr r1, [r7, #4]
8002eac: 68fa ldr r2, [r7, #12]
8002eae: 4613 mov r3, r2
8002eb0: 009b lsls r3, r3, #2
8002eb2: 4413 add r3, r2
8002eb4: 00db lsls r3, r3, #3
8002eb6: 440b add r3, r1
8002eb8: 335d adds r3, #93 ; 0x5d
8002eba: 781b ldrb r3, [r3, #0]
8002ebc: 2b05 cmp r3, #5
8002ebe: d10a bne.n 8002ed6 <HCD_HC_OUT_IRQHandler+0x5d8>
hhcd->hc[ch_num].urb_state = URB_STALL;
8002ec0: 6879 ldr r1, [r7, #4]
8002ec2: 68fa ldr r2, [r7, #12]
8002ec4: 4613 mov r3, r2
8002ec6: 009b lsls r3, r3, #2
8002ec8: 4413 add r3, r2
8002eca: 00db lsls r3, r3, #3
8002ecc: 440b add r3, r1
8002ece: 335c adds r3, #92 ; 0x5c
8002ed0: 2205 movs r2, #5
8002ed2: 701a strb r2, [r3, #0]
8002ed4: e06b b.n 8002fae <HCD_HC_OUT_IRQHandler+0x6b0>
else if ((hhcd->hc[ch_num].state == HC_XACTERR) ||
8002ed6: 6879 ldr r1, [r7, #4]
8002ed8: 68fa ldr r2, [r7, #12]
8002eda: 4613 mov r3, r2
8002edc: 009b lsls r3, r3, #2
8002ede: 4413 add r3, r2
8002ee0: 00db lsls r3, r3, #3
8002ee2: 440b add r3, r1
8002ee4: 335d adds r3, #93 ; 0x5d
8002ee6: 781b ldrb r3, [r3, #0]
8002ee8: 2b06 cmp r3, #6
8002eea: d00a beq.n 8002f02 <HCD_HC_OUT_IRQHandler+0x604>
(hhcd->hc[ch_num].state == HC_DATATGLERR))
8002eec: 6879 ldr r1, [r7, #4]
8002eee: 68fa ldr r2, [r7, #12]
8002ef0: 4613 mov r3, r2
8002ef2: 009b lsls r3, r3, #2
8002ef4: 4413 add r3, r2
8002ef6: 00db lsls r3, r3, #3
8002ef8: 440b add r3, r1
8002efa: 335d adds r3, #93 ; 0x5d
8002efc: 781b ldrb r3, [r3, #0]
else if ((hhcd->hc[ch_num].state == HC_XACTERR) ||
8002efe: 2b08 cmp r3, #8
8002f00: d155 bne.n 8002fae <HCD_HC_OUT_IRQHandler+0x6b0>
hhcd->hc[ch_num].ErrCnt++;
8002f02: 6879 ldr r1, [r7, #4]
8002f04: 68fa ldr r2, [r7, #12]
8002f06: 4613 mov r3, r2
8002f08: 009b lsls r3, r3, #2
8002f0a: 4413 add r3, r2
8002f0c: 00db lsls r3, r3, #3
8002f0e: 440b add r3, r1
8002f10: 3358 adds r3, #88 ; 0x58
8002f12: 681b ldr r3, [r3, #0]
8002f14: 1c59 adds r1, r3, #1
8002f16: 6878 ldr r0, [r7, #4]
8002f18: 68fa ldr r2, [r7, #12]
8002f1a: 4613 mov r3, r2
8002f1c: 009b lsls r3, r3, #2
8002f1e: 4413 add r3, r2
8002f20: 00db lsls r3, r3, #3
8002f22: 4403 add r3, r0
8002f24: 3358 adds r3, #88 ; 0x58
8002f26: 6019 str r1, [r3, #0]
if (hhcd->hc[ch_num].ErrCnt > 3U)
8002f28: 6879 ldr r1, [r7, #4]
8002f2a: 68fa ldr r2, [r7, #12]
8002f2c: 4613 mov r3, r2
8002f2e: 009b lsls r3, r3, #2
8002f30: 4413 add r3, r2
8002f32: 00db lsls r3, r3, #3
8002f34: 440b add r3, r1
8002f36: 3358 adds r3, #88 ; 0x58
8002f38: 681b ldr r3, [r3, #0]
8002f3a: 2b03 cmp r3, #3
8002f3c: d914 bls.n 8002f68 <HCD_HC_OUT_IRQHandler+0x66a>
hhcd->hc[ch_num].ErrCnt = 0U;
8002f3e: 6879 ldr r1, [r7, #4]
8002f40: 68fa ldr r2, [r7, #12]
8002f42: 4613 mov r3, r2
8002f44: 009b lsls r3, r3, #2
8002f46: 4413 add r3, r2
8002f48: 00db lsls r3, r3, #3
8002f4a: 440b add r3, r1
8002f4c: 3358 adds r3, #88 ; 0x58
8002f4e: 2200 movs r2, #0
8002f50: 601a str r2, [r3, #0]
hhcd->hc[ch_num].urb_state = URB_ERROR;
8002f52: 6879 ldr r1, [r7, #4]
8002f54: 68fa ldr r2, [r7, #12]
8002f56: 4613 mov r3, r2
8002f58: 009b lsls r3, r3, #2
8002f5a: 4413 add r3, r2
8002f5c: 00db lsls r3, r3, #3
8002f5e: 440b add r3, r1
8002f60: 335c adds r3, #92 ; 0x5c
8002f62: 2204 movs r2, #4
8002f64: 701a strb r2, [r3, #0]
8002f66: e009 b.n 8002f7c <HCD_HC_OUT_IRQHandler+0x67e>
hhcd->hc[ch_num].urb_state = URB_NOTREADY;
8002f68: 6879 ldr r1, [r7, #4]
8002f6a: 68fa ldr r2, [r7, #12]
8002f6c: 4613 mov r3, r2
8002f6e: 009b lsls r3, r3, #2
8002f70: 4413 add r3, r2
8002f72: 00db lsls r3, r3, #3
8002f74: 440b add r3, r1
8002f76: 335c adds r3, #92 ; 0x5c
8002f78: 2202 movs r2, #2
8002f7a: 701a strb r2, [r3, #0]
tmpreg = USBx_HC(ch_num)->HCCHAR;
8002f7c: 68fb ldr r3, [r7, #12]
8002f7e: 015a lsls r2, r3, #5
8002f80: 693b ldr r3, [r7, #16]
8002f82: 4413 add r3, r2
8002f84: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002f88: 681b ldr r3, [r3, #0]
8002f8a: 60bb str r3, [r7, #8]
tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
8002f8c: 68bb ldr r3, [r7, #8]
8002f8e: f023 4380 bic.w r3, r3, #1073741824 ; 0x40000000
8002f92: 60bb str r3, [r7, #8]
tmpreg |= USB_OTG_HCCHAR_CHENA;
8002f94: 68bb ldr r3, [r7, #8]
8002f96: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
8002f9a: 60bb str r3, [r7, #8]
USBx_HC(ch_num)->HCCHAR = tmpreg;
8002f9c: 68fb ldr r3, [r7, #12]
8002f9e: 015a lsls r2, r3, #5
8002fa0: 693b ldr r3, [r7, #16]
8002fa2: 4413 add r3, r2
8002fa4: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002fa8: 461a mov r2, r3
8002faa: 68bb ldr r3, [r7, #8]
8002fac: 6013 str r3, [r2, #0]
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_CHH);
8002fae: 68fb ldr r3, [r7, #12]
8002fb0: 015a lsls r2, r3, #5
8002fb2: 693b ldr r3, [r7, #16]
8002fb4: 4413 add r3, r2
8002fb6: f503 63a0 add.w r3, r3, #1280 ; 0x500
8002fba: 461a mov r2, r3
8002fbc: 2302 movs r3, #2
8002fbe: 6093 str r3, [r2, #8]
HAL_HCD_HC_NotifyURBChange_Callback(hhcd, (uint8_t)ch_num, hhcd->hc[ch_num].urb_state);
8002fc0: 68fb ldr r3, [r7, #12]
8002fc2: b2d8 uxtb r0, r3
8002fc4: 6879 ldr r1, [r7, #4]
8002fc6: 68fa ldr r2, [r7, #12]
8002fc8: 4613 mov r3, r2
8002fca: 009b lsls r3, r3, #2
8002fcc: 4413 add r3, r2
8002fce: 00db lsls r3, r3, #3
8002fd0: 440b add r3, r1
8002fd2: 335c adds r3, #92 ; 0x5c
8002fd4: 781b ldrb r3, [r3, #0]
8002fd6: 461a mov r2, r3
8002fd8: 4601 mov r1, r0
8002fda: 6878 ldr r0, [r7, #4]
8002fdc: f005 ff3a bl 8008e54 <HAL_HCD_HC_NotifyURBChange_Callback>
}
8002fe0: bf00 nop
8002fe2: 3718 adds r7, #24
8002fe4: 46bd mov sp, r7
8002fe6: bd80 pop {r7, pc}
08002fe8 <HCD_RXQLVL_IRQHandler>:
* @brief Handle Rx Queue Level interrupt requests.
* @param hhcd HCD handle
* @retval none
*/
static void HCD_RXQLVL_IRQHandler(HCD_HandleTypeDef *hhcd)
{
8002fe8: b580 push {r7, lr}
8002fea: b08a sub sp, #40 ; 0x28
8002fec: af00 add r7, sp, #0
8002fee: 6078 str r0, [r7, #4]
USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
8002ff0: 687b ldr r3, [r7, #4]
8002ff2: 681b ldr r3, [r3, #0]
8002ff4: 627b str r3, [r7, #36] ; 0x24
uint32_t USBx_BASE = (uint32_t)USBx;
8002ff6: 6a7b ldr r3, [r7, #36] ; 0x24
8002ff8: 623b str r3, [r7, #32]
uint32_t pktcnt;
uint32_t temp;
uint32_t tmpreg;
uint32_t ch_num;
temp = hhcd->Instance->GRXSTSP;
8002ffa: 687b ldr r3, [r7, #4]
8002ffc: 681b ldr r3, [r3, #0]
8002ffe: 6a1b ldr r3, [r3, #32]
8003000: 61fb str r3, [r7, #28]
ch_num = temp & USB_OTG_GRXSTSP_EPNUM;
8003002: 69fb ldr r3, [r7, #28]
8003004: f003 030f and.w r3, r3, #15
8003008: 61bb str r3, [r7, #24]
pktsts = (temp & USB_OTG_GRXSTSP_PKTSTS) >> 17;
800300a: 69fb ldr r3, [r7, #28]
800300c: 0c5b lsrs r3, r3, #17
800300e: f003 030f and.w r3, r3, #15
8003012: 617b str r3, [r7, #20]
pktcnt = (temp & USB_OTG_GRXSTSP_BCNT) >> 4;
8003014: 69fb ldr r3, [r7, #28]
8003016: 091b lsrs r3, r3, #4
8003018: f3c3 030a ubfx r3, r3, #0, #11
800301c: 613b str r3, [r7, #16]
switch (pktsts)
800301e: 697b ldr r3, [r7, #20]
8003020: 2b02 cmp r3, #2
8003022: d003 beq.n 800302c <HCD_RXQLVL_IRQHandler+0x44>
8003024: 2b05 cmp r3, #5
8003026: f000 8082 beq.w 800312e <HCD_RXQLVL_IRQHandler+0x146>
break;
case GRXSTS_PKTSTS_IN_XFER_COMP:
case GRXSTS_PKTSTS_CH_HALTED:
default:
break;
800302a: e083 b.n 8003134 <HCD_RXQLVL_IRQHandler+0x14c>
if ((pktcnt > 0U) && (hhcd->hc[ch_num].xfer_buff != (void *)0))
800302c: 693b ldr r3, [r7, #16]
800302e: 2b00 cmp r3, #0
8003030: d07f beq.n 8003132 <HCD_RXQLVL_IRQHandler+0x14a>
8003032: 6879 ldr r1, [r7, #4]
8003034: 69ba ldr r2, [r7, #24]
8003036: 4613 mov r3, r2
8003038: 009b lsls r3, r3, #2
800303a: 4413 add r3, r2
800303c: 00db lsls r3, r3, #3
800303e: 440b add r3, r1
8003040: 3344 adds r3, #68 ; 0x44
8003042: 681b ldr r3, [r3, #0]
8003044: 2b00 cmp r3, #0
8003046: d074 beq.n 8003132 <HCD_RXQLVL_IRQHandler+0x14a>
(void)USB_ReadPacket(hhcd->Instance, hhcd->hc[ch_num].xfer_buff, (uint16_t)pktcnt);
8003048: 687b ldr r3, [r7, #4]
800304a: 6818 ldr r0, [r3, #0]
800304c: 6879 ldr r1, [r7, #4]
800304e: 69ba ldr r2, [r7, #24]
8003050: 4613 mov r3, r2
8003052: 009b lsls r3, r3, #2
8003054: 4413 add r3, r2
8003056: 00db lsls r3, r3, #3
8003058: 440b add r3, r1
800305a: 3344 adds r3, #68 ; 0x44
800305c: 681b ldr r3, [r3, #0]
800305e: 693a ldr r2, [r7, #16]
8003060: b292 uxth r2, r2
8003062: 4619 mov r1, r3
8003064: f003 f8f1 bl 800624a <USB_ReadPacket>
hhcd->hc[ch_num].xfer_buff += pktcnt;
8003068: 6879 ldr r1, [r7, #4]
800306a: 69ba ldr r2, [r7, #24]
800306c: 4613 mov r3, r2
800306e: 009b lsls r3, r3, #2
8003070: 4413 add r3, r2
8003072: 00db lsls r3, r3, #3
8003074: 440b add r3, r1
8003076: 3344 adds r3, #68 ; 0x44
8003078: 681a ldr r2, [r3, #0]
800307a: 693b ldr r3, [r7, #16]
800307c: 18d1 adds r1, r2, r3
800307e: 6878 ldr r0, [r7, #4]
8003080: 69ba ldr r2, [r7, #24]
8003082: 4613 mov r3, r2
8003084: 009b lsls r3, r3, #2
8003086: 4413 add r3, r2
8003088: 00db lsls r3, r3, #3
800308a: 4403 add r3, r0
800308c: 3344 adds r3, #68 ; 0x44
800308e: 6019 str r1, [r3, #0]
hhcd->hc[ch_num].xfer_count += pktcnt;
8003090: 6879 ldr r1, [r7, #4]
8003092: 69ba ldr r2, [r7, #24]
8003094: 4613 mov r3, r2
8003096: 009b lsls r3, r3, #2
8003098: 4413 add r3, r2
800309a: 00db lsls r3, r3, #3
800309c: 440b add r3, r1
800309e: 334c adds r3, #76 ; 0x4c
80030a0: 681a ldr r2, [r3, #0]
80030a2: 693b ldr r3, [r7, #16]
80030a4: 18d1 adds r1, r2, r3
80030a6: 6878 ldr r0, [r7, #4]
80030a8: 69ba ldr r2, [r7, #24]
80030aa: 4613 mov r3, r2
80030ac: 009b lsls r3, r3, #2
80030ae: 4413 add r3, r2
80030b0: 00db lsls r3, r3, #3
80030b2: 4403 add r3, r0
80030b4: 334c adds r3, #76 ; 0x4c
80030b6: 6019 str r1, [r3, #0]
if ((USBx_HC(ch_num)->HCTSIZ & USB_OTG_HCTSIZ_PKTCNT) > 0U)
80030b8: 69bb ldr r3, [r7, #24]
80030ba: 015a lsls r2, r3, #5
80030bc: 6a3b ldr r3, [r7, #32]
80030be: 4413 add r3, r2
80030c0: f503 63a0 add.w r3, r3, #1280 ; 0x500
80030c4: 691a ldr r2, [r3, #16]
80030c6: 4b1d ldr r3, [pc, #116] ; (800313c <HCD_RXQLVL_IRQHandler+0x154>)
80030c8: 4013 ands r3, r2
80030ca: 2b00 cmp r3, #0
80030cc: d031 beq.n 8003132 <HCD_RXQLVL_IRQHandler+0x14a>
tmpreg = USBx_HC(ch_num)->HCCHAR;
80030ce: 69bb ldr r3, [r7, #24]
80030d0: 015a lsls r2, r3, #5
80030d2: 6a3b ldr r3, [r7, #32]
80030d4: 4413 add r3, r2
80030d6: f503 63a0 add.w r3, r3, #1280 ; 0x500
80030da: 681b ldr r3, [r3, #0]
80030dc: 60fb str r3, [r7, #12]
tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
80030de: 68fb ldr r3, [r7, #12]
80030e0: f023 4380 bic.w r3, r3, #1073741824 ; 0x40000000
80030e4: 60fb str r3, [r7, #12]
tmpreg |= USB_OTG_HCCHAR_CHENA;
80030e6: 68fb ldr r3, [r7, #12]
80030e8: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
80030ec: 60fb str r3, [r7, #12]
USBx_HC(ch_num)->HCCHAR = tmpreg;
80030ee: 69bb ldr r3, [r7, #24]
80030f0: 015a lsls r2, r3, #5
80030f2: 6a3b ldr r3, [r7, #32]
80030f4: 4413 add r3, r2
80030f6: f503 63a0 add.w r3, r3, #1280 ; 0x500
80030fa: 461a mov r2, r3
80030fc: 68fb ldr r3, [r7, #12]
80030fe: 6013 str r3, [r2, #0]
hhcd->hc[ch_num].toggle_in ^= 1U;
8003100: 6879 ldr r1, [r7, #4]
8003102: 69ba ldr r2, [r7, #24]
8003104: 4613 mov r3, r2
8003106: 009b lsls r3, r3, #2
8003108: 4413 add r3, r2
800310a: 00db lsls r3, r3, #3
800310c: 440b add r3, r1
800310e: 3350 adds r3, #80 ; 0x50
8003110: 781b ldrb r3, [r3, #0]
8003112: f083 0301 eor.w r3, r3, #1
8003116: b2d8 uxtb r0, r3
8003118: 6879 ldr r1, [r7, #4]
800311a: 69ba ldr r2, [r7, #24]
800311c: 4613 mov r3, r2
800311e: 009b lsls r3, r3, #2
8003120: 4413 add r3, r2
8003122: 00db lsls r3, r3, #3
8003124: 440b add r3, r1
8003126: 3350 adds r3, #80 ; 0x50
8003128: 4602 mov r2, r0
800312a: 701a strb r2, [r3, #0]
break;
800312c: e001 b.n 8003132 <HCD_RXQLVL_IRQHandler+0x14a>
break;
800312e: bf00 nop
8003130: e000 b.n 8003134 <HCD_RXQLVL_IRQHandler+0x14c>
break;
8003132: bf00 nop
}
}
8003134: bf00 nop
8003136: 3728 adds r7, #40 ; 0x28
8003138: 46bd mov sp, r7
800313a: bd80 pop {r7, pc}
800313c: 1ff80000 .word 0x1ff80000
08003140 <HCD_Port_IRQHandler>:
* @brief Handle Host Port interrupt requests.
* @param hhcd HCD handle
* @retval None
*/
static void HCD_Port_IRQHandler(HCD_HandleTypeDef *hhcd)
{
8003140: b580 push {r7, lr}
8003142: b086 sub sp, #24
8003144: af00 add r7, sp, #0
8003146: 6078 str r0, [r7, #4]
USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
8003148: 687b ldr r3, [r7, #4]
800314a: 681b ldr r3, [r3, #0]
800314c: 617b str r3, [r7, #20]
uint32_t USBx_BASE = (uint32_t)USBx;
800314e: 697b ldr r3, [r7, #20]
8003150: 613b str r3, [r7, #16]
__IO uint32_t hprt0, hprt0_dup;
/* Handle Host Port Interrupts */
hprt0 = USBx_HPRT0;
8003152: 693b ldr r3, [r7, #16]
8003154: f503 6388 add.w r3, r3, #1088 ; 0x440
8003158: 681b ldr r3, [r3, #0]
800315a: 60fb str r3, [r7, #12]
hprt0_dup = USBx_HPRT0;
800315c: 693b ldr r3, [r7, #16]
800315e: f503 6388 add.w r3, r3, #1088 ; 0x440
8003162: 681b ldr r3, [r3, #0]
8003164: 60bb str r3, [r7, #8]
hprt0_dup &= ~(USB_OTG_HPRT_PENA | USB_OTG_HPRT_PCDET | \
8003166: 68bb ldr r3, [r7, #8]
8003168: f023 032e bic.w r3, r3, #46 ; 0x2e
800316c: 60bb str r3, [r7, #8]
USB_OTG_HPRT_PENCHNG | USB_OTG_HPRT_POCCHNG);
/* Check whether Port Connect detected */
if ((hprt0 & USB_OTG_HPRT_PCDET) == USB_OTG_HPRT_PCDET)
800316e: 68fb ldr r3, [r7, #12]
8003170: f003 0302 and.w r3, r3, #2
8003174: 2b02 cmp r3, #2
8003176: d10b bne.n 8003190 <HCD_Port_IRQHandler+0x50>
{
if ((hprt0 & USB_OTG_HPRT_PCSTS) == USB_OTG_HPRT_PCSTS)
8003178: 68fb ldr r3, [r7, #12]
800317a: f003 0301 and.w r3, r3, #1
800317e: 2b01 cmp r3, #1
8003180: d102 bne.n 8003188 <HCD_Port_IRQHandler+0x48>
{
#if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
hhcd->ConnectCallback(hhcd);
#else
HAL_HCD_Connect_Callback(hhcd);
8003182: 6878 ldr r0, [r7, #4]
8003184: f005 fe4a bl 8008e1c <HAL_HCD_Connect_Callback>
#endif /* USE_HAL_HCD_REGISTER_CALLBACKS */
}
hprt0_dup |= USB_OTG_HPRT_PCDET;
8003188: 68bb ldr r3, [r7, #8]
800318a: f043 0302 orr.w r3, r3, #2
800318e: 60bb str r3, [r7, #8]
}
/* Check whether Port Enable Changed */
if ((hprt0 & USB_OTG_HPRT_PENCHNG) == USB_OTG_HPRT_PENCHNG)
8003190: 68fb ldr r3, [r7, #12]
8003192: f003 0308 and.w r3, r3, #8
8003196: 2b08 cmp r3, #8
8003198: d132 bne.n 8003200 <HCD_Port_IRQHandler+0xc0>
{
hprt0_dup |= USB_OTG_HPRT_PENCHNG;
800319a: 68bb ldr r3, [r7, #8]
800319c: f043 0308 orr.w r3, r3, #8
80031a0: 60bb str r3, [r7, #8]
if ((hprt0 & USB_OTG_HPRT_PENA) == USB_OTG_HPRT_PENA)
80031a2: 68fb ldr r3, [r7, #12]
80031a4: f003 0304 and.w r3, r3, #4
80031a8: 2b04 cmp r3, #4
80031aa: d126 bne.n 80031fa <HCD_Port_IRQHandler+0xba>
{
if (hhcd->Init.phy_itface == USB_OTG_EMBEDDED_PHY)
80031ac: 687b ldr r3, [r7, #4]
80031ae: 699b ldr r3, [r3, #24]
80031b0: 2b02 cmp r3, #2
80031b2: d113 bne.n 80031dc <HCD_Port_IRQHandler+0x9c>
{
if ((hprt0 & USB_OTG_HPRT_PSPD) == (HPRT0_PRTSPD_LOW_SPEED << 17))
80031b4: 68fb ldr r3, [r7, #12]
80031b6: f403 23c0 and.w r3, r3, #393216 ; 0x60000
80031ba: f5b3 2f80 cmp.w r3, #262144 ; 0x40000
80031be: d106 bne.n 80031ce <HCD_Port_IRQHandler+0x8e>
{
(void)USB_InitFSLSPClkSel(hhcd->Instance, HCFG_6_MHZ);
80031c0: 687b ldr r3, [r7, #4]
80031c2: 681b ldr r3, [r3, #0]
80031c4: 2102 movs r1, #2
80031c6: 4618 mov r0, r3
80031c8: f003 f97a bl 80064c0 <USB_InitFSLSPClkSel>
80031cc: e011 b.n 80031f2 <HCD_Port_IRQHandler+0xb2>
}
else
{
(void)USB_InitFSLSPClkSel(hhcd->Instance, HCFG_48_MHZ);
80031ce: 687b ldr r3, [r7, #4]
80031d0: 681b ldr r3, [r3, #0]
80031d2: 2101 movs r1, #1
80031d4: 4618 mov r0, r3
80031d6: f003 f973 bl 80064c0 <USB_InitFSLSPClkSel>
80031da: e00a b.n 80031f2 <HCD_Port_IRQHandler+0xb2>
}
}
else
{
if (hhcd->Init.speed == HCD_SPEED_FULL)
80031dc: 687b ldr r3, [r7, #4]
80031de: 68db ldr r3, [r3, #12]
80031e0: 2b01 cmp r3, #1
80031e2: d106 bne.n 80031f2 <HCD_Port_IRQHandler+0xb2>
{
USBx_HOST->HFIR = 60000U;
80031e4: 693b ldr r3, [r7, #16]
80031e6: f503 6380 add.w r3, r3, #1024 ; 0x400
80031ea: 461a mov r2, r3
80031ec: f64e 2360 movw r3, #60000 ; 0xea60
80031f0: 6053 str r3, [r2, #4]
}
}
#if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
hhcd->PortEnabledCallback(hhcd);
#else
HAL_HCD_PortEnabled_Callback(hhcd);
80031f2: 6878 ldr r0, [r7, #4]
80031f4: f005 fe3c bl 8008e70 <HAL_HCD_PortEnabled_Callback>
80031f8: e002 b.n 8003200 <HCD_Port_IRQHandler+0xc0>
else
{
#if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
hhcd->PortDisabledCallback(hhcd);
#else
HAL_HCD_PortDisabled_Callback(hhcd);
80031fa: 6878 ldr r0, [r7, #4]
80031fc: f005 fe46 bl 8008e8c <HAL_HCD_PortDisabled_Callback>
#endif /* USE_HAL_HCD_REGISTER_CALLBACKS */
}
}
/* Check for an overcurrent */
if ((hprt0 & USB_OTG_HPRT_POCCHNG) == USB_OTG_HPRT_POCCHNG)
8003200: 68fb ldr r3, [r7, #12]
8003202: f003 0320 and.w r3, r3, #32
8003206: 2b20 cmp r3, #32
8003208: d103 bne.n 8003212 <HCD_Port_IRQHandler+0xd2>
{
hprt0_dup |= USB_OTG_HPRT_POCCHNG;
800320a: 68bb ldr r3, [r7, #8]
800320c: f043 0320 orr.w r3, r3, #32
8003210: 60bb str r3, [r7, #8]
}
/* Clear Port Interrupts */
USBx_HPRT0 = hprt0_dup;
8003212: 693b ldr r3, [r7, #16]
8003214: f503 6388 add.w r3, r3, #1088 ; 0x440
8003218: 461a mov r2, r3
800321a: 68bb ldr r3, [r7, #8]
800321c: 6013 str r3, [r2, #0]
}
800321e: bf00 nop
8003220: 3718 adds r7, #24
8003222: 46bd mov sp, r7
8003224: bd80 pop {r7, pc}
...
08003228 <HAL_I2C_Init>:
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
* the configuration information for the specified I2C.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
{
8003228: b580 push {r7, lr}
800322a: b084 sub sp, #16
800322c: af00 add r7, sp, #0
800322e: 6078 str r0, [r7, #4]
uint32_t freqrange;
uint32_t pclk1;
/* Check the I2C handle allocation */
if (hi2c == NULL)
8003230: 687b ldr r3, [r7, #4]
8003232: 2b00 cmp r3, #0
8003234: d101 bne.n 800323a <HAL_I2C_Init+0x12>
{
return HAL_ERROR;
8003236: 2301 movs r3, #1
8003238: e11f b.n 800347a <HAL_I2C_Init+0x252>
assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
if (hi2c->State == HAL_I2C_STATE_RESET)
800323a: 687b ldr r3, [r7, #4]
800323c: f893 303d ldrb.w r3, [r3, #61] ; 0x3d
8003240: b2db uxtb r3, r3
8003242: 2b00 cmp r3, #0
8003244: d106 bne.n 8003254 <HAL_I2C_Init+0x2c>
{
/* Allocate lock resource and initialize it */
hi2c->Lock = HAL_UNLOCKED;
8003246: 687b ldr r3, [r7, #4]
8003248: 2200 movs r2, #0
800324a: f883 203c strb.w r2, [r3, #60] ; 0x3c
/* Init the low level hardware : GPIO, CLOCK, NVIC */
hi2c->MspInitCallback(hi2c);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC */
HAL_I2C_MspInit(hi2c);
800324e: 6878 ldr r0, [r7, #4]
8003250: f7fd fc88 bl 8000b64 <HAL_I2C_MspInit>
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
}
hi2c->State = HAL_I2C_STATE_BUSY;
8003254: 687b ldr r3, [r7, #4]
8003256: 2224 movs r2, #36 ; 0x24
8003258: f883 203d strb.w r2, [r3, #61] ; 0x3d
/* Disable the selected I2C peripheral */
__HAL_I2C_DISABLE(hi2c);
800325c: 687b ldr r3, [r7, #4]
800325e: 681b ldr r3, [r3, #0]
8003260: 681a ldr r2, [r3, #0]
8003262: 687b ldr r3, [r7, #4]
8003264: 681b ldr r3, [r3, #0]
8003266: f022 0201 bic.w r2, r2, #1
800326a: 601a str r2, [r3, #0]
/*Reset I2C*/
hi2c->Instance->CR1 |= I2C_CR1_SWRST;
800326c: 687b ldr r3, [r7, #4]
800326e: 681b ldr r3, [r3, #0]
8003270: 681a ldr r2, [r3, #0]
8003272: 687b ldr r3, [r7, #4]
8003274: 681b ldr r3, [r3, #0]
8003276: f442 4200 orr.w r2, r2, #32768 ; 0x8000
800327a: 601a str r2, [r3, #0]
hi2c->Instance->CR1 &= ~I2C_CR1_SWRST;
800327c: 687b ldr r3, [r7, #4]
800327e: 681b ldr r3, [r3, #0]
8003280: 681a ldr r2, [r3, #0]
8003282: 687b ldr r3, [r7, #4]
8003284: 681b ldr r3, [r3, #0]
8003286: f422 4200 bic.w r2, r2, #32768 ; 0x8000
800328a: 601a str r2, [r3, #0]
/* Get PCLK1 frequency */
pclk1 = HAL_RCC_GetPCLK1Freq();
800328c: f002 f830 bl 80052f0 <HAL_RCC_GetPCLK1Freq>
8003290: 60f8 str r0, [r7, #12]
/* Check the minimum allowed PCLK1 frequency */
if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U)
8003292: 687b ldr r3, [r7, #4]
8003294: 685b ldr r3, [r3, #4]
8003296: 4a7b ldr r2, [pc, #492] ; (8003484 <HAL_I2C_Init+0x25c>)
8003298: 4293 cmp r3, r2
800329a: d807 bhi.n 80032ac <HAL_I2C_Init+0x84>
800329c: 68fb ldr r3, [r7, #12]
800329e: 4a7a ldr r2, [pc, #488] ; (8003488 <HAL_I2C_Init+0x260>)
80032a0: 4293 cmp r3, r2
80032a2: bf94 ite ls
80032a4: 2301 movls r3, #1
80032a6: 2300 movhi r3, #0
80032a8: b2db uxtb r3, r3
80032aa: e006 b.n 80032ba <HAL_I2C_Init+0x92>
80032ac: 68fb ldr r3, [r7, #12]
80032ae: 4a77 ldr r2, [pc, #476] ; (800348c <HAL_I2C_Init+0x264>)
80032b0: 4293 cmp r3, r2
80032b2: bf94 ite ls
80032b4: 2301 movls r3, #1
80032b6: 2300 movhi r3, #0
80032b8: b2db uxtb r3, r3
80032ba: 2b00 cmp r3, #0
80032bc: d001 beq.n 80032c2 <HAL_I2C_Init+0x9a>
{
return HAL_ERROR;
80032be: 2301 movs r3, #1
80032c0: e0db b.n 800347a <HAL_I2C_Init+0x252>
}
/* Calculate frequency range */
freqrange = I2C_FREQRANGE(pclk1);
80032c2: 68fb ldr r3, [r7, #12]
80032c4: 4a72 ldr r2, [pc, #456] ; (8003490 <HAL_I2C_Init+0x268>)
80032c6: fba2 2303 umull r2, r3, r2, r3
80032ca: 0c9b lsrs r3, r3, #18
80032cc: 60bb str r3, [r7, #8]
/*---------------------------- I2Cx CR2 Configuration ----------------------*/
/* Configure I2Cx: Frequency range */
MODIFY_REG(hi2c->Instance->CR2, I2C_CR2_FREQ, freqrange);
80032ce: 687b ldr r3, [r7, #4]
80032d0: 681b ldr r3, [r3, #0]
80032d2: 685b ldr r3, [r3, #4]
80032d4: f023 013f bic.w r1, r3, #63 ; 0x3f
80032d8: 687b ldr r3, [r7, #4]
80032da: 681b ldr r3, [r3, #0]
80032dc: 68ba ldr r2, [r7, #8]
80032de: 430a orrs r2, r1
80032e0: 605a str r2, [r3, #4]
/*---------------------------- I2Cx TRISE Configuration --------------------*/
/* Configure I2Cx: Rise Time */
MODIFY_REG(hi2c->Instance->TRISE, I2C_TRISE_TRISE, I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed));
80032e2: 687b ldr r3, [r7, #4]
80032e4: 681b ldr r3, [r3, #0]
80032e6: 6a1b ldr r3, [r3, #32]
80032e8: f023 013f bic.w r1, r3, #63 ; 0x3f
80032ec: 687b ldr r3, [r7, #4]
80032ee: 685b ldr r3, [r3, #4]
80032f0: 4a64 ldr r2, [pc, #400] ; (8003484 <HAL_I2C_Init+0x25c>)
80032f2: 4293 cmp r3, r2
80032f4: d802 bhi.n 80032fc <HAL_I2C_Init+0xd4>
80032f6: 68bb ldr r3, [r7, #8]
80032f8: 3301 adds r3, #1
80032fa: e009 b.n 8003310 <HAL_I2C_Init+0xe8>
80032fc: 68bb ldr r3, [r7, #8]
80032fe: f44f 7296 mov.w r2, #300 ; 0x12c
8003302: fb02 f303 mul.w r3, r2, r3
8003306: 4a63 ldr r2, [pc, #396] ; (8003494 <HAL_I2C_Init+0x26c>)
8003308: fba2 2303 umull r2, r3, r2, r3
800330c: 099b lsrs r3, r3, #6
800330e: 3301 adds r3, #1
8003310: 687a ldr r2, [r7, #4]
8003312: 6812 ldr r2, [r2, #0]
8003314: 430b orrs r3, r1
8003316: 6213 str r3, [r2, #32]
/*---------------------------- I2Cx CCR Configuration ----------------------*/
/* Configure I2Cx: Speed */
MODIFY_REG(hi2c->Instance->CCR, (I2C_CCR_FS | I2C_CCR_DUTY | I2C_CCR_CCR), I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle));
8003318: 687b ldr r3, [r7, #4]
800331a: 681b ldr r3, [r3, #0]
800331c: 69db ldr r3, [r3, #28]
800331e: f423 424f bic.w r2, r3, #52992 ; 0xcf00
8003322: f022 02ff bic.w r2, r2, #255 ; 0xff
8003326: 687b ldr r3, [r7, #4]
8003328: 685b ldr r3, [r3, #4]
800332a: 4956 ldr r1, [pc, #344] ; (8003484 <HAL_I2C_Init+0x25c>)
800332c: 428b cmp r3, r1
800332e: d80d bhi.n 800334c <HAL_I2C_Init+0x124>
8003330: 68fb ldr r3, [r7, #12]
8003332: 1e59 subs r1, r3, #1
8003334: 687b ldr r3, [r7, #4]
8003336: 685b ldr r3, [r3, #4]
8003338: 005b lsls r3, r3, #1
800333a: fbb1 f3f3 udiv r3, r1, r3
800333e: 3301 adds r3, #1
8003340: f3c3 030b ubfx r3, r3, #0, #12
8003344: 2b04 cmp r3, #4
8003346: bf38 it cc
8003348: 2304 movcc r3, #4
800334a: e04f b.n 80033ec <HAL_I2C_Init+0x1c4>
800334c: 687b ldr r3, [r7, #4]
800334e: 689b ldr r3, [r3, #8]
8003350: 2b00 cmp r3, #0
8003352: d111 bne.n 8003378 <HAL_I2C_Init+0x150>
8003354: 68fb ldr r3, [r7, #12]
8003356: 1e58 subs r0, r3, #1
8003358: 687b ldr r3, [r7, #4]
800335a: 6859 ldr r1, [r3, #4]
800335c: 460b mov r3, r1
800335e: 005b lsls r3, r3, #1
8003360: 440b add r3, r1
8003362: fbb0 f3f3 udiv r3, r0, r3
8003366: 3301 adds r3, #1
8003368: f3c3 030b ubfx r3, r3, #0, #12
800336c: 2b00 cmp r3, #0
800336e: bf0c ite eq
8003370: 2301 moveq r3, #1
8003372: 2300 movne r3, #0
8003374: b2db uxtb r3, r3
8003376: e012 b.n 800339e <HAL_I2C_Init+0x176>
8003378: 68fb ldr r3, [r7, #12]
800337a: 1e58 subs r0, r3, #1
800337c: 687b ldr r3, [r7, #4]
800337e: 6859 ldr r1, [r3, #4]
8003380: 460b mov r3, r1
8003382: 009b lsls r3, r3, #2
8003384: 440b add r3, r1
8003386: 0099 lsls r1, r3, #2
8003388: 440b add r3, r1
800338a: fbb0 f3f3 udiv r3, r0, r3
800338e: 3301 adds r3, #1
8003390: f3c3 030b ubfx r3, r3, #0, #12
8003394: 2b00 cmp r3, #0
8003396: bf0c ite eq
8003398: 2301 moveq r3, #1
800339a: 2300 movne r3, #0
800339c: b2db uxtb r3, r3
800339e: 2b00 cmp r3, #0
80033a0: d001 beq.n 80033a6 <HAL_I2C_Init+0x17e>
80033a2: 2301 movs r3, #1
80033a4: e022 b.n 80033ec <HAL_I2C_Init+0x1c4>
80033a6: 687b ldr r3, [r7, #4]
80033a8: 689b ldr r3, [r3, #8]
80033aa: 2b00 cmp r3, #0
80033ac: d10e bne.n 80033cc <HAL_I2C_Init+0x1a4>
80033ae: 68fb ldr r3, [r7, #12]
80033b0: 1e58 subs r0, r3, #1
80033b2: 687b ldr r3, [r7, #4]
80033b4: 6859 ldr r1, [r3, #4]
80033b6: 460b mov r3, r1
80033b8: 005b lsls r3, r3, #1
80033ba: 440b add r3, r1
80033bc: fbb0 f3f3 udiv r3, r0, r3
80033c0: 3301 adds r3, #1
80033c2: f3c3 030b ubfx r3, r3, #0, #12
80033c6: f443 4300 orr.w r3, r3, #32768 ; 0x8000
80033ca: e00f b.n 80033ec <HAL_I2C_Init+0x1c4>
80033cc: 68fb ldr r3, [r7, #12]
80033ce: 1e58 subs r0, r3, #1
80033d0: 687b ldr r3, [r7, #4]
80033d2: 6859 ldr r1, [r3, #4]
80033d4: 460b mov r3, r1
80033d6: 009b lsls r3, r3, #2
80033d8: 440b add r3, r1
80033da: 0099 lsls r1, r3, #2
80033dc: 440b add r3, r1
80033de: fbb0 f3f3 udiv r3, r0, r3
80033e2: 3301 adds r3, #1
80033e4: f3c3 030b ubfx r3, r3, #0, #12
80033e8: f443 4340 orr.w r3, r3, #49152 ; 0xc000
80033ec: 6879 ldr r1, [r7, #4]
80033ee: 6809 ldr r1, [r1, #0]
80033f0: 4313 orrs r3, r2
80033f2: 61cb str r3, [r1, #28]
/*---------------------------- I2Cx CR1 Configuration ----------------------*/
/* Configure I2Cx: Generalcall and NoStretch mode */
MODIFY_REG(hi2c->Instance->CR1, (I2C_CR1_ENGC | I2C_CR1_NOSTRETCH), (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode));
80033f4: 687b ldr r3, [r7, #4]
80033f6: 681b ldr r3, [r3, #0]
80033f8: 681b ldr r3, [r3, #0]
80033fa: f023 01c0 bic.w r1, r3, #192 ; 0xc0
80033fe: 687b ldr r3, [r7, #4]
8003400: 69da ldr r2, [r3, #28]
8003402: 687b ldr r3, [r7, #4]
8003404: 6a1b ldr r3, [r3, #32]
8003406: 431a orrs r2, r3
8003408: 687b ldr r3, [r7, #4]
800340a: 681b ldr r3, [r3, #0]
800340c: 430a orrs r2, r1
800340e: 601a str r2, [r3, #0]
/*---------------------------- I2Cx OAR1 Configuration ---------------------*/
/* Configure I2Cx: Own Address1 and addressing mode */
MODIFY_REG(hi2c->Instance->OAR1, (I2C_OAR1_ADDMODE | I2C_OAR1_ADD8_9 | I2C_OAR1_ADD1_7 | I2C_OAR1_ADD0), (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1));
8003410: 687b ldr r3, [r7, #4]
8003412: 681b ldr r3, [r3, #0]
8003414: 689b ldr r3, [r3, #8]
8003416: f423 4303 bic.w r3, r3, #33536 ; 0x8300
800341a: f023 03ff bic.w r3, r3, #255 ; 0xff
800341e: 687a ldr r2, [r7, #4]
8003420: 6911 ldr r1, [r2, #16]
8003422: 687a ldr r2, [r7, #4]
8003424: 68d2 ldr r2, [r2, #12]
8003426: 4311 orrs r1, r2
8003428: 687a ldr r2, [r7, #4]
800342a: 6812 ldr r2, [r2, #0]
800342c: 430b orrs r3, r1
800342e: 6093 str r3, [r2, #8]
/*---------------------------- I2Cx OAR2 Configuration ---------------------*/
/* Configure I2Cx: Dual mode and Own Address2 */
MODIFY_REG(hi2c->Instance->OAR2, (I2C_OAR2_ENDUAL | I2C_OAR2_ADD2), (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2));
8003430: 687b ldr r3, [r7, #4]
8003432: 681b ldr r3, [r3, #0]
8003434: 68db ldr r3, [r3, #12]
8003436: f023 01ff bic.w r1, r3, #255 ; 0xff
800343a: 687b ldr r3, [r7, #4]
800343c: 695a ldr r2, [r3, #20]
800343e: 687b ldr r3, [r7, #4]
8003440: 699b ldr r3, [r3, #24]
8003442: 431a orrs r2, r3
8003444: 687b ldr r3, [r7, #4]
8003446: 681b ldr r3, [r3, #0]
8003448: 430a orrs r2, r1
800344a: 60da str r2, [r3, #12]
/* Enable the selected I2C peripheral */
__HAL_I2C_ENABLE(hi2c);
800344c: 687b ldr r3, [r7, #4]
800344e: 681b ldr r3, [r3, #0]
8003450: 681a ldr r2, [r3, #0]
8003452: 687b ldr r3, [r7, #4]
8003454: 681b ldr r3, [r3, #0]
8003456: f042 0201 orr.w r2, r2, #1
800345a: 601a str r2, [r3, #0]
hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
800345c: 687b ldr r3, [r7, #4]
800345e: 2200 movs r2, #0
8003460: 641a str r2, [r3, #64] ; 0x40
hi2c->State = HAL_I2C_STATE_READY;
8003462: 687b ldr r3, [r7, #4]
8003464: 2220 movs r2, #32
8003466: f883 203d strb.w r2, [r3, #61] ; 0x3d
hi2c->PreviousState = I2C_STATE_NONE;
800346a: 687b ldr r3, [r7, #4]
800346c: 2200 movs r2, #0
800346e: 631a str r2, [r3, #48] ; 0x30
hi2c->Mode = HAL_I2C_MODE_NONE;
8003470: 687b ldr r3, [r7, #4]
8003472: 2200 movs r2, #0
8003474: f883 203e strb.w r2, [r3, #62] ; 0x3e
return HAL_OK;
8003478: 2300 movs r3, #0
}
800347a: 4618 mov r0, r3
800347c: 3710 adds r7, #16
800347e: 46bd mov sp, r7
8003480: bd80 pop {r7, pc}
8003482: bf00 nop
8003484: 000186a0 .word 0x000186a0
8003488: 001e847f .word 0x001e847f
800348c: 003d08ff .word 0x003d08ff
8003490: 431bde83 .word 0x431bde83
8003494: 10624dd3 .word 0x10624dd3
08003498 <HAL_I2C_Master_Transmit>:
* @param Size Amount of data to be sent
* @param Timeout Timeout duration
* @retval HAL status
*/
HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
{
8003498: b580 push {r7, lr}
800349a: b088 sub sp, #32
800349c: af02 add r7, sp, #8
800349e: 60f8 str r0, [r7, #12]
80034a0: 607a str r2, [r7, #4]
80034a2: 461a mov r2, r3
80034a4: 460b mov r3, r1
80034a6: 817b strh r3, [r7, #10]
80034a8: 4613 mov r3, r2
80034aa: 813b strh r3, [r7, #8]
/* Init tickstart for timeout management*/
uint32_t tickstart = HAL_GetTick();
80034ac: f7fd fed4 bl 8001258 <HAL_GetTick>
80034b0: 6178 str r0, [r7, #20]
if (hi2c->State == HAL_I2C_STATE_READY)
80034b2: 68fb ldr r3, [r7, #12]
80034b4: f893 303d ldrb.w r3, [r3, #61] ; 0x3d
80034b8: b2db uxtb r3, r3
80034ba: 2b20 cmp r3, #32
80034bc: f040 80e0 bne.w 8003680 <HAL_I2C_Master_Transmit+0x1e8>
{
/* Wait until BUSY flag is reset */
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
80034c0: 697b ldr r3, [r7, #20]
80034c2: 9300 str r3, [sp, #0]
80034c4: 2319 movs r3, #25
80034c6: 2201 movs r2, #1
80034c8: 4970 ldr r1, [pc, #448] ; (800368c <HAL_I2C_Master_Transmit+0x1f4>)
80034ca: 68f8 ldr r0, [r7, #12]
80034cc: f000 fc58 bl 8003d80 <I2C_WaitOnFlagUntilTimeout>
80034d0: 4603 mov r3, r0
80034d2: 2b00 cmp r3, #0
80034d4: d001 beq.n 80034da <HAL_I2C_Master_Transmit+0x42>
{
return HAL_BUSY;
80034d6: 2302 movs r3, #2
80034d8: e0d3 b.n 8003682 <HAL_I2C_Master_Transmit+0x1ea>
}
/* Process Locked */
__HAL_LOCK(hi2c);
80034da: 68fb ldr r3, [r7, #12]
80034dc: f893 303c ldrb.w r3, [r3, #60] ; 0x3c
80034e0: 2b01 cmp r3, #1
80034e2: d101 bne.n 80034e8 <HAL_I2C_Master_Transmit+0x50>
80034e4: 2302 movs r3, #2
80034e6: e0cc b.n 8003682 <HAL_I2C_Master_Transmit+0x1ea>
80034e8: 68fb ldr r3, [r7, #12]
80034ea: 2201 movs r2, #1
80034ec: f883 203c strb.w r2, [r3, #60] ; 0x3c
/* Check if the I2C is already enabled */
if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
80034f0: 68fb ldr r3, [r7, #12]
80034f2: 681b ldr r3, [r3, #0]
80034f4: 681b ldr r3, [r3, #0]
80034f6: f003 0301 and.w r3, r3, #1
80034fa: 2b01 cmp r3, #1
80034fc: d007 beq.n 800350e <HAL_I2C_Master_Transmit+0x76>
{
/* Enable I2C peripheral */
__HAL_I2C_ENABLE(hi2c);
80034fe: 68fb ldr r3, [r7, #12]
8003500: 681b ldr r3, [r3, #0]
8003502: 681a ldr r2, [r3, #0]
8003504: 68fb ldr r3, [r7, #12]
8003506: 681b ldr r3, [r3, #0]
8003508: f042 0201 orr.w r2, r2, #1
800350c: 601a str r2, [r3, #0]
}
/* Disable Pos */
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
800350e: 68fb ldr r3, [r7, #12]
8003510: 681b ldr r3, [r3, #0]
8003512: 681a ldr r2, [r3, #0]
8003514: 68fb ldr r3, [r7, #12]
8003516: 681b ldr r3, [r3, #0]
8003518: f422 6200 bic.w r2, r2, #2048 ; 0x800
800351c: 601a str r2, [r3, #0]
hi2c->State = HAL_I2C_STATE_BUSY_TX;
800351e: 68fb ldr r3, [r7, #12]
8003520: 2221 movs r2, #33 ; 0x21
8003522: f883 203d strb.w r2, [r3, #61] ; 0x3d
hi2c->Mode = HAL_I2C_MODE_MASTER;
8003526: 68fb ldr r3, [r7, #12]
8003528: 2210 movs r2, #16
800352a: f883 203e strb.w r2, [r3, #62] ; 0x3e
hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
800352e: 68fb ldr r3, [r7, #12]
8003530: 2200 movs r2, #0
8003532: 641a str r2, [r3, #64] ; 0x40
/* Prepare transfer parameters */
hi2c->pBuffPtr = pData;
8003534: 68fb ldr r3, [r7, #12]
8003536: 687a ldr r2, [r7, #4]
8003538: 625a str r2, [r3, #36] ; 0x24
hi2c->XferCount = Size;
800353a: 68fb ldr r3, [r7, #12]
800353c: 893a ldrh r2, [r7, #8]
800353e: 855a strh r2, [r3, #42] ; 0x2a
hi2c->XferSize = hi2c->XferCount;
8003540: 68fb ldr r3, [r7, #12]
8003542: 8d5b ldrh r3, [r3, #42] ; 0x2a
8003544: b29a uxth r2, r3
8003546: 68fb ldr r3, [r7, #12]
8003548: 851a strh r2, [r3, #40] ; 0x28
hi2c->XferOptions = I2C_NO_OPTION_FRAME;
800354a: 68fb ldr r3, [r7, #12]
800354c: 4a50 ldr r2, [pc, #320] ; (8003690 <HAL_I2C_Master_Transmit+0x1f8>)
800354e: 62da str r2, [r3, #44] ; 0x2c
/* Send Slave Address */
if (I2C_MasterRequestWrite(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
8003550: 8979 ldrh r1, [r7, #10]
8003552: 697b ldr r3, [r7, #20]
8003554: 6a3a ldr r2, [r7, #32]
8003556: 68f8 ldr r0, [r7, #12]
8003558: f000 fac2 bl 8003ae0 <I2C_MasterRequestWrite>
800355c: 4603 mov r3, r0
800355e: 2b00 cmp r3, #0
8003560: d001 beq.n 8003566 <HAL_I2C_Master_Transmit+0xce>
{
return HAL_ERROR;
8003562: 2301 movs r3, #1
8003564: e08d b.n 8003682 <HAL_I2C_Master_Transmit+0x1ea>
}
/* Clear ADDR flag */
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
8003566: 2300 movs r3, #0
8003568: 613b str r3, [r7, #16]
800356a: 68fb ldr r3, [r7, #12]
800356c: 681b ldr r3, [r3, #0]
800356e: 695b ldr r3, [r3, #20]
8003570: 613b str r3, [r7, #16]
8003572: 68fb ldr r3, [r7, #12]
8003574: 681b ldr r3, [r3, #0]
8003576: 699b ldr r3, [r3, #24]
8003578: 613b str r3, [r7, #16]
800357a: 693b ldr r3, [r7, #16]
while (hi2c->XferSize > 0U)
800357c: e066 b.n 800364c <HAL_I2C_Master_Transmit+0x1b4>
{
/* Wait until TXE flag is set */
if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
800357e: 697a ldr r2, [r7, #20]
8003580: 6a39 ldr r1, [r7, #32]
8003582: 68f8 ldr r0, [r7, #12]
8003584: f000 fcd2 bl 8003f2c <I2C_WaitOnTXEFlagUntilTimeout>
8003588: 4603 mov r3, r0
800358a: 2b00 cmp r3, #0
800358c: d00d beq.n 80035aa <HAL_I2C_Master_Transmit+0x112>
{
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
800358e: 68fb ldr r3, [r7, #12]
8003590: 6c1b ldr r3, [r3, #64] ; 0x40
8003592: 2b04 cmp r3, #4
8003594: d107 bne.n 80035a6 <HAL_I2C_Master_Transmit+0x10e>
{
/* Generate Stop */
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
8003596: 68fb ldr r3, [r7, #12]
8003598: 681b ldr r3, [r3, #0]
800359a: 681a ldr r2, [r3, #0]
800359c: 68fb ldr r3, [r7, #12]
800359e: 681b ldr r3, [r3, #0]
80035a0: f442 7200 orr.w r2, r2, #512 ; 0x200
80035a4: 601a str r2, [r3, #0]
}
return HAL_ERROR;
80035a6: 2301 movs r3, #1
80035a8: e06b b.n 8003682 <HAL_I2C_Master_Transmit+0x1ea>
}
/* Write data to DR */
hi2c->Instance->DR = *hi2c->pBuffPtr;
80035aa: 68fb ldr r3, [r7, #12]
80035ac: 6a5b ldr r3, [r3, #36] ; 0x24
80035ae: 781a ldrb r2, [r3, #0]
80035b0: 68fb ldr r3, [r7, #12]
80035b2: 681b ldr r3, [r3, #0]
80035b4: 611a str r2, [r3, #16]
/* Increment Buffer pointer */
hi2c->pBuffPtr++;
80035b6: 68fb ldr r3, [r7, #12]
80035b8: 6a5b ldr r3, [r3, #36] ; 0x24
80035ba: 1c5a adds r2, r3, #1
80035bc: 68fb ldr r3, [r7, #12]
80035be: 625a str r2, [r3, #36] ; 0x24
/* Update counter */
hi2c->XferCount--;
80035c0: 68fb ldr r3, [r7, #12]
80035c2: 8d5b ldrh r3, [r3, #42] ; 0x2a
80035c4: b29b uxth r3, r3
80035c6: 3b01 subs r3, #1
80035c8: b29a uxth r2, r3
80035ca: 68fb ldr r3, [r7, #12]
80035cc: 855a strh r2, [r3, #42] ; 0x2a
hi2c->XferSize--;
80035ce: 68fb ldr r3, [r7, #12]
80035d0: 8d1b ldrh r3, [r3, #40] ; 0x28
80035d2: 3b01 subs r3, #1
80035d4: b29a uxth r2, r3
80035d6: 68fb ldr r3, [r7, #12]
80035d8: 851a strh r2, [r3, #40] ; 0x28
if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
80035da: 68fb ldr r3, [r7, #12]
80035dc: 681b ldr r3, [r3, #0]
80035de: 695b ldr r3, [r3, #20]
80035e0: f003 0304 and.w r3, r3, #4
80035e4: 2b04 cmp r3, #4
80035e6: d11b bne.n 8003620 <HAL_I2C_Master_Transmit+0x188>
80035e8: 68fb ldr r3, [r7, #12]
80035ea: 8d1b ldrh r3, [r3, #40] ; 0x28
80035ec: 2b00 cmp r3, #0
80035ee: d017 beq.n 8003620 <HAL_I2C_Master_Transmit+0x188>
{
/* Write data to DR */
hi2c->Instance->DR = *hi2c->pBuffPtr;
80035f0: 68fb ldr r3, [r7, #12]
80035f2: 6a5b ldr r3, [r3, #36] ; 0x24
80035f4: 781a ldrb r2, [r3, #0]
80035f6: 68fb ldr r3, [r7, #12]
80035f8: 681b ldr r3, [r3, #0]
80035fa: 611a str r2, [r3, #16]
/* Increment Buffer pointer */
hi2c->pBuffPtr++;
80035fc: 68fb ldr r3, [r7, #12]
80035fe: 6a5b ldr r3, [r3, #36] ; 0x24
8003600: 1c5a adds r2, r3, #1
8003602: 68fb ldr r3, [r7, #12]
8003604: 625a str r2, [r3, #36] ; 0x24
/* Update counter */
hi2c->XferCount--;
8003606: 68fb ldr r3, [r7, #12]
8003608: 8d5b ldrh r3, [r3, #42] ; 0x2a
800360a: b29b uxth r3, r3
800360c: 3b01 subs r3, #1
800360e: b29a uxth r2, r3
8003610: 68fb ldr r3, [r7, #12]
8003612: 855a strh r2, [r3, #42] ; 0x2a
hi2c->XferSize--;
8003614: 68fb ldr r3, [r7, #12]
8003616: 8d1b ldrh r3, [r3, #40] ; 0x28
8003618: 3b01 subs r3, #1
800361a: b29a uxth r2, r3
800361c: 68fb ldr r3, [r7, #12]
800361e: 851a strh r2, [r3, #40] ; 0x28
}
/* Wait until BTF flag is set */
if (I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
8003620: 697a ldr r2, [r7, #20]
8003622: 6a39 ldr r1, [r7, #32]
8003624: 68f8 ldr r0, [r7, #12]
8003626: f000 fcc2 bl 8003fae <I2C_WaitOnBTFFlagUntilTimeout>
800362a: 4603 mov r3, r0
800362c: 2b00 cmp r3, #0
800362e: d00d beq.n 800364c <HAL_I2C_Master_Transmit+0x1b4>
{
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
8003630: 68fb ldr r3, [r7, #12]
8003632: 6c1b ldr r3, [r3, #64] ; 0x40
8003634: 2b04 cmp r3, #4
8003636: d107 bne.n 8003648 <HAL_I2C_Master_Transmit+0x1b0>
{
/* Generate Stop */
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
8003638: 68fb ldr r3, [r7, #12]
800363a: 681b ldr r3, [r3, #0]
800363c: 681a ldr r2, [r3, #0]
800363e: 68fb ldr r3, [r7, #12]
8003640: 681b ldr r3, [r3, #0]
8003642: f442 7200 orr.w r2, r2, #512 ; 0x200
8003646: 601a str r2, [r3, #0]
}
return HAL_ERROR;
8003648: 2301 movs r3, #1
800364a: e01a b.n 8003682 <HAL_I2C_Master_Transmit+0x1ea>
while (hi2c->XferSize > 0U)
800364c: 68fb ldr r3, [r7, #12]
800364e: 8d1b ldrh r3, [r3, #40] ; 0x28
8003650: 2b00 cmp r3, #0
8003652: d194 bne.n 800357e <HAL_I2C_Master_Transmit+0xe6>
}
}
/* Generate Stop */
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
8003654: 68fb ldr r3, [r7, #12]
8003656: 681b ldr r3, [r3, #0]
8003658: 681a ldr r2, [r3, #0]
800365a: 68fb ldr r3, [r7, #12]
800365c: 681b ldr r3, [r3, #0]
800365e: f442 7200 orr.w r2, r2, #512 ; 0x200
8003662: 601a str r2, [r3, #0]
hi2c->State = HAL_I2C_STATE_READY;
8003664: 68fb ldr r3, [r7, #12]
8003666: 2220 movs r2, #32
8003668: f883 203d strb.w r2, [r3, #61] ; 0x3d
hi2c->Mode = HAL_I2C_MODE_NONE;
800366c: 68fb ldr r3, [r7, #12]
800366e: 2200 movs r2, #0
8003670: f883 203e strb.w r2, [r3, #62] ; 0x3e
/* Process Unlocked */
__HAL_UNLOCK(hi2c);
8003674: 68fb ldr r3, [r7, #12]
8003676: 2200 movs r2, #0
8003678: f883 203c strb.w r2, [r3, #60] ; 0x3c
return HAL_OK;
800367c: 2300 movs r3, #0
800367e: e000 b.n 8003682 <HAL_I2C_Master_Transmit+0x1ea>
}
else
{
return HAL_BUSY;
8003680: 2302 movs r3, #2
}
}
8003682: 4618 mov r0, r3
8003684: 3718 adds r7, #24
8003686: 46bd mov sp, r7
8003688: bd80 pop {r7, pc}
800368a: bf00 nop
800368c: 00100002 .word 0x00100002
8003690: ffff0000 .word 0xffff0000
08003694 <HAL_I2C_Master_Receive>:
* @param Size Amount of data to be sent
* @param Timeout Timeout duration
* @retval HAL status
*/
HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
{
8003694: b580 push {r7, lr}
8003696: b08c sub sp, #48 ; 0x30
8003698: af02 add r7, sp, #8
800369a: 60f8 str r0, [r7, #12]
800369c: 607a str r2, [r7, #4]
800369e: 461a mov r2, r3
80036a0: 460b mov r3, r1
80036a2: 817b strh r3, [r7, #10]
80036a4: 4613 mov r3, r2
80036a6: 813b strh r3, [r7, #8]
/* Init tickstart for timeout management*/
uint32_t tickstart = HAL_GetTick();
80036a8: f7fd fdd6 bl 8001258 <HAL_GetTick>
80036ac: 6278 str r0, [r7, #36] ; 0x24
if (hi2c->State == HAL_I2C_STATE_READY)
80036ae: 68fb ldr r3, [r7, #12]
80036b0: f893 303d ldrb.w r3, [r3, #61] ; 0x3d
80036b4: b2db uxtb r3, r3
80036b6: 2b20 cmp r3, #32
80036b8: f040 820b bne.w 8003ad2 <HAL_I2C_Master_Receive+0x43e>
{
/* Wait until BUSY flag is reset */
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
80036bc: 6a7b ldr r3, [r7, #36] ; 0x24
80036be: 9300 str r3, [sp, #0]
80036c0: 2319 movs r3, #25
80036c2: 2201 movs r2, #1
80036c4: 497c ldr r1, [pc, #496] ; (80038b8 <HAL_I2C_Master_Receive+0x224>)
80036c6: 68f8 ldr r0, [r7, #12]
80036c8: f000 fb5a bl 8003d80 <I2C_WaitOnFlagUntilTimeout>
80036cc: 4603 mov r3, r0
80036ce: 2b00 cmp r3, #0
80036d0: d001 beq.n 80036d6 <HAL_I2C_Master_Receive+0x42>
{
return HAL_BUSY;
80036d2: 2302 movs r3, #2
80036d4: e1fe b.n 8003ad4 <HAL_I2C_Master_Receive+0x440>
}
/* Process Locked */
__HAL_LOCK(hi2c);
80036d6: 68fb ldr r3, [r7, #12]
80036d8: f893 303c ldrb.w r3, [r3, #60] ; 0x3c
80036dc: 2b01 cmp r3, #1
80036de: d101 bne.n 80036e4 <HAL_I2C_Master_Receive+0x50>
80036e0: 2302 movs r3, #2
80036e2: e1f7 b.n 8003ad4 <HAL_I2C_Master_Receive+0x440>
80036e4: 68fb ldr r3, [r7, #12]
80036e6: 2201 movs r2, #1
80036e8: f883 203c strb.w r2, [r3, #60] ; 0x3c
/* Check if the I2C is already enabled */
if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
80036ec: 68fb ldr r3, [r7, #12]
80036ee: 681b ldr r3, [r3, #0]
80036f0: 681b ldr r3, [r3, #0]
80036f2: f003 0301 and.w r3, r3, #1
80036f6: 2b01 cmp r3, #1
80036f8: d007 beq.n 800370a <HAL_I2C_Master_Receive+0x76>
{
/* Enable I2C peripheral */
__HAL_I2C_ENABLE(hi2c);
80036fa: 68fb ldr r3, [r7, #12]
80036fc: 681b ldr r3, [r3, #0]
80036fe: 681a ldr r2, [r3, #0]
8003700: 68fb ldr r3, [r7, #12]
8003702: 681b ldr r3, [r3, #0]
8003704: f042 0201 orr.w r2, r2, #1
8003708: 601a str r2, [r3, #0]
}
/* Disable Pos */
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
800370a: 68fb ldr r3, [r7, #12]
800370c: 681b ldr r3, [r3, #0]
800370e: 681a ldr r2, [r3, #0]
8003710: 68fb ldr r3, [r7, #12]
8003712: 681b ldr r3, [r3, #0]
8003714: f422 6200 bic.w r2, r2, #2048 ; 0x800
8003718: 601a str r2, [r3, #0]
hi2c->State = HAL_I2C_STATE_BUSY_RX;
800371a: 68fb ldr r3, [r7, #12]
800371c: 2222 movs r2, #34 ; 0x22
800371e: f883 203d strb.w r2, [r3, #61] ; 0x3d
hi2c->Mode = HAL_I2C_MODE_MASTER;
8003722: 68fb ldr r3, [r7, #12]
8003724: 2210 movs r2, #16
8003726: f883 203e strb.w r2, [r3, #62] ; 0x3e
hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
800372a: 68fb ldr r3, [r7, #12]
800372c: 2200 movs r2, #0
800372e: 641a str r2, [r3, #64] ; 0x40
/* Prepare transfer parameters */
hi2c->pBuffPtr = pData;
8003730: 68fb ldr r3, [r7, #12]
8003732: 687a ldr r2, [r7, #4]
8003734: 625a str r2, [r3, #36] ; 0x24
hi2c->XferCount = Size;
8003736: 68fb ldr r3, [r7, #12]
8003738: 893a ldrh r2, [r7, #8]
800373a: 855a strh r2, [r3, #42] ; 0x2a
hi2c->XferSize = hi2c->XferCount;
800373c: 68fb ldr r3, [r7, #12]
800373e: 8d5b ldrh r3, [r3, #42] ; 0x2a
8003740: b29a uxth r2, r3
8003742: 68fb ldr r3, [r7, #12]
8003744: 851a strh r2, [r3, #40] ; 0x28
hi2c->XferOptions = I2C_NO_OPTION_FRAME;
8003746: 68fb ldr r3, [r7, #12]
8003748: 4a5c ldr r2, [pc, #368] ; (80038bc <HAL_I2C_Master_Receive+0x228>)
800374a: 62da str r2, [r3, #44] ; 0x2c
/* Send Slave Address */
if (I2C_MasterRequestRead(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
800374c: 8979 ldrh r1, [r7, #10]
800374e: 6a7b ldr r3, [r7, #36] ; 0x24
8003750: 6b3a ldr r2, [r7, #48] ; 0x30
8003752: 68f8 ldr r0, [r7, #12]
8003754: f000 fa46 bl 8003be4 <I2C_MasterRequestRead>
8003758: 4603 mov r3, r0
800375a: 2b00 cmp r3, #0
800375c: d001 beq.n 8003762 <HAL_I2C_Master_Receive+0xce>
{
return HAL_ERROR;
800375e: 2301 movs r3, #1
8003760: e1b8 b.n 8003ad4 <HAL_I2C_Master_Receive+0x440>
}
if (hi2c->XferSize == 0U)
8003762: 68fb ldr r3, [r7, #12]
8003764: 8d1b ldrh r3, [r3, #40] ; 0x28
8003766: 2b00 cmp r3, #0
8003768: d113 bne.n 8003792 <HAL_I2C_Master_Receive+0xfe>
{
/* Clear ADDR flag */
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
800376a: 2300 movs r3, #0
800376c: 623b str r3, [r7, #32]
800376e: 68fb ldr r3, [r7, #12]
8003770: 681b ldr r3, [r3, #0]
8003772: 695b ldr r3, [r3, #20]
8003774: 623b str r3, [r7, #32]
8003776: 68fb ldr r3, [r7, #12]
8003778: 681b ldr r3, [r3, #0]
800377a: 699b ldr r3, [r3, #24]
800377c: 623b str r3, [r7, #32]
800377e: 6a3b ldr r3, [r7, #32]
/* Generate Stop */
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
8003780: 68fb ldr r3, [r7, #12]
8003782: 681b ldr r3, [r3, #0]
8003784: 681a ldr r2, [r3, #0]
8003786: 68fb ldr r3, [r7, #12]
8003788: 681b ldr r3, [r3, #0]
800378a: f442 7200 orr.w r2, r2, #512 ; 0x200
800378e: 601a str r2, [r3, #0]
8003790: e18c b.n 8003aac <HAL_I2C_Master_Receive+0x418>
}
else if (hi2c->XferSize == 1U)
8003792: 68fb ldr r3, [r7, #12]
8003794: 8d1b ldrh r3, [r3, #40] ; 0x28
8003796: 2b01 cmp r3, #1
8003798: d11b bne.n 80037d2 <HAL_I2C_Master_Receive+0x13e>
{
/* Disable Acknowledge */
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
800379a: 68fb ldr r3, [r7, #12]
800379c: 681b ldr r3, [r3, #0]
800379e: 681a ldr r2, [r3, #0]
80037a0: 68fb ldr r3, [r7, #12]
80037a2: 681b ldr r3, [r3, #0]
80037a4: f422 6280 bic.w r2, r2, #1024 ; 0x400
80037a8: 601a str r2, [r3, #0]
/* Clear ADDR flag */
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
80037aa: 2300 movs r3, #0
80037ac: 61fb str r3, [r7, #28]
80037ae: 68fb ldr r3, [r7, #12]
80037b0: 681b ldr r3, [r3, #0]
80037b2: 695b ldr r3, [r3, #20]
80037b4: 61fb str r3, [r7, #28]
80037b6: 68fb ldr r3, [r7, #12]
80037b8: 681b ldr r3, [r3, #0]
80037ba: 699b ldr r3, [r3, #24]
80037bc: 61fb str r3, [r7, #28]
80037be: 69fb ldr r3, [r7, #28]
/* Generate Stop */
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
80037c0: 68fb ldr r3, [r7, #12]
80037c2: 681b ldr r3, [r3, #0]
80037c4: 681a ldr r2, [r3, #0]
80037c6: 68fb ldr r3, [r7, #12]
80037c8: 681b ldr r3, [r3, #0]
80037ca: f442 7200 orr.w r2, r2, #512 ; 0x200
80037ce: 601a str r2, [r3, #0]
80037d0: e16c b.n 8003aac <HAL_I2C_Master_Receive+0x418>
}
else if (hi2c->XferSize == 2U)
80037d2: 68fb ldr r3, [r7, #12]
80037d4: 8d1b ldrh r3, [r3, #40] ; 0x28
80037d6: 2b02 cmp r3, #2
80037d8: d11b bne.n 8003812 <HAL_I2C_Master_Receive+0x17e>
{
/* Disable Acknowledge */
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
80037da: 68fb ldr r3, [r7, #12]
80037dc: 681b ldr r3, [r3, #0]
80037de: 681a ldr r2, [r3, #0]
80037e0: 68fb ldr r3, [r7, #12]
80037e2: 681b ldr r3, [r3, #0]
80037e4: f422 6280 bic.w r2, r2, #1024 ; 0x400
80037e8: 601a str r2, [r3, #0]
/* Enable Pos */
SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
80037ea: 68fb ldr r3, [r7, #12]
80037ec: 681b ldr r3, [r3, #0]
80037ee: 681a ldr r2, [r3, #0]
80037f0: 68fb ldr r3, [r7, #12]
80037f2: 681b ldr r3, [r3, #0]
80037f4: f442 6200 orr.w r2, r2, #2048 ; 0x800
80037f8: 601a str r2, [r3, #0]
/* Clear ADDR flag */
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
80037fa: 2300 movs r3, #0
80037fc: 61bb str r3, [r7, #24]
80037fe: 68fb ldr r3, [r7, #12]
8003800: 681b ldr r3, [r3, #0]
8003802: 695b ldr r3, [r3, #20]
8003804: 61bb str r3, [r7, #24]
8003806: 68fb ldr r3, [r7, #12]
8003808: 681b ldr r3, [r3, #0]
800380a: 699b ldr r3, [r3, #24]
800380c: 61bb str r3, [r7, #24]
800380e: 69bb ldr r3, [r7, #24]
8003810: e14c b.n 8003aac <HAL_I2C_Master_Receive+0x418>
}
else
{
/* Enable Acknowledge */
SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
8003812: 68fb ldr r3, [r7, #12]
8003814: 681b ldr r3, [r3, #0]
8003816: 681a ldr r2, [r3, #0]
8003818: 68fb ldr r3, [r7, #12]
800381a: 681b ldr r3, [r3, #0]
800381c: f442 6280 orr.w r2, r2, #1024 ; 0x400
8003820: 601a str r2, [r3, #0]
/* Clear ADDR flag */
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
8003822: 2300 movs r3, #0
8003824: 617b str r3, [r7, #20]
8003826: 68fb ldr r3, [r7, #12]
8003828: 681b ldr r3, [r3, #0]
800382a: 695b ldr r3, [r3, #20]
800382c: 617b str r3, [r7, #20]
800382e: 68fb ldr r3, [r7, #12]
8003830: 681b ldr r3, [r3, #0]
8003832: 699b ldr r3, [r3, #24]
8003834: 617b str r3, [r7, #20]
8003836: 697b ldr r3, [r7, #20]
}
while (hi2c->XferSize > 0U)
8003838: e138 b.n 8003aac <HAL_I2C_Master_Receive+0x418>
{
if (hi2c->XferSize <= 3U)
800383a: 68fb ldr r3, [r7, #12]
800383c: 8d1b ldrh r3, [r3, #40] ; 0x28
800383e: 2b03 cmp r3, #3
8003840: f200 80f1 bhi.w 8003a26 <HAL_I2C_Master_Receive+0x392>
{
/* One byte */
if (hi2c->XferSize == 1U)
8003844: 68fb ldr r3, [r7, #12]
8003846: 8d1b ldrh r3, [r3, #40] ; 0x28
8003848: 2b01 cmp r3, #1
800384a: d123 bne.n 8003894 <HAL_I2C_Master_Receive+0x200>
{
/* Wait until RXNE flag is set */
if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
800384c: 6a7a ldr r2, [r7, #36] ; 0x24
800384e: 6b39 ldr r1, [r7, #48] ; 0x30
8003850: 68f8 ldr r0, [r7, #12]
8003852: f000 fbed bl 8004030 <I2C_WaitOnRXNEFlagUntilTimeout>
8003856: 4603 mov r3, r0
8003858: 2b00 cmp r3, #0
800385a: d001 beq.n 8003860 <HAL_I2C_Master_Receive+0x1cc>
{
return HAL_ERROR;
800385c: 2301 movs r3, #1
800385e: e139 b.n 8003ad4 <HAL_I2C_Master_Receive+0x440>
}
/* Read data from DR */
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
8003860: 68fb ldr r3, [r7, #12]
8003862: 681b ldr r3, [r3, #0]
8003864: 691a ldr r2, [r3, #16]
8003866: 68fb ldr r3, [r7, #12]
8003868: 6a5b ldr r3, [r3, #36] ; 0x24
800386a: b2d2 uxtb r2, r2
800386c: 701a strb r2, [r3, #0]
/* Increment Buffer pointer */
hi2c->pBuffPtr++;
800386e: 68fb ldr r3, [r7, #12]
8003870: 6a5b ldr r3, [r3, #36] ; 0x24
8003872: 1c5a adds r2, r3, #1
8003874: 68fb ldr r3, [r7, #12]
8003876: 625a str r2, [r3, #36] ; 0x24
/* Update counter */
hi2c->XferSize--;
8003878: 68fb ldr r3, [r7, #12]
800387a: 8d1b ldrh r3, [r3, #40] ; 0x28
800387c: 3b01 subs r3, #1
800387e: b29a uxth r2, r3
8003880: 68fb ldr r3, [r7, #12]
8003882: 851a strh r2, [r3, #40] ; 0x28
hi2c->XferCount--;
8003884: 68fb ldr r3, [r7, #12]
8003886: 8d5b ldrh r3, [r3, #42] ; 0x2a
8003888: b29b uxth r3, r3
800388a: 3b01 subs r3, #1
800388c: b29a uxth r2, r3
800388e: 68fb ldr r3, [r7, #12]
8003890: 855a strh r2, [r3, #42] ; 0x2a
8003892: e10b b.n 8003aac <HAL_I2C_Master_Receive+0x418>
}
/* Two bytes */
else if (hi2c->XferSize == 2U)
8003894: 68fb ldr r3, [r7, #12]
8003896: 8d1b ldrh r3, [r3, #40] ; 0x28
8003898: 2b02 cmp r3, #2
800389a: d14e bne.n 800393a <HAL_I2C_Master_Receive+0x2a6>
{
/* Wait until BTF flag is set */
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
800389c: 6a7b ldr r3, [r7, #36] ; 0x24
800389e: 9300 str r3, [sp, #0]
80038a0: 6b3b ldr r3, [r7, #48] ; 0x30
80038a2: 2200 movs r2, #0
80038a4: 4906 ldr r1, [pc, #24] ; (80038c0 <HAL_I2C_Master_Receive+0x22c>)
80038a6: 68f8 ldr r0, [r7, #12]
80038a8: f000 fa6a bl 8003d80 <I2C_WaitOnFlagUntilTimeout>
80038ac: 4603 mov r3, r0
80038ae: 2b00 cmp r3, #0
80038b0: d008 beq.n 80038c4 <HAL_I2C_Master_Receive+0x230>
{
return HAL_ERROR;
80038b2: 2301 movs r3, #1
80038b4: e10e b.n 8003ad4 <HAL_I2C_Master_Receive+0x440>
80038b6: bf00 nop
80038b8: 00100002 .word 0x00100002
80038bc: ffff0000 .word 0xffff0000
80038c0: 00010004 .word 0x00010004
}
/* Generate Stop */
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
80038c4: 68fb ldr r3, [r7, #12]
80038c6: 681b ldr r3, [r3, #0]
80038c8: 681a ldr r2, [r3, #0]
80038ca: 68fb ldr r3, [r7, #12]
80038cc: 681b ldr r3, [r3, #0]
80038ce: f442 7200 orr.w r2, r2, #512 ; 0x200
80038d2: 601a str r2, [r3, #0]
/* Read data from DR */
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
80038d4: 68fb ldr r3, [r7, #12]
80038d6: 681b ldr r3, [r3, #0]
80038d8: 691a ldr r2, [r3, #16]
80038da: 68fb ldr r3, [r7, #12]
80038dc: 6a5b ldr r3, [r3, #36] ; 0x24
80038de: b2d2 uxtb r2, r2
80038e0: 701a strb r2, [r3, #0]
/* Increment Buffer pointer */
hi2c->pBuffPtr++;
80038e2: 68fb ldr r3, [r7, #12]
80038e4: 6a5b ldr r3, [r3, #36] ; 0x24
80038e6: 1c5a adds r2, r3, #1
80038e8: 68fb ldr r3, [r7, #12]
80038ea: 625a str r2, [r3, #36] ; 0x24
/* Update counter */
hi2c->XferSize--;
80038ec: 68fb ldr r3, [r7, #12]
80038ee: 8d1b ldrh r3, [r3, #40] ; 0x28
80038f0: 3b01 subs r3, #1
80038f2: b29a uxth r2, r3
80038f4: 68fb ldr r3, [r7, #12]
80038f6: 851a strh r2, [r3, #40] ; 0x28
hi2c->XferCount--;
80038f8: 68fb ldr r3, [r7, #12]
80038fa: 8d5b ldrh r3, [r3, #42] ; 0x2a
80038fc: b29b uxth r3, r3
80038fe: 3b01 subs r3, #1
8003900: b29a uxth r2, r3
8003902: 68fb ldr r3, [r7, #12]
8003904: 855a strh r2, [r3, #42] ; 0x2a
/* Read data from DR */
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
8003906: 68fb ldr r3, [r7, #12]
8003908: 681b ldr r3, [r3, #0]
800390a: 691a ldr r2, [r3, #16]
800390c: 68fb ldr r3, [r7, #12]
800390e: 6a5b ldr r3, [r3, #36] ; 0x24
8003910: b2d2 uxtb r2, r2
8003912: 701a strb r2, [r3, #0]
/* Increment Buffer pointer */
hi2c->pBuffPtr++;
8003914: 68fb ldr r3, [r7, #12]
8003916: 6a5b ldr r3, [r3, #36] ; 0x24
8003918: 1c5a adds r2, r3, #1
800391a: 68fb ldr r3, [r7, #12]
800391c: 625a str r2, [r3, #36] ; 0x24
/* Update counter */
hi2c->XferSize--;
800391e: 68fb ldr r3, [r7, #12]
8003920: 8d1b ldrh r3, [r3, #40] ; 0x28
8003922: 3b01 subs r3, #1
8003924: b29a uxth r2, r3
8003926: 68fb ldr r3, [r7, #12]
8003928: 851a strh r2, [r3, #40] ; 0x28
hi2c->XferCount--;
800392a: 68fb ldr r3, [r7, #12]
800392c: 8d5b ldrh r3, [r3, #42] ; 0x2a
800392e: b29b uxth r3, r3
8003930: 3b01 subs r3, #1
8003932: b29a uxth r2, r3
8003934: 68fb ldr r3, [r7, #12]
8003936: 855a strh r2, [r3, #42] ; 0x2a
8003938: e0b8 b.n 8003aac <HAL_I2C_Master_Receive+0x418>
}
/* 3 Last bytes */
else
{
/* Wait until BTF flag is set */
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
800393a: 6a7b ldr r3, [r7, #36] ; 0x24
800393c: 9300 str r3, [sp, #0]
800393e: 6b3b ldr r3, [r7, #48] ; 0x30
8003940: 2200 movs r2, #0
8003942: 4966 ldr r1, [pc, #408] ; (8003adc <HAL_I2C_Master_Receive+0x448>)
8003944: 68f8 ldr r0, [r7, #12]
8003946: f000 fa1b bl 8003d80 <I2C_WaitOnFlagUntilTimeout>
800394a: 4603 mov r3, r0
800394c: 2b00 cmp r3, #0
800394e: d001 beq.n 8003954 <HAL_I2C_Master_Receive+0x2c0>
{
return HAL_ERROR;
8003950: 2301 movs r3, #1
8003952: e0bf b.n 8003ad4 <HAL_I2C_Master_Receive+0x440>
}
/* Disable Acknowledge */
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
8003954: 68fb ldr r3, [r7, #12]
8003956: 681b ldr r3, [r3, #0]
8003958: 681a ldr r2, [r3, #0]
800395a: 68fb ldr r3, [r7, #12]
800395c: 681b ldr r3, [r3, #0]
800395e: f422 6280 bic.w r2, r2, #1024 ; 0x400
8003962: 601a str r2, [r3, #0]
/* Read data from DR */
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
8003964: 68fb ldr r3, [r7, #12]
8003966: 681b ldr r3, [r3, #0]
8003968: 691a ldr r2, [r3, #16]
800396a: 68fb ldr r3, [r7, #12]
800396c: 6a5b ldr r3, [r3, #36] ; 0x24
800396e: b2d2 uxtb r2, r2
8003970: 701a strb r2, [r3, #0]
/* Increment Buffer pointer */
hi2c->pBuffPtr++;
8003972: 68fb ldr r3, [r7, #12]
8003974: 6a5b ldr r3, [r3, #36] ; 0x24
8003976: 1c5a adds r2, r3, #1
8003978: 68fb ldr r3, [r7, #12]
800397a: 625a str r2, [r3, #36] ; 0x24
/* Update counter */
hi2c->XferSize--;
800397c: 68fb ldr r3, [r7, #12]
800397e: 8d1b ldrh r3, [r3, #40] ; 0x28
8003980: 3b01 subs r3, #1
8003982: b29a uxth r2, r3
8003984: 68fb ldr r3, [r7, #12]
8003986: 851a strh r2, [r3, #40] ; 0x28
hi2c->XferCount--;
8003988: 68fb ldr r3, [r7, #12]
800398a: 8d5b ldrh r3, [r3, #42] ; 0x2a
800398c: b29b uxth r3, r3
800398e: 3b01 subs r3, #1
8003990: b29a uxth r2, r3
8003992: 68fb ldr r3, [r7, #12]
8003994: 855a strh r2, [r3, #42] ; 0x2a
/* Wait until BTF flag is set */
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
8003996: 6a7b ldr r3, [r7, #36] ; 0x24
8003998: 9300 str r3, [sp, #0]
800399a: 6b3b ldr r3, [r7, #48] ; 0x30
800399c: 2200 movs r2, #0
800399e: 494f ldr r1, [pc, #316] ; (8003adc <HAL_I2C_Master_Receive+0x448>)
80039a0: 68f8 ldr r0, [r7, #12]
80039a2: f000 f9ed bl 8003d80 <I2C_WaitOnFlagUntilTimeout>
80039a6: 4603 mov r3, r0
80039a8: 2b00 cmp r3, #0
80039aa: d001 beq.n 80039b0 <HAL_I2C_Master_Receive+0x31c>
{
return HAL_ERROR;
80039ac: 2301 movs r3, #1
80039ae: e091 b.n 8003ad4 <HAL_I2C_Master_Receive+0x440>
}
/* Generate Stop */
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
80039b0: 68fb ldr r3, [r7, #12]
80039b2: 681b ldr r3, [r3, #0]
80039b4: 681a ldr r2, [r3, #0]
80039b6: 68fb ldr r3, [r7, #12]
80039b8: 681b ldr r3, [r3, #0]
80039ba: f442 7200 orr.w r2, r2, #512 ; 0x200
80039be: 601a str r2, [r3, #0]
/* Read data from DR */
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
80039c0: 68fb ldr r3, [r7, #12]
80039c2: 681b ldr r3, [r3, #0]
80039c4: 691a ldr r2, [r3, #16]
80039c6: 68fb ldr r3, [r7, #12]
80039c8: 6a5b ldr r3, [r3, #36] ; 0x24
80039ca: b2d2 uxtb r2, r2
80039cc: 701a strb r2, [r3, #0]
/* Increment Buffer pointer */
hi2c->pBuffPtr++;
80039ce: 68fb ldr r3, [r7, #12]
80039d0: 6a5b ldr r3, [r3, #36] ; 0x24
80039d2: 1c5a adds r2, r3, #1
80039d4: 68fb ldr r3, [r7, #12]
80039d6: 625a str r2, [r3, #36] ; 0x24
/* Update counter */
hi2c->XferSize--;
80039d8: 68fb ldr r3, [r7, #12]
80039da: 8d1b ldrh r3, [r3, #40] ; 0x28
80039dc: 3b01 subs r3, #1
80039de: b29a uxth r2, r3
80039e0: 68fb ldr r3, [r7, #12]
80039e2: 851a strh r2, [r3, #40] ; 0x28
hi2c->XferCount--;
80039e4: 68fb ldr r3, [r7, #12]
80039e6: 8d5b ldrh r3, [r3, #42] ; 0x2a
80039e8: b29b uxth r3, r3
80039ea: 3b01 subs r3, #1
80039ec: b29a uxth r2, r3
80039ee: 68fb ldr r3, [r7, #12]
80039f0: 855a strh r2, [r3, #42] ; 0x2a
/* Read data from DR */
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
80039f2: 68fb ldr r3, [r7, #12]
80039f4: 681b ldr r3, [r3, #0]
80039f6: 691a ldr r2, [r3, #16]
80039f8: 68fb ldr r3, [r7, #12]
80039fa: 6a5b ldr r3, [r3, #36] ; 0x24
80039fc: b2d2 uxtb r2, r2
80039fe: 701a strb r2, [r3, #0]
/* Increment Buffer pointer */
hi2c->pBuffPtr++;
8003a00: 68fb ldr r3, [r7, #12]
8003a02: 6a5b ldr r3, [r3, #36] ; 0x24
8003a04: 1c5a adds r2, r3, #1
8003a06: 68fb ldr r3, [r7, #12]
8003a08: 625a str r2, [r3, #36] ; 0x24
/* Update counter */
hi2c->XferSize--;
8003a0a: 68fb ldr r3, [r7, #12]
8003a0c: 8d1b ldrh r3, [r3, #40] ; 0x28
8003a0e: 3b01 subs r3, #1
8003a10: b29a uxth r2, r3
8003a12: 68fb ldr r3, [r7, #12]
8003a14: 851a strh r2, [r3, #40] ; 0x28
hi2c->XferCount--;
8003a16: 68fb ldr r3, [r7, #12]
8003a18: 8d5b ldrh r3, [r3, #42] ; 0x2a
8003a1a: b29b uxth r3, r3
8003a1c: 3b01 subs r3, #1
8003a1e: b29a uxth r2, r3
8003a20: 68fb ldr r3, [r7, #12]
8003a22: 855a strh r2, [r3, #42] ; 0x2a
8003a24: e042 b.n 8003aac <HAL_I2C_Master_Receive+0x418>
}
}
else
{
/* Wait until RXNE flag is set */
if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
8003a26: 6a7a ldr r2, [r7, #36] ; 0x24
8003a28: 6b39 ldr r1, [r7, #48] ; 0x30
8003a2a: 68f8 ldr r0, [r7, #12]
8003a2c: f000 fb00 bl 8004030 <I2C_WaitOnRXNEFlagUntilTimeout>
8003a30: 4603 mov r3, r0
8003a32: 2b00 cmp r3, #0
8003a34: d001 beq.n 8003a3a <HAL_I2C_Master_Receive+0x3a6>
{
return HAL_ERROR;
8003a36: 2301 movs r3, #1
8003a38: e04c b.n 8003ad4 <HAL_I2C_Master_Receive+0x440>
}
/* Read data from DR */
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
8003a3a: 68fb ldr r3, [r7, #12]
8003a3c: 681b ldr r3, [r3, #0]
8003a3e: 691a ldr r2, [r3, #16]
8003a40: 68fb ldr r3, [r7, #12]
8003a42: 6a5b ldr r3, [r3, #36] ; 0x24
8003a44: b2d2 uxtb r2, r2
8003a46: 701a strb r2, [r3, #0]
/* Increment Buffer pointer */
hi2c->pBuffPtr++;
8003a48: 68fb ldr r3, [r7, #12]
8003a4a: 6a5b ldr r3, [r3, #36] ; 0x24
8003a4c: 1c5a adds r2, r3, #1
8003a4e: 68fb ldr r3, [r7, #12]
8003a50: 625a str r2, [r3, #36] ; 0x24
/* Update counter */
hi2c->XferSize--;
8003a52: 68fb ldr r3, [r7, #12]
8003a54: 8d1b ldrh r3, [r3, #40] ; 0x28
8003a56: 3b01 subs r3, #1
8003a58: b29a uxth r2, r3
8003a5a: 68fb ldr r3, [r7, #12]
8003a5c: 851a strh r2, [r3, #40] ; 0x28
hi2c->XferCount--;
8003a5e: 68fb ldr r3, [r7, #12]
8003a60: 8d5b ldrh r3, [r3, #42] ; 0x2a
8003a62: b29b uxth r3, r3
8003a64: 3b01 subs r3, #1
8003a66: b29a uxth r2, r3
8003a68: 68fb ldr r3, [r7, #12]
8003a6a: 855a strh r2, [r3, #42] ; 0x2a
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
8003a6c: 68fb ldr r3, [r7, #12]
8003a6e: 681b ldr r3, [r3, #0]
8003a70: 695b ldr r3, [r3, #20]
8003a72: f003 0304 and.w r3, r3, #4
8003a76: 2b04 cmp r3, #4
8003a78: d118 bne.n 8003aac <HAL_I2C_Master_Receive+0x418>
{
/* Read data from DR */
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
8003a7a: 68fb ldr r3, [r7, #12]
8003a7c: 681b ldr r3, [r3, #0]
8003a7e: 691a ldr r2, [r3, #16]
8003a80: 68fb ldr r3, [r7, #12]
8003a82: 6a5b ldr r3, [r3, #36] ; 0x24
8003a84: b2d2 uxtb r2, r2
8003a86: 701a strb r2, [r3, #0]
/* Increment Buffer pointer */
hi2c->pBuffPtr++;
8003a88: 68fb ldr r3, [r7, #12]
8003a8a: 6a5b ldr r3, [r3, #36] ; 0x24
8003a8c: 1c5a adds r2, r3, #1
8003a8e: 68fb ldr r3, [r7, #12]
8003a90: 625a str r2, [r3, #36] ; 0x24
/* Update counter */
hi2c->XferSize--;
8003a92: 68fb ldr r3, [r7, #12]
8003a94: 8d1b ldrh r3, [r3, #40] ; 0x28
8003a96: 3b01 subs r3, #1
8003a98: b29a uxth r2, r3
8003a9a: 68fb ldr r3, [r7, #12]
8003a9c: 851a strh r2, [r3, #40] ; 0x28
hi2c->XferCount--;
8003a9e: 68fb ldr r3, [r7, #12]
8003aa0: 8d5b ldrh r3, [r3, #42] ; 0x2a
8003aa2: b29b uxth r3, r3
8003aa4: 3b01 subs r3, #1
8003aa6: b29a uxth r2, r3
8003aa8: 68fb ldr r3, [r7, #12]
8003aaa: 855a strh r2, [r3, #42] ; 0x2a
while (hi2c->XferSize > 0U)
8003aac: 68fb ldr r3, [r7, #12]
8003aae: 8d1b ldrh r3, [r3, #40] ; 0x28
8003ab0: 2b00 cmp r3, #0
8003ab2: f47f aec2 bne.w 800383a <HAL_I2C_Master_Receive+0x1a6>
}
}
}
hi2c->State = HAL_I2C_STATE_READY;
8003ab6: 68fb ldr r3, [r7, #12]
8003ab8: 2220 movs r2, #32
8003aba: f883 203d strb.w r2, [r3, #61] ; 0x3d
hi2c->Mode = HAL_I2C_MODE_NONE;
8003abe: 68fb ldr r3, [r7, #12]
8003ac0: 2200 movs r2, #0
8003ac2: f883 203e strb.w r2, [r3, #62] ; 0x3e
/* Process Unlocked */
__HAL_UNLOCK(hi2c);
8003ac6: 68fb ldr r3, [r7, #12]
8003ac8: 2200 movs r2, #0
8003aca: f883 203c strb.w r2, [r3, #60] ; 0x3c
return HAL_OK;
8003ace: 2300 movs r3, #0
8003ad0: e000 b.n 8003ad4 <HAL_I2C_Master_Receive+0x440>
}
else
{
return HAL_BUSY;
8003ad2: 2302 movs r3, #2
}
}
8003ad4: 4618 mov r0, r3
8003ad6: 3728 adds r7, #40 ; 0x28
8003ad8: 46bd mov sp, r7
8003ada: bd80 pop {r7, pc}
8003adc: 00010004 .word 0x00010004
08003ae0 <I2C_MasterRequestWrite>:
* @param Timeout Timeout duration
* @param Tickstart Tick start value
* @retval HAL status
*/
static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
{
8003ae0: b580 push {r7, lr}
8003ae2: b088 sub sp, #32
8003ae4: af02 add r7, sp, #8
8003ae6: 60f8 str r0, [r7, #12]
8003ae8: 607a str r2, [r7, #4]
8003aea: 603b str r3, [r7, #0]
8003aec: 460b mov r3, r1
8003aee: 817b strh r3, [r7, #10]
/* Declaration of temporary variable to prevent undefined behavior of volatile usage */
uint32_t CurrentXferOptions = hi2c->XferOptions;
8003af0: 68fb ldr r3, [r7, #12]
8003af2: 6adb ldr r3, [r3, #44] ; 0x2c
8003af4: 617b str r3, [r7, #20]
/* Generate Start condition if first transfer */
if ((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME))
8003af6: 697b ldr r3, [r7, #20]
8003af8: 2b08 cmp r3, #8
8003afa: d006 beq.n 8003b0a <I2C_MasterRequestWrite+0x2a>
8003afc: 697b ldr r3, [r7, #20]
8003afe: 2b01 cmp r3, #1
8003b00: d003 beq.n 8003b0a <I2C_MasterRequestWrite+0x2a>
8003b02: 697b ldr r3, [r7, #20]
8003b04: f513 3f80 cmn.w r3, #65536 ; 0x10000
8003b08: d108 bne.n 8003b1c <I2C_MasterRequestWrite+0x3c>
{
/* Generate Start */
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
8003b0a: 68fb ldr r3, [r7, #12]
8003b0c: 681b ldr r3, [r3, #0]
8003b0e: 681a ldr r2, [r3, #0]
8003b10: 68fb ldr r3, [r7, #12]
8003b12: 681b ldr r3, [r3, #0]
8003b14: f442 7280 orr.w r2, r2, #256 ; 0x100
8003b18: 601a str r2, [r3, #0]
8003b1a: e00b b.n 8003b34 <I2C_MasterRequestWrite+0x54>
}
else if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX)
8003b1c: 68fb ldr r3, [r7, #12]
8003b1e: 6b1b ldr r3, [r3, #48] ; 0x30
8003b20: 2b12 cmp r3, #18
8003b22: d107 bne.n 8003b34 <I2C_MasterRequestWrite+0x54>
{
/* Generate ReStart */
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
8003b24: 68fb ldr r3, [r7, #12]
8003b26: 681b ldr r3, [r3, #0]
8003b28: 681a ldr r2, [r3, #0]
8003b2a: 68fb ldr r3, [r7, #12]
8003b2c: 681b ldr r3, [r3, #0]
8003b2e: f442 7280 orr.w r2, r2, #256 ; 0x100
8003b32: 601a str r2, [r3, #0]
{
/* Do nothing */
}
/* Wait until SB flag is set */
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
8003b34: 683b ldr r3, [r7, #0]
8003b36: 9300 str r3, [sp, #0]
8003b38: 687b ldr r3, [r7, #4]
8003b3a: 2200 movs r2, #0
8003b3c: f04f 1101 mov.w r1, #65537 ; 0x10001
8003b40: 68f8 ldr r0, [r7, #12]
8003b42: f000 f91d bl 8003d80 <I2C_WaitOnFlagUntilTimeout>
8003b46: 4603 mov r3, r0
8003b48: 2b00 cmp r3, #0
8003b4a: d00d beq.n 8003b68 <I2C_MasterRequestWrite+0x88>
{
if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
8003b4c: 68fb ldr r3, [r7, #12]
8003b4e: 681b ldr r3, [r3, #0]
8003b50: 681b ldr r3, [r3, #0]
8003b52: f403 7380 and.w r3, r3, #256 ; 0x100
8003b56: f5b3 7f80 cmp.w r3, #256 ; 0x100
8003b5a: d103 bne.n 8003b64 <I2C_MasterRequestWrite+0x84>
{
hi2c->ErrorCode = HAL_I2C_WRONG_START;
8003b5c: 68fb ldr r3, [r7, #12]
8003b5e: f44f 7200 mov.w r2, #512 ; 0x200
8003b62: 641a str r2, [r3, #64] ; 0x40
}
return HAL_TIMEOUT;
8003b64: 2303 movs r3, #3
8003b66: e035 b.n 8003bd4 <I2C_MasterRequestWrite+0xf4>
}
if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
8003b68: 68fb ldr r3, [r7, #12]
8003b6a: 691b ldr r3, [r3, #16]
8003b6c: f5b3 4f80 cmp.w r3, #16384 ; 0x4000
8003b70: d108 bne.n 8003b84 <I2C_MasterRequestWrite+0xa4>
{
/* Send slave address */
hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
8003b72: 897b ldrh r3, [r7, #10]
8003b74: b2db uxtb r3, r3
8003b76: 461a mov r2, r3
8003b78: 68fb ldr r3, [r7, #12]
8003b7a: 681b ldr r3, [r3, #0]
8003b7c: f002 02fe and.w r2, r2, #254 ; 0xfe
8003b80: 611a str r2, [r3, #16]
8003b82: e01b b.n 8003bbc <I2C_MasterRequestWrite+0xdc>
}
else
{
/* Send header of slave address */
hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
8003b84: 897b ldrh r3, [r7, #10]
8003b86: 11db asrs r3, r3, #7
8003b88: b2db uxtb r3, r3
8003b8a: f003 0306 and.w r3, r3, #6
8003b8e: b2db uxtb r3, r3
8003b90: f063 030f orn r3, r3, #15
8003b94: b2da uxtb r2, r3
8003b96: 68fb ldr r3, [r7, #12]
8003b98: 681b ldr r3, [r3, #0]
8003b9a: 611a str r2, [r3, #16]
/* Wait until ADD10 flag is set */
if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK)
8003b9c: 683b ldr r3, [r7, #0]
8003b9e: 687a ldr r2, [r7, #4]
8003ba0: 490e ldr r1, [pc, #56] ; (8003bdc <I2C_MasterRequestWrite+0xfc>)
8003ba2: 68f8 ldr r0, [r7, #12]
8003ba4: f000 f943 bl 8003e2e <I2C_WaitOnMasterAddressFlagUntilTimeout>
8003ba8: 4603 mov r3, r0
8003baa: 2b00 cmp r3, #0
8003bac: d001 beq.n 8003bb2 <I2C_MasterRequestWrite+0xd2>
{
return HAL_ERROR;
8003bae: 2301 movs r3, #1
8003bb0: e010 b.n 8003bd4 <I2C_MasterRequestWrite+0xf4>
}
/* Send slave address */
hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
8003bb2: 897b ldrh r3, [r7, #10]
8003bb4: b2da uxtb r2, r3
8003bb6: 68fb ldr r3, [r7, #12]
8003bb8: 681b ldr r3, [r3, #0]
8003bba: 611a str r2, [r3, #16]
}
/* Wait until ADDR flag is set */
if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
8003bbc: 683b ldr r3, [r7, #0]
8003bbe: 687a ldr r2, [r7, #4]
8003bc0: 4907 ldr r1, [pc, #28] ; (8003be0 <I2C_MasterRequestWrite+0x100>)
8003bc2: 68f8 ldr r0, [r7, #12]
8003bc4: f000 f933 bl 8003e2e <I2C_WaitOnMasterAddressFlagUntilTimeout>
8003bc8: 4603 mov r3, r0
8003bca: 2b00 cmp r3, #0
8003bcc: d001 beq.n 8003bd2 <I2C_MasterRequestWrite+0xf2>
{
return HAL_ERROR;
8003bce: 2301 movs r3, #1
8003bd0: e000 b.n 8003bd4 <I2C_MasterRequestWrite+0xf4>
}
return HAL_OK;
8003bd2: 2300 movs r3, #0
}
8003bd4: 4618 mov r0, r3
8003bd6: 3718 adds r7, #24
8003bd8: 46bd mov sp, r7
8003bda: bd80 pop {r7, pc}
8003bdc: 00010008 .word 0x00010008
8003be0: 00010002 .word 0x00010002
08003be4 <I2C_MasterRequestRead>:
* @param Timeout Timeout duration
* @param Tickstart Tick start value
* @retval HAL status
*/
static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
{
8003be4: b580 push {r7, lr}
8003be6: b088 sub sp, #32
8003be8: af02 add r7, sp, #8
8003bea: 60f8 str r0, [r7, #12]
8003bec: 607a str r2, [r7, #4]
8003bee: 603b str r3, [r7, #0]
8003bf0: 460b mov r3, r1
8003bf2: 817b strh r3, [r7, #10]
/* Declaration of temporary variable to prevent undefined behavior of volatile usage */
uint32_t CurrentXferOptions = hi2c->XferOptions;
8003bf4: 68fb ldr r3, [r7, #12]
8003bf6: 6adb ldr r3, [r3, #44] ; 0x2c
8003bf8: 617b str r3, [r7, #20]
/* Enable Acknowledge */
SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
8003bfa: 68fb ldr r3, [r7, #12]
8003bfc: 681b ldr r3, [r3, #0]
8003bfe: 681a ldr r2, [r3, #0]
8003c00: 68fb ldr r3, [r7, #12]
8003c02: 681b ldr r3, [r3, #0]
8003c04: f442 6280 orr.w r2, r2, #1024 ; 0x400
8003c08: 601a str r2, [r3, #0]
/* Generate Start condition if first transfer */
if ((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME))
8003c0a: 697b ldr r3, [r7, #20]
8003c0c: 2b08 cmp r3, #8
8003c0e: d006 beq.n 8003c1e <I2C_MasterRequestRead+0x3a>
8003c10: 697b ldr r3, [r7, #20]
8003c12: 2b01 cmp r3, #1
8003c14: d003 beq.n 8003c1e <I2C_MasterRequestRead+0x3a>
8003c16: 697b ldr r3, [r7, #20]
8003c18: f513 3f80 cmn.w r3, #65536 ; 0x10000
8003c1c: d108 bne.n 8003c30 <I2C_MasterRequestRead+0x4c>
{
/* Generate Start */
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
8003c1e: 68fb ldr r3, [r7, #12]
8003c20: 681b ldr r3, [r3, #0]
8003c22: 681a ldr r2, [r3, #0]
8003c24: 68fb ldr r3, [r7, #12]
8003c26: 681b ldr r3, [r3, #0]
8003c28: f442 7280 orr.w r2, r2, #256 ; 0x100
8003c2c: 601a str r2, [r3, #0]
8003c2e: e00b b.n 8003c48 <I2C_MasterRequestRead+0x64>
}
else if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
8003c30: 68fb ldr r3, [r7, #12]
8003c32: 6b1b ldr r3, [r3, #48] ; 0x30
8003c34: 2b11 cmp r3, #17
8003c36: d107 bne.n 8003c48 <I2C_MasterRequestRead+0x64>
{
/* Generate ReStart */
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
8003c38: 68fb ldr r3, [r7, #12]
8003c3a: 681b ldr r3, [r3, #0]
8003c3c: 681a ldr r2, [r3, #0]
8003c3e: 68fb ldr r3, [r7, #12]
8003c40: 681b ldr r3, [r3, #0]
8003c42: f442 7280 orr.w r2, r2, #256 ; 0x100
8003c46: 601a str r2, [r3, #0]
{
/* Do nothing */
}
/* Wait until SB flag is set */
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
8003c48: 683b ldr r3, [r7, #0]
8003c4a: 9300 str r3, [sp, #0]
8003c4c: 687b ldr r3, [r7, #4]
8003c4e: 2200 movs r2, #0
8003c50: f04f 1101 mov.w r1, #65537 ; 0x10001
8003c54: 68f8 ldr r0, [r7, #12]
8003c56: f000 f893 bl 8003d80 <I2C_WaitOnFlagUntilTimeout>
8003c5a: 4603 mov r3, r0
8003c5c: 2b00 cmp r3, #0
8003c5e: d00d beq.n 8003c7c <I2C_MasterRequestRead+0x98>
{
if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
8003c60: 68fb ldr r3, [r7, #12]
8003c62: 681b ldr r3, [r3, #0]
8003c64: 681b ldr r3, [r3, #0]
8003c66: f403 7380 and.w r3, r3, #256 ; 0x100
8003c6a: f5b3 7f80 cmp.w r3, #256 ; 0x100
8003c6e: d103 bne.n 8003c78 <I2C_MasterRequestRead+0x94>
{
hi2c->ErrorCode = HAL_I2C_WRONG_START;
8003c70: 68fb ldr r3, [r7, #12]
8003c72: f44f 7200 mov.w r2, #512 ; 0x200
8003c76: 641a str r2, [r3, #64] ; 0x40
}
return HAL_TIMEOUT;
8003c78: 2303 movs r3, #3
8003c7a: e079 b.n 8003d70 <I2C_MasterRequestRead+0x18c>
}
if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
8003c7c: 68fb ldr r3, [r7, #12]
8003c7e: 691b ldr r3, [r3, #16]
8003c80: f5b3 4f80 cmp.w r3, #16384 ; 0x4000
8003c84: d108 bne.n 8003c98 <I2C_MasterRequestRead+0xb4>
{
/* Send slave address */
hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
8003c86: 897b ldrh r3, [r7, #10]
8003c88: b2db uxtb r3, r3
8003c8a: f043 0301 orr.w r3, r3, #1
8003c8e: b2da uxtb r2, r3
8003c90: 68fb ldr r3, [r7, #12]
8003c92: 681b ldr r3, [r3, #0]
8003c94: 611a str r2, [r3, #16]
8003c96: e05f b.n 8003d58 <I2C_MasterRequestRead+0x174>
}
else
{
/* Send header of slave address */
hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
8003c98: 897b ldrh r3, [r7, #10]
8003c9a: 11db asrs r3, r3, #7
8003c9c: b2db uxtb r3, r3
8003c9e: f003 0306 and.w r3, r3, #6
8003ca2: b2db uxtb r3, r3
8003ca4: f063 030f orn r3, r3, #15
8003ca8: b2da uxtb r2, r3
8003caa: 68fb ldr r3, [r7, #12]
8003cac: 681b ldr r3, [r3, #0]
8003cae: 611a str r2, [r3, #16]
/* Wait until ADD10 flag is set */
if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK)
8003cb0: 683b ldr r3, [r7, #0]
8003cb2: 687a ldr r2, [r7, #4]
8003cb4: 4930 ldr r1, [pc, #192] ; (8003d78 <I2C_MasterRequestRead+0x194>)
8003cb6: 68f8 ldr r0, [r7, #12]
8003cb8: f000 f8b9 bl 8003e2e <I2C_WaitOnMasterAddressFlagUntilTimeout>
8003cbc: 4603 mov r3, r0
8003cbe: 2b00 cmp r3, #0
8003cc0: d001 beq.n 8003cc6 <I2C_MasterRequestRead+0xe2>
{
return HAL_ERROR;
8003cc2: 2301 movs r3, #1
8003cc4: e054 b.n 8003d70 <I2C_MasterRequestRead+0x18c>
}
/* Send slave address */
hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
8003cc6: 897b ldrh r3, [r7, #10]
8003cc8: b2da uxtb r2, r3
8003cca: 68fb ldr r3, [r7, #12]
8003ccc: 681b ldr r3, [r3, #0]
8003cce: 611a str r2, [r3, #16]
/* Wait until ADDR flag is set */
if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
8003cd0: 683b ldr r3, [r7, #0]
8003cd2: 687a ldr r2, [r7, #4]
8003cd4: 4929 ldr r1, [pc, #164] ; (8003d7c <I2C_MasterRequestRead+0x198>)
8003cd6: 68f8 ldr r0, [r7, #12]
8003cd8: f000 f8a9 bl 8003e2e <I2C_WaitOnMasterAddressFlagUntilTimeout>
8003cdc: 4603 mov r3, r0
8003cde: 2b00 cmp r3, #0
8003ce0: d001 beq.n 8003ce6 <I2C_MasterRequestRead+0x102>
{
return HAL_ERROR;
8003ce2: 2301 movs r3, #1
8003ce4: e044 b.n 8003d70 <I2C_MasterRequestRead+0x18c>
}
/* Clear ADDR flag */
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
8003ce6: 2300 movs r3, #0
8003ce8: 613b str r3, [r7, #16]
8003cea: 68fb ldr r3, [r7, #12]
8003cec: 681b ldr r3, [r3, #0]
8003cee: 695b ldr r3, [r3, #20]
8003cf0: 613b str r3, [r7, #16]
8003cf2: 68fb ldr r3, [r7, #12]
8003cf4: 681b ldr r3, [r3, #0]
8003cf6: 699b ldr r3, [r3, #24]
8003cf8: 613b str r3, [r7, #16]
8003cfa: 693b ldr r3, [r7, #16]
/* Generate Restart */
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
8003cfc: 68fb ldr r3, [r7, #12]
8003cfe: 681b ldr r3, [r3, #0]
8003d00: 681a ldr r2, [r3, #0]
8003d02: 68fb ldr r3, [r7, #12]
8003d04: 681b ldr r3, [r3, #0]
8003d06: f442 7280 orr.w r2, r2, #256 ; 0x100
8003d0a: 601a str r2, [r3, #0]
/* Wait until SB flag is set */
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
8003d0c: 683b ldr r3, [r7, #0]
8003d0e: 9300 str r3, [sp, #0]
8003d10: 687b ldr r3, [r7, #4]
8003d12: 2200 movs r2, #0
8003d14: f04f 1101 mov.w r1, #65537 ; 0x10001
8003d18: 68f8 ldr r0, [r7, #12]
8003d1a: f000 f831 bl 8003d80 <I2C_WaitOnFlagUntilTimeout>
8003d1e: 4603 mov r3, r0
8003d20: 2b00 cmp r3, #0
8003d22: d00d beq.n 8003d40 <I2C_MasterRequestRead+0x15c>
{
if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
8003d24: 68fb ldr r3, [r7, #12]
8003d26: 681b ldr r3, [r3, #0]
8003d28: 681b ldr r3, [r3, #0]
8003d2a: f403 7380 and.w r3, r3, #256 ; 0x100
8003d2e: f5b3 7f80 cmp.w r3, #256 ; 0x100
8003d32: d103 bne.n 8003d3c <I2C_MasterRequestRead+0x158>
{
hi2c->ErrorCode = HAL_I2C_WRONG_START;
8003d34: 68fb ldr r3, [r7, #12]
8003d36: f44f 7200 mov.w r2, #512 ; 0x200
8003d3a: 641a str r2, [r3, #64] ; 0x40
}
return HAL_TIMEOUT;
8003d3c: 2303 movs r3, #3
8003d3e: e017 b.n 8003d70 <I2C_MasterRequestRead+0x18c>
}
/* Send header of slave address */
hi2c->Instance->DR = I2C_10BIT_HEADER_READ(DevAddress);
8003d40: 897b ldrh r3, [r7, #10]
8003d42: 11db asrs r3, r3, #7
8003d44: b2db uxtb r3, r3
8003d46: f003 0306 and.w r3, r3, #6
8003d4a: b2db uxtb r3, r3
8003d4c: f063 030e orn r3, r3, #14
8003d50: b2da uxtb r2, r3
8003d52: 68fb ldr r3, [r7, #12]
8003d54: 681b ldr r3, [r3, #0]
8003d56: 611a str r2, [r3, #16]
}
/* Wait until ADDR flag is set */
if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
8003d58: 683b ldr r3, [r7, #0]
8003d5a: 687a ldr r2, [r7, #4]
8003d5c: 4907 ldr r1, [pc, #28] ; (8003d7c <I2C_MasterRequestRead+0x198>)
8003d5e: 68f8 ldr r0, [r7, #12]
8003d60: f000 f865 bl 8003e2e <I2C_WaitOnMasterAddressFlagUntilTimeout>
8003d64: 4603 mov r3, r0
8003d66: 2b00 cmp r3, #0
8003d68: d001 beq.n 8003d6e <I2C_MasterRequestRead+0x18a>
{
return HAL_ERROR;
8003d6a: 2301 movs r3, #1
8003d6c: e000 b.n 8003d70 <I2C_MasterRequestRead+0x18c>
}
return HAL_OK;
8003d6e: 2300 movs r3, #0
}
8003d70: 4618 mov r0, r3
8003d72: 3718 adds r7, #24
8003d74: 46bd mov sp, r7
8003d76: bd80 pop {r7, pc}
8003d78: 00010008 .word 0x00010008
8003d7c: 00010002 .word 0x00010002
08003d80 <I2C_WaitOnFlagUntilTimeout>:
* @param Timeout Timeout duration
* @param Tickstart Tick start value
* @retval HAL status
*/
static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart)
{
8003d80: b580 push {r7, lr}
8003d82: b084 sub sp, #16
8003d84: af00 add r7, sp, #0
8003d86: 60f8 str r0, [r7, #12]
8003d88: 60b9 str r1, [r7, #8]
8003d8a: 603b str r3, [r7, #0]
8003d8c: 4613 mov r3, r2
8003d8e: 71fb strb r3, [r7, #7]
/* Wait until flag is set */
while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
8003d90: e025 b.n 8003dde <I2C_WaitOnFlagUntilTimeout+0x5e>
{
/* Check for the Timeout */
if (Timeout != HAL_MAX_DELAY)
8003d92: 683b ldr r3, [r7, #0]
8003d94: f1b3 3fff cmp.w r3, #4294967295
8003d98: d021 beq.n 8003dde <I2C_WaitOnFlagUntilTimeout+0x5e>
{
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
8003d9a: f7fd fa5d bl 8001258 <HAL_GetTick>
8003d9e: 4602 mov r2, r0
8003da0: 69bb ldr r3, [r7, #24]
8003da2: 1ad3 subs r3, r2, r3
8003da4: 683a ldr r2, [r7, #0]
8003da6: 429a cmp r2, r3
8003da8: d302 bcc.n 8003db0 <I2C_WaitOnFlagUntilTimeout+0x30>
8003daa: 683b ldr r3, [r7, #0]
8003dac: 2b00 cmp r3, #0
8003dae: d116 bne.n 8003dde <I2C_WaitOnFlagUntilTimeout+0x5e>
{
hi2c->PreviousState = I2C_STATE_NONE;
8003db0: 68fb ldr r3, [r7, #12]
8003db2: 2200 movs r2, #0
8003db4: 631a str r2, [r3, #48] ; 0x30
hi2c->State = HAL_I2C_STATE_READY;
8003db6: 68fb ldr r3, [r7, #12]
8003db8: 2220 movs r2, #32
8003dba: f883 203d strb.w r2, [r3, #61] ; 0x3d
hi2c->Mode = HAL_I2C_MODE_NONE;
8003dbe: 68fb ldr r3, [r7, #12]
8003dc0: 2200 movs r2, #0
8003dc2: f883 203e strb.w r2, [r3, #62] ; 0x3e
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
8003dc6: 68fb ldr r3, [r7, #12]
8003dc8: 6c1b ldr r3, [r3, #64] ; 0x40
8003dca: f043 0220 orr.w r2, r3, #32
8003dce: 68fb ldr r3, [r7, #12]
8003dd0: 641a str r2, [r3, #64] ; 0x40
/* Process Unlocked */
__HAL_UNLOCK(hi2c);
8003dd2: 68fb ldr r3, [r7, #12]
8003dd4: 2200 movs r2, #0
8003dd6: f883 203c strb.w r2, [r3, #60] ; 0x3c
return HAL_ERROR;
8003dda: 2301 movs r3, #1
8003ddc: e023 b.n 8003e26 <I2C_WaitOnFlagUntilTimeout+0xa6>
while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
8003dde: 68bb ldr r3, [r7, #8]
8003de0: 0c1b lsrs r3, r3, #16
8003de2: b2db uxtb r3, r3
8003de4: 2b01 cmp r3, #1
8003de6: d10d bne.n 8003e04 <I2C_WaitOnFlagUntilTimeout+0x84>
8003de8: 68fb ldr r3, [r7, #12]
8003dea: 681b ldr r3, [r3, #0]
8003dec: 695b ldr r3, [r3, #20]
8003dee: 43da mvns r2, r3
8003df0: 68bb ldr r3, [r7, #8]
8003df2: 4013 ands r3, r2
8003df4: b29b uxth r3, r3
8003df6: 2b00 cmp r3, #0
8003df8: bf0c ite eq
8003dfa: 2301 moveq r3, #1
8003dfc: 2300 movne r3, #0
8003dfe: b2db uxtb r3, r3
8003e00: 461a mov r2, r3
8003e02: e00c b.n 8003e1e <I2C_WaitOnFlagUntilTimeout+0x9e>
8003e04: 68fb ldr r3, [r7, #12]
8003e06: 681b ldr r3, [r3, #0]
8003e08: 699b ldr r3, [r3, #24]
8003e0a: 43da mvns r2, r3
8003e0c: 68bb ldr r3, [r7, #8]
8003e0e: 4013 ands r3, r2
8003e10: b29b uxth r3, r3
8003e12: 2b00 cmp r3, #0
8003e14: bf0c ite eq
8003e16: 2301 moveq r3, #1
8003e18: 2300 movne r3, #0
8003e1a: b2db uxtb r3, r3
8003e1c: 461a mov r2, r3
8003e1e: 79fb ldrb r3, [r7, #7]
8003e20: 429a cmp r2, r3
8003e22: d0b6 beq.n 8003d92 <I2C_WaitOnFlagUntilTimeout+0x12>
}
}
}
return HAL_OK;
8003e24: 2300 movs r3, #0
}
8003e26: 4618 mov r0, r3
8003e28: 3710 adds r7, #16
8003e2a: 46bd mov sp, r7
8003e2c: bd80 pop {r7, pc}
08003e2e <I2C_WaitOnMasterAddressFlagUntilTimeout>:
* @param Timeout Timeout duration
* @param Tickstart Tick start value
* @retval HAL status
*/
static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart)
{
8003e2e: b580 push {r7, lr}
8003e30: b084 sub sp, #16
8003e32: af00 add r7, sp, #0
8003e34: 60f8 str r0, [r7, #12]
8003e36: 60b9 str r1, [r7, #8]
8003e38: 607a str r2, [r7, #4]
8003e3a: 603b str r3, [r7, #0]
while (__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
8003e3c: e051 b.n 8003ee2 <I2C_WaitOnMasterAddressFlagUntilTimeout+0xb4>
{
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
8003e3e: 68fb ldr r3, [r7, #12]
8003e40: 681b ldr r3, [r3, #0]
8003e42: 695b ldr r3, [r3, #20]
8003e44: f403 6380 and.w r3, r3, #1024 ; 0x400
8003e48: f5b3 6f80 cmp.w r3, #1024 ; 0x400
8003e4c: d123 bne.n 8003e96 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x68>
{
/* Generate Stop */
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
8003e4e: 68fb ldr r3, [r7, #12]
8003e50: 681b ldr r3, [r3, #0]
8003e52: 681a ldr r2, [r3, #0]
8003e54: 68fb ldr r3, [r7, #12]
8003e56: 681b ldr r3, [r3, #0]
8003e58: f442 7200 orr.w r2, r2, #512 ; 0x200
8003e5c: 601a str r2, [r3, #0]
/* Clear AF Flag */
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
8003e5e: 68fb ldr r3, [r7, #12]
8003e60: 681b ldr r3, [r3, #0]
8003e62: f46f 6280 mvn.w r2, #1024 ; 0x400
8003e66: 615a str r2, [r3, #20]
hi2c->PreviousState = I2C_STATE_NONE;
8003e68: 68fb ldr r3, [r7, #12]
8003e6a: 2200 movs r2, #0
8003e6c: 631a str r2, [r3, #48] ; 0x30
hi2c->State = HAL_I2C_STATE_READY;
8003e6e: 68fb ldr r3, [r7, #12]
8003e70: 2220 movs r2, #32
8003e72: f883 203d strb.w r2, [r3, #61] ; 0x3d
hi2c->Mode = HAL_I2C_MODE_NONE;
8003e76: 68fb ldr r3, [r7, #12]
8003e78: 2200 movs r2, #0
8003e7a: f883 203e strb.w r2, [r3, #62] ; 0x3e
hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
8003e7e: 68fb ldr r3, [r7, #12]
8003e80: 6c1b ldr r3, [r3, #64] ; 0x40
8003e82: f043 0204 orr.w r2, r3, #4
8003e86: 68fb ldr r3, [r7, #12]
8003e88: 641a str r2, [r3, #64] ; 0x40
/* Process Unlocked */
__HAL_UNLOCK(hi2c);
8003e8a: 68fb ldr r3, [r7, #12]
8003e8c: 2200 movs r2, #0
8003e8e: f883 203c strb.w r2, [r3, #60] ; 0x3c
return HAL_ERROR;
8003e92: 2301 movs r3, #1
8003e94: e046 b.n 8003f24 <I2C_WaitOnMasterAddressFlagUntilTimeout+0xf6>
}
/* Check for the Timeout */
if (Timeout != HAL_MAX_DELAY)
8003e96: 687b ldr r3, [r7, #4]
8003e98: f1b3 3fff cmp.w r3, #4294967295
8003e9c: d021 beq.n 8003ee2 <I2C_WaitOnMasterAddressFlagUntilTimeout+0xb4>
{
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
8003e9e: f7fd f9db bl 8001258 <HAL_GetTick>
8003ea2: 4602 mov r2, r0
8003ea4: 683b ldr r3, [r7, #0]
8003ea6: 1ad3 subs r3, r2, r3
8003ea8: 687a ldr r2, [r7, #4]
8003eaa: 429a cmp r2, r3
8003eac: d302 bcc.n 8003eb4 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x86>
8003eae: 687b ldr r3, [r7, #4]
8003eb0: 2b00 cmp r3, #0
8003eb2: d116 bne.n 8003ee2 <I2C_WaitOnMasterAddressFlagUntilTimeout+0xb4>
{
hi2c->PreviousState = I2C_STATE_NONE;
8003eb4: 68fb ldr r3, [r7, #12]
8003eb6: 2200 movs r2, #0
8003eb8: 631a str r2, [r3, #48] ; 0x30
hi2c->State = HAL_I2C_STATE_READY;
8003eba: 68fb ldr r3, [r7, #12]
8003ebc: 2220 movs r2, #32
8003ebe: f883 203d strb.w r2, [r3, #61] ; 0x3d
hi2c->Mode = HAL_I2C_MODE_NONE;
8003ec2: 68fb ldr r3, [r7, #12]
8003ec4: 2200 movs r2, #0
8003ec6: f883 203e strb.w r2, [r3, #62] ; 0x3e
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
8003eca: 68fb ldr r3, [r7, #12]
8003ecc: 6c1b ldr r3, [r3, #64] ; 0x40
8003ece: f043 0220 orr.w r2, r3, #32
8003ed2: 68fb ldr r3, [r7, #12]
8003ed4: 641a str r2, [r3, #64] ; 0x40
/* Process Unlocked */
__HAL_UNLOCK(hi2c);
8003ed6: 68fb ldr r3, [r7, #12]
8003ed8: 2200 movs r2, #0
8003eda: f883 203c strb.w r2, [r3, #60] ; 0x3c
return HAL_ERROR;
8003ede: 2301 movs r3, #1
8003ee0: e020 b.n 8003f24 <I2C_WaitOnMasterAddressFlagUntilTimeout+0xf6>
while (__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
8003ee2: 68bb ldr r3, [r7, #8]
8003ee4: 0c1b lsrs r3, r3, #16
8003ee6: b2db uxtb r3, r3
8003ee8: 2b01 cmp r3, #1
8003eea: d10c bne.n 8003f06 <I2C_WaitOnMasterAddressFlagUntilTimeout+0xd8>
8003eec: 68fb ldr r3, [r7, #12]
8003eee: 681b ldr r3, [r3, #0]
8003ef0: 695b ldr r3, [r3, #20]
8003ef2: 43da mvns r2, r3
8003ef4: 68bb ldr r3, [r7, #8]
8003ef6: 4013 ands r3, r2
8003ef8: b29b uxth r3, r3
8003efa: 2b00 cmp r3, #0
8003efc: bf14 ite ne
8003efe: 2301 movne r3, #1
8003f00: 2300 moveq r3, #0
8003f02: b2db uxtb r3, r3
8003f04: e00b b.n 8003f1e <I2C_WaitOnMasterAddressFlagUntilTimeout+0xf0>
8003f06: 68fb ldr r3, [r7, #12]
8003f08: 681b ldr r3, [r3, #0]
8003f0a: 699b ldr r3, [r3, #24]
8003f0c: 43da mvns r2, r3
8003f0e: 68bb ldr r3, [r7, #8]
8003f10: 4013 ands r3, r2
8003f12: b29b uxth r3, r3
8003f14: 2b00 cmp r3, #0
8003f16: bf14 ite ne
8003f18: 2301 movne r3, #1
8003f1a: 2300 moveq r3, #0
8003f1c: b2db uxtb r3, r3
8003f1e: 2b00 cmp r3, #0
8003f20: d18d bne.n 8003e3e <I2C_WaitOnMasterAddressFlagUntilTimeout+0x10>
}
}
}
return HAL_OK;
8003f22: 2300 movs r3, #0
}
8003f24: 4618 mov r0, r3
8003f26: 3710 adds r7, #16
8003f28: 46bd mov sp, r7
8003f2a: bd80 pop {r7, pc}
08003f2c <I2C_WaitOnTXEFlagUntilTimeout>:
* @param Timeout Timeout duration
* @param Tickstart Tick start value
* @retval HAL status
*/
static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
{
8003f2c: b580 push {r7, lr}
8003f2e: b084 sub sp, #16
8003f30: af00 add r7, sp, #0
8003f32: 60f8 str r0, [r7, #12]
8003f34: 60b9 str r1, [r7, #8]
8003f36: 607a str r2, [r7, #4]
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
8003f38: e02d b.n 8003f96 <I2C_WaitOnTXEFlagUntilTimeout+0x6a>
{
/* Check if a NACK is detected */
if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
8003f3a: 68f8 ldr r0, [r7, #12]
8003f3c: f000 f8ce bl 80040dc <I2C_IsAcknowledgeFailed>
8003f40: 4603 mov r3, r0
8003f42: 2b00 cmp r3, #0
8003f44: d001 beq.n 8003f4a <I2C_WaitOnTXEFlagUntilTimeout+0x1e>
{
return HAL_ERROR;
8003f46: 2301 movs r3, #1
8003f48: e02d b.n 8003fa6 <I2C_WaitOnTXEFlagUntilTimeout+0x7a>
}
/* Check for the Timeout */
if (Timeout != HAL_MAX_DELAY)
8003f4a: 68bb ldr r3, [r7, #8]
8003f4c: f1b3 3fff cmp.w r3, #4294967295
8003f50: d021 beq.n 8003f96 <I2C_WaitOnTXEFlagUntilTimeout+0x6a>
{
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
8003f52: f7fd f981 bl 8001258 <HAL_GetTick>
8003f56: 4602 mov r2, r0
8003f58: 687b ldr r3, [r7, #4]
8003f5a: 1ad3 subs r3, r2, r3
8003f5c: 68ba ldr r2, [r7, #8]
8003f5e: 429a cmp r2, r3
8003f60: d302 bcc.n 8003f68 <I2C_WaitOnTXEFlagUntilTimeout+0x3c>
8003f62: 68bb ldr r3, [r7, #8]
8003f64: 2b00 cmp r3, #0
8003f66: d116 bne.n 8003f96 <I2C_WaitOnTXEFlagUntilTimeout+0x6a>
{
hi2c->PreviousState = I2C_STATE_NONE;
8003f68: 68fb ldr r3, [r7, #12]
8003f6a: 2200 movs r2, #0
8003f6c: 631a str r2, [r3, #48] ; 0x30
hi2c->State = HAL_I2C_STATE_READY;
8003f6e: 68fb ldr r3, [r7, #12]
8003f70: 2220 movs r2, #32
8003f72: f883 203d strb.w r2, [r3, #61] ; 0x3d
hi2c->Mode = HAL_I2C_MODE_NONE;
8003f76: 68fb ldr r3, [r7, #12]
8003f78: 2200 movs r2, #0
8003f7a: f883 203e strb.w r2, [r3, #62] ; 0x3e
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
8003f7e: 68fb ldr r3, [r7, #12]
8003f80: 6c1b ldr r3, [r3, #64] ; 0x40
8003f82: f043 0220 orr.w r2, r3, #32
8003f86: 68fb ldr r3, [r7, #12]
8003f88: 641a str r2, [r3, #64] ; 0x40
/* Process Unlocked */
__HAL_UNLOCK(hi2c);
8003f8a: 68fb ldr r3, [r7, #12]
8003f8c: 2200 movs r2, #0
8003f8e: f883 203c strb.w r2, [r3, #60] ; 0x3c
return HAL_ERROR;
8003f92: 2301 movs r3, #1
8003f94: e007 b.n 8003fa6 <I2C_WaitOnTXEFlagUntilTimeout+0x7a>
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
8003f96: 68fb ldr r3, [r7, #12]
8003f98: 681b ldr r3, [r3, #0]
8003f9a: 695b ldr r3, [r3, #20]
8003f9c: f003 0380 and.w r3, r3, #128 ; 0x80
8003fa0: 2b80 cmp r3, #128 ; 0x80
8003fa2: d1ca bne.n 8003f3a <I2C_WaitOnTXEFlagUntilTimeout+0xe>
}
}
}
return HAL_OK;
8003fa4: 2300 movs r3, #0
}
8003fa6: 4618 mov r0, r3
8003fa8: 3710 adds r7, #16
8003faa: 46bd mov sp, r7
8003fac: bd80 pop {r7, pc}
08003fae <I2C_WaitOnBTFFlagUntilTimeout>:
* @param Timeout Timeout duration
* @param Tickstart Tick start value
* @retval HAL status
*/
static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
{
8003fae: b580 push {r7, lr}
8003fb0: b084 sub sp, #16
8003fb2: af00 add r7, sp, #0
8003fb4: 60f8 str r0, [r7, #12]
8003fb6: 60b9 str r1, [r7, #8]
8003fb8: 607a str r2, [r7, #4]
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)
8003fba: e02d b.n 8004018 <I2C_WaitOnBTFFlagUntilTimeout+0x6a>
{
/* Check if a NACK is detected */
if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
8003fbc: 68f8 ldr r0, [r7, #12]
8003fbe: f000 f88d bl 80040dc <I2C_IsAcknowledgeFailed>
8003fc2: 4603 mov r3, r0
8003fc4: 2b00 cmp r3, #0
8003fc6: d001 beq.n 8003fcc <I2C_WaitOnBTFFlagUntilTimeout+0x1e>
{
return HAL_ERROR;
8003fc8: 2301 movs r3, #1
8003fca: e02d b.n 8004028 <I2C_WaitOnBTFFlagUntilTimeout+0x7a>
}
/* Check for the Timeout */
if (Timeout != HAL_MAX_DELAY)
8003fcc: 68bb ldr r3, [r7, #8]
8003fce: f1b3 3fff cmp.w r3, #4294967295
8003fd2: d021 beq.n 8004018 <I2C_WaitOnBTFFlagUntilTimeout+0x6a>
{
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
8003fd4: f7fd f940 bl 8001258 <HAL_GetTick>
8003fd8: 4602 mov r2, r0
8003fda: 687b ldr r3, [r7, #4]
8003fdc: 1ad3 subs r3, r2, r3
8003fde: 68ba ldr r2, [r7, #8]
8003fe0: 429a cmp r2, r3
8003fe2: d302 bcc.n 8003fea <I2C_WaitOnBTFFlagUntilTimeout+0x3c>
8003fe4: 68bb ldr r3, [r7, #8]
8003fe6: 2b00 cmp r3, #0
8003fe8: d116 bne.n 8004018 <I2C_WaitOnBTFFlagUntilTimeout+0x6a>
{
hi2c->PreviousState = I2C_STATE_NONE;
8003fea: 68fb ldr r3, [r7, #12]
8003fec: 2200 movs r2, #0
8003fee: 631a str r2, [r3, #48] ; 0x30
hi2c->State = HAL_I2C_STATE_READY;
8003ff0: 68fb ldr r3, [r7, #12]
8003ff2: 2220 movs r2, #32
8003ff4: f883 203d strb.w r2, [r3, #61] ; 0x3d
hi2c->Mode = HAL_I2C_MODE_NONE;
8003ff8: 68fb ldr r3, [r7, #12]
8003ffa: 2200 movs r2, #0
8003ffc: f883 203e strb.w r2, [r3, #62] ; 0x3e
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
8004000: 68fb ldr r3, [r7, #12]
8004002: 6c1b ldr r3, [r3, #64] ; 0x40
8004004: f043 0220 orr.w r2, r3, #32
8004008: 68fb ldr r3, [r7, #12]
800400a: 641a str r2, [r3, #64] ; 0x40
/* Process Unlocked */
__HAL_UNLOCK(hi2c);
800400c: 68fb ldr r3, [r7, #12]
800400e: 2200 movs r2, #0
8004010: f883 203c strb.w r2, [r3, #60] ; 0x3c
return HAL_ERROR;
8004014: 2301 movs r3, #1
8004016: e007 b.n 8004028 <I2C_WaitOnBTFFlagUntilTimeout+0x7a>
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)
8004018: 68fb ldr r3, [r7, #12]
800401a: 681b ldr r3, [r3, #0]
800401c: 695b ldr r3, [r3, #20]
800401e: f003 0304 and.w r3, r3, #4
8004022: 2b04 cmp r3, #4
8004024: d1ca bne.n 8003fbc <I2C_WaitOnBTFFlagUntilTimeout+0xe>
}
}
}
return HAL_OK;
8004026: 2300 movs r3, #0
}
8004028: 4618 mov r0, r3
800402a: 3710 adds r7, #16
800402c: 46bd mov sp, r7
800402e: bd80 pop {r7, pc}
08004030 <I2C_WaitOnRXNEFlagUntilTimeout>:
* @param Timeout Timeout duration
* @param Tickstart Tick start value
* @retval HAL status
*/
static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
{
8004030: b580 push {r7, lr}
8004032: b084 sub sp, #16
8004034: af00 add r7, sp, #0
8004036: 60f8 str r0, [r7, #12]
8004038: 60b9 str r1, [r7, #8]
800403a: 607a str r2, [r7, #4]
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
800403c: e042 b.n 80040c4 <I2C_WaitOnRXNEFlagUntilTimeout+0x94>
{
/* Check if a STOPF is detected */
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
800403e: 68fb ldr r3, [r7, #12]
8004040: 681b ldr r3, [r3, #0]
8004042: 695b ldr r3, [r3, #20]
8004044: f003 0310 and.w r3, r3, #16
8004048: 2b10 cmp r3, #16
800404a: d119 bne.n 8004080 <I2C_WaitOnRXNEFlagUntilTimeout+0x50>
{
/* Clear STOP Flag */
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
800404c: 68fb ldr r3, [r7, #12]
800404e: 681b ldr r3, [r3, #0]
8004050: f06f 0210 mvn.w r2, #16
8004054: 615a str r2, [r3, #20]
hi2c->PreviousState = I2C_STATE_NONE;
8004056: 68fb ldr r3, [r7, #12]
8004058: 2200 movs r2, #0
800405a: 631a str r2, [r3, #48] ; 0x30
hi2c->State = HAL_I2C_STATE_READY;
800405c: 68fb ldr r3, [r7, #12]
800405e: 2220 movs r2, #32
8004060: f883 203d strb.w r2, [r3, #61] ; 0x3d
hi2c->Mode = HAL_I2C_MODE_NONE;
8004064: 68fb ldr r3, [r7, #12]
8004066: 2200 movs r2, #0
8004068: f883 203e strb.w r2, [r3, #62] ; 0x3e
hi2c->ErrorCode |= HAL_I2C_ERROR_NONE;
800406c: 68fb ldr r3, [r7, #12]
800406e: 6c1a ldr r2, [r3, #64] ; 0x40
8004070: 68fb ldr r3, [r7, #12]
8004072: 641a str r2, [r3, #64] ; 0x40
/* Process Unlocked */
__HAL_UNLOCK(hi2c);
8004074: 68fb ldr r3, [r7, #12]
8004076: 2200 movs r2, #0
8004078: f883 203c strb.w r2, [r3, #60] ; 0x3c
return HAL_ERROR;
800407c: 2301 movs r3, #1
800407e: e029 b.n 80040d4 <I2C_WaitOnRXNEFlagUntilTimeout+0xa4>
}
/* Check for the Timeout */
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
8004080: f7fd f8ea bl 8001258 <HAL_GetTick>
8004084: 4602 mov r2, r0
8004086: 687b ldr r3, [r7, #4]
8004088: 1ad3 subs r3, r2, r3
800408a: 68ba ldr r2, [r7, #8]
800408c: 429a cmp r2, r3
800408e: d302 bcc.n 8004096 <I2C_WaitOnRXNEFlagUntilTimeout+0x66>
8004090: 68bb ldr r3, [r7, #8]
8004092: 2b00 cmp r3, #0
8004094: d116 bne.n 80040c4 <I2C_WaitOnRXNEFlagUntilTimeout+0x94>
{
hi2c->PreviousState = I2C_STATE_NONE;
8004096: 68fb ldr r3, [r7, #12]
8004098: 2200 movs r2, #0
800409a: 631a str r2, [r3, #48] ; 0x30
hi2c->State = HAL_I2C_STATE_READY;
800409c: 68fb ldr r3, [r7, #12]
800409e: 2220 movs r2, #32
80040a0: f883 203d strb.w r2, [r3, #61] ; 0x3d
hi2c->Mode = HAL_I2C_MODE_NONE;
80040a4: 68fb ldr r3, [r7, #12]
80040a6: 2200 movs r2, #0
80040a8: f883 203e strb.w r2, [r3, #62] ; 0x3e
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
80040ac: 68fb ldr r3, [r7, #12]
80040ae: 6c1b ldr r3, [r3, #64] ; 0x40
80040b0: f043 0220 orr.w r2, r3, #32
80040b4: 68fb ldr r3, [r7, #12]
80040b6: 641a str r2, [r3, #64] ; 0x40
/* Process Unlocked */
__HAL_UNLOCK(hi2c);
80040b8: 68fb ldr r3, [r7, #12]
80040ba: 2200 movs r2, #0
80040bc: f883 203c strb.w r2, [r3, #60] ; 0x3c
return HAL_ERROR;
80040c0: 2301 movs r3, #1
80040c2: e007 b.n 80040d4 <I2C_WaitOnRXNEFlagUntilTimeout+0xa4>
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
80040c4: 68fb ldr r3, [r7, #12]
80040c6: 681b ldr r3, [r3, #0]
80040c8: 695b ldr r3, [r3, #20]
80040ca: f003 0340 and.w r3, r3, #64 ; 0x40
80040ce: 2b40 cmp r3, #64 ; 0x40
80040d0: d1b5 bne.n 800403e <I2C_WaitOnRXNEFlagUntilTimeout+0xe>
}
}
return HAL_OK;
80040d2: 2300 movs r3, #0
}
80040d4: 4618 mov r0, r3
80040d6: 3710 adds r7, #16
80040d8: 46bd mov sp, r7
80040da: bd80 pop {r7, pc}
080040dc <I2C_IsAcknowledgeFailed>:
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
* the configuration information for the specified I2C.
* @retval HAL status
*/
static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c)
{
80040dc: b480 push {r7}
80040de: b083 sub sp, #12
80040e0: af00 add r7, sp, #0
80040e2: 6078 str r0, [r7, #4]
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
80040e4: 687b ldr r3, [r7, #4]
80040e6: 681b ldr r3, [r3, #0]
80040e8: 695b ldr r3, [r3, #20]
80040ea: f403 6380 and.w r3, r3, #1024 ; 0x400
80040ee: f5b3 6f80 cmp.w r3, #1024 ; 0x400
80040f2: d11b bne.n 800412c <I2C_IsAcknowledgeFailed+0x50>
{
/* Clear NACKF Flag */
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
80040f4: 687b ldr r3, [r7, #4]
80040f6: 681b ldr r3, [r3, #0]
80040f8: f46f 6280 mvn.w r2, #1024 ; 0x400
80040fc: 615a str r2, [r3, #20]
hi2c->PreviousState = I2C_STATE_NONE;
80040fe: 687b ldr r3, [r7, #4]
8004100: 2200 movs r2, #0
8004102: 631a str r2, [r3, #48] ; 0x30
hi2c->State = HAL_I2C_STATE_READY;
8004104: 687b ldr r3, [r7, #4]
8004106: 2220 movs r2, #32
8004108: f883 203d strb.w r2, [r3, #61] ; 0x3d
hi2c->Mode = HAL_I2C_MODE_NONE;
800410c: 687b ldr r3, [r7, #4]
800410e: 2200 movs r2, #0
8004110: f883 203e strb.w r2, [r3, #62] ; 0x3e
hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
8004114: 687b ldr r3, [r7, #4]
8004116: 6c1b ldr r3, [r3, #64] ; 0x40
8004118: f043 0204 orr.w r2, r3, #4
800411c: 687b ldr r3, [r7, #4]
800411e: 641a str r2, [r3, #64] ; 0x40
/* Process Unlocked */
__HAL_UNLOCK(hi2c);
8004120: 687b ldr r3, [r7, #4]
8004122: 2200 movs r2, #0
8004124: f883 203c strb.w r2, [r3, #60] ; 0x3c
return HAL_ERROR;
8004128: 2301 movs r3, #1
800412a: e000 b.n 800412e <I2C_IsAcknowledgeFailed+0x52>
}
return HAL_OK;
800412c: 2300 movs r3, #0
}
800412e: 4618 mov r0, r3
8004130: 370c adds r7, #12
8004132: 46bd mov sp, r7
8004134: f85d 7b04 ldr.w r7, [sp], #4
8004138: 4770 bx lr
...
0800413c <HAL_I2S_Init>:
* @param hi2s pointer to a I2S_HandleTypeDef structure that contains
* the configuration information for I2S module
* @retval HAL status
*/
HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s)
{
800413c: b580 push {r7, lr}
800413e: b088 sub sp, #32
8004140: af00 add r7, sp, #0
8004142: 6078 str r0, [r7, #4]
#if defined (SPI_I2S_FULLDUPLEX_SUPPORT)
uint16_t tmpreg;
#endif
/* Check the I2S handle allocation */
if (hi2s == NULL)
8004144: 687b ldr r3, [r7, #4]
8004146: 2b00 cmp r3, #0
8004148: d101 bne.n 800414e <HAL_I2S_Init+0x12>
{
return HAL_ERROR;
800414a: 2301 movs r3, #1
800414c: e128 b.n 80043a0 <HAL_I2S_Init+0x264>
assert_param(IS_I2S_MCLK_OUTPUT(hi2s->Init.MCLKOutput));
assert_param(IS_I2S_AUDIO_FREQ(hi2s->Init.AudioFreq));
assert_param(IS_I2S_CPOL(hi2s->Init.CPOL));
assert_param(IS_I2S_CLOCKSOURCE(hi2s->Init.ClockSource));
if (hi2s->State == HAL_I2S_STATE_RESET)
800414e: 687b ldr r3, [r7, #4]
8004150: f893 3041 ldrb.w r3, [r3, #65] ; 0x41
8004154: b2db uxtb r3, r3
8004156: 2b00 cmp r3, #0
8004158: d109 bne.n 800416e <HAL_I2S_Init+0x32>
{
/* Allocate lock resource and initialize it */
hi2s->Lock = HAL_UNLOCKED;
800415a: 687b ldr r3, [r7, #4]
800415c: 2200 movs r2, #0
800415e: f883 2040 strb.w r2, [r3, #64] ; 0x40
/* Initialize Default I2S IrqHandler ISR */
hi2s->IrqHandlerISR = I2S_IRQHandler;
8004162: 687b ldr r3, [r7, #4]
8004164: 4a90 ldr r2, [pc, #576] ; (80043a8 <HAL_I2S_Init+0x26c>)
8004166: 635a str r2, [r3, #52] ; 0x34
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
hi2s->MspInitCallback(hi2s);
#else
/* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
HAL_I2S_MspInit(hi2s);
8004168: 6878 ldr r0, [r7, #4]
800416a: f7fc fd43 bl 8000bf4 <HAL_I2S_MspInit>
#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
}
hi2s->State = HAL_I2S_STATE_BUSY;
800416e: 687b ldr r3, [r7, #4]
8004170: 2202 movs r2, #2
8004172: f883 2041 strb.w r2, [r3, #65] ; 0x41
/*----------------------- SPIx I2SCFGR & I2SPR Configuration ----------------*/
/* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
CLEAR_BIT(hi2s->Instance->I2SCFGR, (SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CKPOL | \
8004176: 687b ldr r3, [r7, #4]
8004178: 681b ldr r3, [r3, #0]
800417a: 69db ldr r3, [r3, #28]
800417c: 687a ldr r2, [r7, #4]
800417e: 6812 ldr r2, [r2, #0]
8004180: f423 637b bic.w r3, r3, #4016 ; 0xfb0
8004184: f023 030f bic.w r3, r3, #15
8004188: 61d3 str r3, [r2, #28]
SPI_I2SCFGR_I2SSTD | SPI_I2SCFGR_PCMSYNC | SPI_I2SCFGR_I2SCFG | \
SPI_I2SCFGR_I2SE | SPI_I2SCFGR_I2SMOD));
hi2s->Instance->I2SPR = 0x0002U;
800418a: 687b ldr r3, [r7, #4]
800418c: 681b ldr r3, [r3, #0]
800418e: 2202 movs r2, #2
8004190: 621a str r2, [r3, #32]
/*----------------------- I2SPR: I2SDIV and ODD Calculation -----------------*/
/* If the requested audio frequency is not the default, compute the prescaler */
if (hi2s->Init.AudioFreq != I2S_AUDIOFREQ_DEFAULT)
8004192: 687b ldr r3, [r7, #4]
8004194: 695b ldr r3, [r3, #20]
8004196: 2b02 cmp r3, #2
8004198: d060 beq.n 800425c <HAL_I2S_Init+0x120>
{
/* Check the frame length (For the Prescaler computing) ********************/
if (hi2s->Init.DataFormat == I2S_DATAFORMAT_16B)
800419a: 687b ldr r3, [r7, #4]
800419c: 68db ldr r3, [r3, #12]
800419e: 2b00 cmp r3, #0
80041a0: d102 bne.n 80041a8 <HAL_I2S_Init+0x6c>
{
/* Packet length is 16 bits */
packetlength = 16U;
80041a2: 2310 movs r3, #16
80041a4: 617b str r3, [r7, #20]
80041a6: e001 b.n 80041ac <HAL_I2S_Init+0x70>
}
else
{
/* Packet length is 32 bits */
packetlength = 32U;
80041a8: 2320 movs r3, #32
80041aa: 617b str r3, [r7, #20]
}
/* I2S standard */
if (hi2s->Init.Standard <= I2S_STANDARD_LSB)
80041ac: 687b ldr r3, [r7, #4]
80041ae: 689b ldr r3, [r3, #8]
80041b0: 2b20 cmp r3, #32
80041b2: d802 bhi.n 80041ba <HAL_I2S_Init+0x7e>
{
/* In I2S standard packet lenght is multiplied by 2 */
packetlength = packetlength * 2U;
80041b4: 697b ldr r3, [r7, #20]
80041b6: 005b lsls r3, r3, #1
80041b8: 617b str r3, [r7, #20]
else
{
i2sclk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_I2S_APB2);
}
#else
i2sclk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_I2S);
80041ba: 2001 movs r0, #1
80041bc: f001 f9ae bl 800551c <HAL_RCCEx_GetPeriphCLKFreq>
80041c0: 60f8 str r0, [r7, #12]
#endif
/* Compute the Real divider depending on the MCLK output state, with a floating point */
if (hi2s->Init.MCLKOutput == I2S_MCLKOUTPUT_ENABLE)
80041c2: 687b ldr r3, [r7, #4]
80041c4: 691b ldr r3, [r3, #16]
80041c6: f5b3 7f00 cmp.w r3, #512 ; 0x200
80041ca: d125 bne.n 8004218 <HAL_I2S_Init+0xdc>
{
/* MCLK output is enabled */
if (hi2s->Init.DataFormat != I2S_DATAFORMAT_16B)
80041cc: 687b ldr r3, [r7, #4]
80041ce: 68db ldr r3, [r3, #12]
80041d0: 2b00 cmp r3, #0
80041d2: d010 beq.n 80041f6 <HAL_I2S_Init+0xba>
{
tmp = (uint32_t)(((((i2sclk / (packetlength * 4U)) * 10U) / hi2s->Init.AudioFreq)) + 5U);
80041d4: 697b ldr r3, [r7, #20]
80041d6: 009b lsls r3, r3, #2
80041d8: 68fa ldr r2, [r7, #12]
80041da: fbb2 f2f3 udiv r2, r2, r3
80041de: 4613 mov r3, r2
80041e0: 009b lsls r3, r3, #2
80041e2: 4413 add r3, r2
80041e4: 005b lsls r3, r3, #1
80041e6: 461a mov r2, r3
80041e8: 687b ldr r3, [r7, #4]
80041ea: 695b ldr r3, [r3, #20]
80041ec: fbb2 f3f3 udiv r3, r2, r3
80041f0: 3305 adds r3, #5
80041f2: 613b str r3, [r7, #16]
80041f4: e01f b.n 8004236 <HAL_I2S_Init+0xfa>
}
else
{
tmp = (uint32_t)(((((i2sclk / (packetlength * 8U)) * 10U) / hi2s->Init.AudioFreq)) + 5U);
80041f6: 697b ldr r3, [r7, #20]
80041f8: 00db lsls r3, r3, #3
80041fa: 68fa ldr r2, [r7, #12]
80041fc: fbb2 f2f3 udiv r2, r2, r3
8004200: 4613 mov r3, r2
8004202: 009b lsls r3, r3, #2
8004204: 4413 add r3, r2
8004206: 005b lsls r3, r3, #1
8004208: 461a mov r2, r3
800420a: 687b ldr r3, [r7, #4]
800420c: 695b ldr r3, [r3, #20]
800420e: fbb2 f3f3 udiv r3, r2, r3
8004212: 3305 adds r3, #5
8004214: 613b str r3, [r7, #16]
8004216: e00e b.n 8004236 <HAL_I2S_Init+0xfa>
}
}
else
{
/* MCLK output is disabled */
tmp = (uint32_t)(((((i2sclk / packetlength) * 10U) / hi2s->Init.AudioFreq)) + 5U);
8004218: 68fa ldr r2, [r7, #12]
800421a: 697b ldr r3, [r7, #20]
800421c: fbb2 f2f3 udiv r2, r2, r3
8004220: 4613 mov r3, r2
8004222: 009b lsls r3, r3, #2
8004224: 4413 add r3, r2
8004226: 005b lsls r3, r3, #1
8004228: 461a mov r2, r3
800422a: 687b ldr r3, [r7, #4]
800422c: 695b ldr r3, [r3, #20]
800422e: fbb2 f3f3 udiv r3, r2, r3
8004232: 3305 adds r3, #5
8004234: 613b str r3, [r7, #16]
}
/* Remove the flatting point */
tmp = tmp / 10U;
8004236: 693b ldr r3, [r7, #16]
8004238: 4a5c ldr r2, [pc, #368] ; (80043ac <HAL_I2S_Init+0x270>)
800423a: fba2 2303 umull r2, r3, r2, r3
800423e: 08db lsrs r3, r3, #3
8004240: 613b str r3, [r7, #16]
/* Check the parity of the divider */
i2sodd = (uint32_t)(tmp & (uint32_t)1U);
8004242: 693b ldr r3, [r7, #16]
8004244: f003 0301 and.w r3, r3, #1
8004248: 61bb str r3, [r7, #24]
/* Compute the i2sdiv prescaler */
i2sdiv = (uint32_t)((tmp - i2sodd) / 2U);
800424a: 693a ldr r2, [r7, #16]
800424c: 69bb ldr r3, [r7, #24]
800424e: 1ad3 subs r3, r2, r3
8004250: 085b lsrs r3, r3, #1
8004252: 61fb str r3, [r7, #28]
/* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
i2sodd = (uint32_t)(i2sodd << 8U);
8004254: 69bb ldr r3, [r7, #24]
8004256: 021b lsls r3, r3, #8
8004258: 61bb str r3, [r7, #24]
800425a: e003 b.n 8004264 <HAL_I2S_Init+0x128>
}
else
{
/* Set the default values */
i2sdiv = 2U;
800425c: 2302 movs r3, #2
800425e: 61fb str r3, [r7, #28]
i2sodd = 0U;
8004260: 2300 movs r3, #0
8004262: 61bb str r3, [r7, #24]
}
/* Test if the divider is 1 or 0 or greater than 0xFF */
if ((i2sdiv < 2U) || (i2sdiv > 0xFFU))
8004264: 69fb ldr r3, [r7, #28]
8004266: 2b01 cmp r3, #1
8004268: d902 bls.n 8004270 <HAL_I2S_Init+0x134>
800426a: 69fb ldr r3, [r7, #28]
800426c: 2bff cmp r3, #255 ; 0xff
800426e: d907 bls.n 8004280 <HAL_I2S_Init+0x144>
{
/* Set the error code and execute error callback*/
SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_PRESCALER);
8004270: 687b ldr r3, [r7, #4]
8004272: 6c5b ldr r3, [r3, #68] ; 0x44
8004274: f043 0210 orr.w r2, r3, #16
8004278: 687b ldr r3, [r7, #4]
800427a: 645a str r2, [r3, #68] ; 0x44
return HAL_ERROR;
800427c: 2301 movs r3, #1
800427e: e08f b.n 80043a0 <HAL_I2S_Init+0x264>
}
/*----------------------- SPIx I2SCFGR & I2SPR Configuration ----------------*/
/* Write to SPIx I2SPR register the computed value */
hi2s->Instance->I2SPR = (uint32_t)((uint32_t)i2sdiv | (uint32_t)(i2sodd | (uint32_t)hi2s->Init.MCLKOutput));
8004280: 687b ldr r3, [r7, #4]
8004282: 691a ldr r2, [r3, #16]
8004284: 69bb ldr r3, [r7, #24]
8004286: ea42 0103 orr.w r1, r2, r3
800428a: 687b ldr r3, [r7, #4]
800428c: 681b ldr r3, [r3, #0]
800428e: 69fa ldr r2, [r7, #28]
8004290: 430a orrs r2, r1
8004292: 621a str r2, [r3, #32]
/* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
/* And configure the I2S with the I2S_InitStruct values */
MODIFY_REG(hi2s->Instance->I2SCFGR, (SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN | \
8004294: 687b ldr r3, [r7, #4]
8004296: 681b ldr r3, [r3, #0]
8004298: 69db ldr r3, [r3, #28]
800429a: f423 637b bic.w r3, r3, #4016 ; 0xfb0
800429e: f023 030f bic.w r3, r3, #15
80042a2: 687a ldr r2, [r7, #4]
80042a4: 6851 ldr r1, [r2, #4]
80042a6: 687a ldr r2, [r7, #4]
80042a8: 6892 ldr r2, [r2, #8]
80042aa: 4311 orrs r1, r2
80042ac: 687a ldr r2, [r7, #4]
80042ae: 68d2 ldr r2, [r2, #12]
80042b0: 4311 orrs r1, r2
80042b2: 687a ldr r2, [r7, #4]
80042b4: 6992 ldr r2, [r2, #24]
80042b6: 430a orrs r2, r1
80042b8: 431a orrs r2, r3
80042ba: 687b ldr r3, [r7, #4]
80042bc: 681b ldr r3, [r3, #0]
80042be: f442 6200 orr.w r2, r2, #2048 ; 0x800
80042c2: 61da str r2, [r3, #28]
#if defined (SPI_I2S_FULLDUPLEX_SUPPORT)
/* Configure the I2S extended if the full duplex mode is enabled */
assert_param(IS_I2S_FULLDUPLEX_MODE(hi2s->Init.FullDuplexMode));
if (hi2s->Init.FullDuplexMode == I2S_FULLDUPLEXMODE_ENABLE)
80042c4: 687b ldr r3, [r7, #4]
80042c6: 6a1b ldr r3, [r3, #32]
80042c8: 2b01 cmp r3, #1
80042ca: d161 bne.n 8004390 <HAL_I2S_Init+0x254>
{
/* Set FullDuplex I2S IrqHandler ISR if FULLDUPLEXMODE is enabled */
hi2s->IrqHandlerISR = HAL_I2SEx_FullDuplex_IRQHandler;
80042cc: 687b ldr r3, [r7, #4]
80042ce: 4a38 ldr r2, [pc, #224] ; (80043b0 <HAL_I2S_Init+0x274>)
80042d0: 635a str r2, [r3, #52] ; 0x34
/* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
CLEAR_BIT(I2SxEXT(hi2s->Instance)->I2SCFGR, (SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CKPOL | \
80042d2: 687b ldr r3, [r7, #4]
80042d4: 681b ldr r3, [r3, #0]
80042d6: 4a37 ldr r2, [pc, #220] ; (80043b4 <HAL_I2S_Init+0x278>)
80042d8: 4293 cmp r3, r2
80042da: d101 bne.n 80042e0 <HAL_I2S_Init+0x1a4>
80042dc: 4b36 ldr r3, [pc, #216] ; (80043b8 <HAL_I2S_Init+0x27c>)
80042de: e001 b.n 80042e4 <HAL_I2S_Init+0x1a8>
80042e0: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
80042e4: 69db ldr r3, [r3, #28]
80042e6: 687a ldr r2, [r7, #4]
80042e8: 6812 ldr r2, [r2, #0]
80042ea: 4932 ldr r1, [pc, #200] ; (80043b4 <HAL_I2S_Init+0x278>)
80042ec: 428a cmp r2, r1
80042ee: d101 bne.n 80042f4 <HAL_I2S_Init+0x1b8>
80042f0: 4a31 ldr r2, [pc, #196] ; (80043b8 <HAL_I2S_Init+0x27c>)
80042f2: e001 b.n 80042f8 <HAL_I2S_Init+0x1bc>
80042f4: f04f 2240 mov.w r2, #1073758208 ; 0x40004000
80042f8: f423 637b bic.w r3, r3, #4016 ; 0xfb0
80042fc: f023 030f bic.w r3, r3, #15
8004300: 61d3 str r3, [r2, #28]
SPI_I2SCFGR_I2SSTD | SPI_I2SCFGR_PCMSYNC | SPI_I2SCFGR_I2SCFG | \
SPI_I2SCFGR_I2SE | SPI_I2SCFGR_I2SMOD));
I2SxEXT(hi2s->Instance)->I2SPR = 2U;
8004302: 687b ldr r3, [r7, #4]
8004304: 681b ldr r3, [r3, #0]
8004306: 4a2b ldr r2, [pc, #172] ; (80043b4 <HAL_I2S_Init+0x278>)
8004308: 4293 cmp r3, r2
800430a: d101 bne.n 8004310 <HAL_I2S_Init+0x1d4>
800430c: 4b2a ldr r3, [pc, #168] ; (80043b8 <HAL_I2S_Init+0x27c>)
800430e: e001 b.n 8004314 <HAL_I2S_Init+0x1d8>
8004310: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
8004314: 2202 movs r2, #2
8004316: 621a str r2, [r3, #32]
/* Get the I2SCFGR register value */
tmpreg = I2SxEXT(hi2s->Instance)->I2SCFGR;
8004318: 687b ldr r3, [r7, #4]
800431a: 681b ldr r3, [r3, #0]
800431c: 4a25 ldr r2, [pc, #148] ; (80043b4 <HAL_I2S_Init+0x278>)
800431e: 4293 cmp r3, r2
8004320: d101 bne.n 8004326 <HAL_I2S_Init+0x1ea>
8004322: 4b25 ldr r3, [pc, #148] ; (80043b8 <HAL_I2S_Init+0x27c>)
8004324: e001 b.n 800432a <HAL_I2S_Init+0x1ee>
8004326: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
800432a: 69db ldr r3, [r3, #28]
800432c: 817b strh r3, [r7, #10]
/* Get the mode to be configured for the extended I2S */
if ((hi2s->Init.Mode == I2S_MODE_MASTER_TX) || (hi2s->Init.Mode == I2S_MODE_SLAVE_TX))
800432e: 687b ldr r3, [r7, #4]
8004330: 685b ldr r3, [r3, #4]
8004332: f5b3 7f00 cmp.w r3, #512 ; 0x200
8004336: d003 beq.n 8004340 <HAL_I2S_Init+0x204>
8004338: 687b ldr r3, [r7, #4]
800433a: 685b ldr r3, [r3, #4]
800433c: 2b00 cmp r3, #0
800433e: d103 bne.n 8004348 <HAL_I2S_Init+0x20c>
{
tmp = I2S_MODE_SLAVE_RX;
8004340: f44f 7380 mov.w r3, #256 ; 0x100
8004344: 613b str r3, [r7, #16]
8004346: e001 b.n 800434c <HAL_I2S_Init+0x210>
}
else /* I2S_MODE_MASTER_RX || I2S_MODE_SLAVE_RX */
{
tmp = I2S_MODE_SLAVE_TX;
8004348: 2300 movs r3, #0
800434a: 613b str r3, [r7, #16]
}
/* Configure the I2S Slave with the I2S Master parameter values */
tmpreg |= (uint16_t)((uint16_t)SPI_I2SCFGR_I2SMOD | (uint16_t)(tmp | \
800434c: 693b ldr r3, [r7, #16]
800434e: b29a uxth r2, r3
(uint16_t)(hi2s->Init.Standard | (uint16_t)(hi2s->Init.DataFormat | \
8004350: 687b ldr r3, [r7, #4]
8004352: 689b ldr r3, [r3, #8]
8004354: b299 uxth r1, r3
8004356: 687b ldr r3, [r7, #4]
8004358: 68db ldr r3, [r3, #12]
800435a: b298 uxth r0, r3
(uint16_t)hi2s->Init.CPOL))));
800435c: 687b ldr r3, [r7, #4]
800435e: 699b ldr r3, [r3, #24]
8004360: b29b uxth r3, r3
(uint16_t)(hi2s->Init.Standard | (uint16_t)(hi2s->Init.DataFormat | \
8004362: 4303 orrs r3, r0
8004364: b29b uxth r3, r3
8004366: 430b orrs r3, r1
8004368: b29b uxth r3, r3
tmpreg |= (uint16_t)((uint16_t)SPI_I2SCFGR_I2SMOD | (uint16_t)(tmp | \
800436a: 4313 orrs r3, r2
800436c: b29a uxth r2, r3
800436e: 897b ldrh r3, [r7, #10]
8004370: 4313 orrs r3, r2
8004372: b29b uxth r3, r3
8004374: f443 6300 orr.w r3, r3, #2048 ; 0x800
8004378: 817b strh r3, [r7, #10]
/* Write to SPIx I2SCFGR */
WRITE_REG(I2SxEXT(hi2s->Instance)->I2SCFGR, tmpreg);
800437a: 687b ldr r3, [r7, #4]
800437c: 681b ldr r3, [r3, #0]
800437e: 4a0d ldr r2, [pc, #52] ; (80043b4 <HAL_I2S_Init+0x278>)
8004380: 4293 cmp r3, r2
8004382: d101 bne.n 8004388 <HAL_I2S_Init+0x24c>
8004384: 4b0c ldr r3, [pc, #48] ; (80043b8 <HAL_I2S_Init+0x27c>)
8004386: e001 b.n 800438c <HAL_I2S_Init+0x250>
8004388: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
800438c: 897a ldrh r2, [r7, #10]
800438e: 61da str r2, [r3, #28]
}
#endif /* SPI_I2S_FULLDUPLEX_SUPPORT */
hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
8004390: 687b ldr r3, [r7, #4]
8004392: 2200 movs r2, #0
8004394: 645a str r2, [r3, #68] ; 0x44
hi2s->State = HAL_I2S_STATE_READY;
8004396: 687b ldr r3, [r7, #4]
8004398: 2201 movs r2, #1
800439a: f883 2041 strb.w r2, [r3, #65] ; 0x41
return HAL_OK;
800439e: 2300 movs r3, #0
}
80043a0: 4618 mov r0, r3
80043a2: 3720 adds r7, #32
80043a4: 46bd mov sp, r7
80043a6: bd80 pop {r7, pc}
80043a8: 080044b3 .word 0x080044b3
80043ac: cccccccd .word 0xcccccccd
80043b0: 080045c9 .word 0x080045c9
80043b4: 40003800 .word 0x40003800
80043b8: 40003400 .word 0x40003400
080043bc <HAL_I2S_TxCpltCallback>:
* @param hi2s pointer to a I2S_HandleTypeDef structure that contains
* the configuration information for I2S module
* @retval None
*/
__weak void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s)
{
80043bc: b480 push {r7}
80043be: b083 sub sp, #12
80043c0: af00 add r7, sp, #0
80043c2: 6078 str r0, [r7, #4]
UNUSED(hi2s);
/* NOTE : This function Should not be modified, when the callback is needed,
the HAL_I2S_TxCpltCallback could be implemented in the user file
*/
}
80043c4: bf00 nop
80043c6: 370c adds r7, #12
80043c8: 46bd mov sp, r7
80043ca: f85d 7b04 ldr.w r7, [sp], #4
80043ce: 4770 bx lr
080043d0 <HAL_I2S_RxCpltCallback>:
* @param hi2s pointer to a I2S_HandleTypeDef structure that contains
* the configuration information for I2S module
* @retval None
*/
__weak void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s)
{
80043d0: b480 push {r7}
80043d2: b083 sub sp, #12
80043d4: af00 add r7, sp, #0
80043d6: 6078 str r0, [r7, #4]
UNUSED(hi2s);
/* NOTE : This function Should not be modified, when the callback is needed,
the HAL_I2S_RxCpltCallback could be implemented in the user file
*/
}
80043d8: bf00 nop
80043da: 370c adds r7, #12
80043dc: 46bd mov sp, r7
80043de: f85d 7b04 ldr.w r7, [sp], #4
80043e2: 4770 bx lr
080043e4 <HAL_I2S_ErrorCallback>:
* @param hi2s pointer to a I2S_HandleTypeDef structure that contains
* the configuration information for I2S module
* @retval None
*/
__weak void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s)
{
80043e4: b480 push {r7}
80043e6: b083 sub sp, #12
80043e8: af00 add r7, sp, #0
80043ea: 6078 str r0, [r7, #4]
UNUSED(hi2s);
/* NOTE : This function Should not be modified, when the callback is needed,
the HAL_I2S_ErrorCallback could be implemented in the user file
*/
}
80043ec: bf00 nop
80043ee: 370c adds r7, #12
80043f0: 46bd mov sp, r7
80043f2: f85d 7b04 ldr.w r7, [sp], #4
80043f6: 4770 bx lr
080043f8 <I2S_Transmit_IT>:
* @param hi2s pointer to a I2S_HandleTypeDef structure that contains
* the configuration information for I2S module
* @retval None
*/
static void I2S_Transmit_IT(I2S_HandleTypeDef *hi2s)
{
80043f8: b580 push {r7, lr}
80043fa: b082 sub sp, #8
80043fc: af00 add r7, sp, #0
80043fe: 6078 str r0, [r7, #4]
/* Transmit data */
hi2s->Instance->DR = (*hi2s->pTxBuffPtr);
8004400: 687b ldr r3, [r7, #4]
8004402: 6a5b ldr r3, [r3, #36] ; 0x24
8004404: 881a ldrh r2, [r3, #0]
8004406: 687b ldr r3, [r7, #4]
8004408: 681b ldr r3, [r3, #0]
800440a: 60da str r2, [r3, #12]
hi2s->pTxBuffPtr++;
800440c: 687b ldr r3, [r7, #4]
800440e: 6a5b ldr r3, [r3, #36] ; 0x24
8004410: 1c9a adds r2, r3, #2
8004412: 687b ldr r3, [r7, #4]
8004414: 625a str r2, [r3, #36] ; 0x24
hi2s->TxXferCount--;
8004416: 687b ldr r3, [r7, #4]
8004418: 8d5b ldrh r3, [r3, #42] ; 0x2a
800441a: b29b uxth r3, r3
800441c: 3b01 subs r3, #1
800441e: b29a uxth r2, r3
8004420: 687b ldr r3, [r7, #4]
8004422: 855a strh r2, [r3, #42] ; 0x2a
if (hi2s->TxXferCount == 0U)
8004424: 687b ldr r3, [r7, #4]
8004426: 8d5b ldrh r3, [r3, #42] ; 0x2a
8004428: b29b uxth r3, r3
800442a: 2b00 cmp r3, #0
800442c: d10e bne.n 800444c <I2S_Transmit_IT+0x54>
{
/* Disable TXE and ERR interrupt */
__HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
800442e: 687b ldr r3, [r7, #4]
8004430: 681b ldr r3, [r3, #0]
8004432: 685a ldr r2, [r3, #4]
8004434: 687b ldr r3, [r7, #4]
8004436: 681b ldr r3, [r3, #0]
8004438: f022 02a0 bic.w r2, r2, #160 ; 0xa0
800443c: 605a str r2, [r3, #4]
hi2s->State = HAL_I2S_STATE_READY;
800443e: 687b ldr r3, [r7, #4]
8004440: 2201 movs r2, #1
8004442: f883 2041 strb.w r2, [r3, #65] ; 0x41
/* Call user Tx complete callback */
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
hi2s->TxCpltCallback(hi2s);
#else
HAL_I2S_TxCpltCallback(hi2s);
8004446: 6878 ldr r0, [r7, #4]
8004448: f7ff ffb8 bl 80043bc <HAL_I2S_TxCpltCallback>
#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
}
}
800444c: bf00 nop
800444e: 3708 adds r7, #8
8004450: 46bd mov sp, r7
8004452: bd80 pop {r7, pc}
08004454 <I2S_Receive_IT>:
* @param hi2s pointer to a I2S_HandleTypeDef structure that contains
* the configuration information for I2S module
* @retval None
*/
static void I2S_Receive_IT(I2S_HandleTypeDef *hi2s)
{
8004454: b580 push {r7, lr}
8004456: b082 sub sp, #8
8004458: af00 add r7, sp, #0
800445a: 6078 str r0, [r7, #4]
/* Receive data */
(*hi2s->pRxBuffPtr) = (uint16_t)hi2s->Instance->DR;
800445c: 687b ldr r3, [r7, #4]
800445e: 681b ldr r3, [r3, #0]
8004460: 68da ldr r2, [r3, #12]
8004462: 687b ldr r3, [r7, #4]
8004464: 6adb ldr r3, [r3, #44] ; 0x2c
8004466: b292 uxth r2, r2
8004468: 801a strh r2, [r3, #0]
hi2s->pRxBuffPtr++;
800446a: 687b ldr r3, [r7, #4]
800446c: 6adb ldr r3, [r3, #44] ; 0x2c
800446e: 1c9a adds r2, r3, #2
8004470: 687b ldr r3, [r7, #4]
8004472: 62da str r2, [r3, #44] ; 0x2c
hi2s->RxXferCount--;
8004474: 687b ldr r3, [r7, #4]
8004476: 8e5b ldrh r3, [r3, #50] ; 0x32
8004478: b29b uxth r3, r3
800447a: 3b01 subs r3, #1
800447c: b29a uxth r2, r3
800447e: 687b ldr r3, [r7, #4]
8004480: 865a strh r2, [r3, #50] ; 0x32
if (hi2s->RxXferCount == 0U)
8004482: 687b ldr r3, [r7, #4]
8004484: 8e5b ldrh r3, [r3, #50] ; 0x32
8004486: b29b uxth r3, r3
8004488: 2b00 cmp r3, #0
800448a: d10e bne.n 80044aa <I2S_Receive_IT+0x56>
{
/* Disable RXNE and ERR interrupt */
__HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
800448c: 687b ldr r3, [r7, #4]
800448e: 681b ldr r3, [r3, #0]
8004490: 685a ldr r2, [r3, #4]
8004492: 687b ldr r3, [r7, #4]
8004494: 681b ldr r3, [r3, #0]
8004496: f022 0260 bic.w r2, r2, #96 ; 0x60
800449a: 605a str r2, [r3, #4]
hi2s->State = HAL_I2S_STATE_READY;
800449c: 687b ldr r3, [r7, #4]
800449e: 2201 movs r2, #1
80044a0: f883 2041 strb.w r2, [r3, #65] ; 0x41
/* Call user Rx complete callback */
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
hi2s->RxCpltCallback(hi2s);
#else
HAL_I2S_RxCpltCallback(hi2s);
80044a4: 6878 ldr r0, [r7, #4]
80044a6: f7ff ff93 bl 80043d0 <HAL_I2S_RxCpltCallback>
#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
}
}
80044aa: bf00 nop
80044ac: 3708 adds r7, #8
80044ae: 46bd mov sp, r7
80044b0: bd80 pop {r7, pc}
080044b2 <I2S_IRQHandler>:
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
* the configuration information for I2S module
* @retval None
*/
static void I2S_IRQHandler(I2S_HandleTypeDef *hi2s)
{
80044b2: b580 push {r7, lr}
80044b4: b086 sub sp, #24
80044b6: af00 add r7, sp, #0
80044b8: 6078 str r0, [r7, #4]
__IO uint32_t i2ssr = hi2s->Instance->SR;
80044ba: 687b ldr r3, [r7, #4]
80044bc: 681b ldr r3, [r3, #0]
80044be: 689b ldr r3, [r3, #8]
80044c0: 617b str r3, [r7, #20]
if (hi2s->State == HAL_I2S_STATE_BUSY_RX)
80044c2: 687b ldr r3, [r7, #4]
80044c4: f893 3041 ldrb.w r3, [r3, #65] ; 0x41
80044c8: b2db uxtb r3, r3
80044ca: 2b04 cmp r3, #4
80044cc: d13a bne.n 8004544 <I2S_IRQHandler+0x92>
{
/* I2S in mode Receiver ------------------------------------------------*/
if (((i2ssr & I2S_FLAG_RXNE) == I2S_FLAG_RXNE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_RXNE) != RESET))
80044ce: 697b ldr r3, [r7, #20]
80044d0: f003 0301 and.w r3, r3, #1
80044d4: 2b01 cmp r3, #1
80044d6: d109 bne.n 80044ec <I2S_IRQHandler+0x3a>
80044d8: 687b ldr r3, [r7, #4]
80044da: 681b ldr r3, [r3, #0]
80044dc: 685b ldr r3, [r3, #4]
80044de: f003 0340 and.w r3, r3, #64 ; 0x40
80044e2: 2b40 cmp r3, #64 ; 0x40
80044e4: d102 bne.n 80044ec <I2S_IRQHandler+0x3a>
{
I2S_Receive_IT(hi2s);
80044e6: 6878 ldr r0, [r7, #4]
80044e8: f7ff ffb4 bl 8004454 <I2S_Receive_IT>
}
/* I2S Overrun error interrupt occurred -------------------------------------*/
if (((i2ssr & I2S_FLAG_OVR) == I2S_FLAG_OVR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET))
80044ec: 697b ldr r3, [r7, #20]
80044ee: f003 0340 and.w r3, r3, #64 ; 0x40
80044f2: 2b40 cmp r3, #64 ; 0x40
80044f4: d126 bne.n 8004544 <I2S_IRQHandler+0x92>
80044f6: 687b ldr r3, [r7, #4]
80044f8: 681b ldr r3, [r3, #0]
80044fa: 685b ldr r3, [r3, #4]
80044fc: f003 0320 and.w r3, r3, #32
8004500: 2b20 cmp r3, #32
8004502: d11f bne.n 8004544 <I2S_IRQHandler+0x92>
{
/* Disable RXNE and ERR interrupt */
__HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
8004504: 687b ldr r3, [r7, #4]
8004506: 681b ldr r3, [r3, #0]
8004508: 685a ldr r2, [r3, #4]
800450a: 687b ldr r3, [r7, #4]
800450c: 681b ldr r3, [r3, #0]
800450e: f022 0260 bic.w r2, r2, #96 ; 0x60
8004512: 605a str r2, [r3, #4]
/* Clear Overrun flag */
__HAL_I2S_CLEAR_OVRFLAG(hi2s);
8004514: 2300 movs r3, #0
8004516: 613b str r3, [r7, #16]
8004518: 687b ldr r3, [r7, #4]
800451a: 681b ldr r3, [r3, #0]
800451c: 68db ldr r3, [r3, #12]
800451e: 613b str r3, [r7, #16]
8004520: 687b ldr r3, [r7, #4]
8004522: 681b ldr r3, [r3, #0]
8004524: 689b ldr r3, [r3, #8]
8004526: 613b str r3, [r7, #16]
8004528: 693b ldr r3, [r7, #16]
/* Set the I2S State ready */
hi2s->State = HAL_I2S_STATE_READY;
800452a: 687b ldr r3, [r7, #4]
800452c: 2201 movs r2, #1
800452e: f883 2041 strb.w r2, [r3, #65] ; 0x41
/* Set the error code and execute error callback*/
SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_OVR);
8004532: 687b ldr r3, [r7, #4]
8004534: 6c5b ldr r3, [r3, #68] ; 0x44
8004536: f043 0202 orr.w r2, r3, #2
800453a: 687b ldr r3, [r7, #4]
800453c: 645a str r2, [r3, #68] ; 0x44
/* Call user error callback */
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
hi2s->ErrorCallback(hi2s);
#else
HAL_I2S_ErrorCallback(hi2s);
800453e: 6878 ldr r0, [r7, #4]
8004540: f7ff ff50 bl 80043e4 <HAL_I2S_ErrorCallback>
#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
}
}
if (hi2s->State == HAL_I2S_STATE_BUSY_TX)
8004544: 687b ldr r3, [r7, #4]
8004546: f893 3041 ldrb.w r3, [r3, #65] ; 0x41
800454a: b2db uxtb r3, r3
800454c: 2b03 cmp r3, #3
800454e: d136 bne.n 80045be <I2S_IRQHandler+0x10c>
{
/* I2S in mode Transmitter -----------------------------------------------*/
if (((i2ssr & I2S_FLAG_TXE) == I2S_FLAG_TXE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_TXE) != RESET))
8004550: 697b ldr r3, [r7, #20]
8004552: f003 0302 and.w r3, r3, #2
8004556: 2b02 cmp r3, #2
8004558: d109 bne.n 800456e <I2S_IRQHandler+0xbc>
800455a: 687b ldr r3, [r7, #4]
800455c: 681b ldr r3, [r3, #0]
800455e: 685b ldr r3, [r3, #4]
8004560: f003 0380 and.w r3, r3, #128 ; 0x80
8004564: 2b80 cmp r3, #128 ; 0x80
8004566: d102 bne.n 800456e <I2S_IRQHandler+0xbc>
{
I2S_Transmit_IT(hi2s);
8004568: 6878 ldr r0, [r7, #4]
800456a: f7ff ff45 bl 80043f8 <I2S_Transmit_IT>
}
/* I2S Underrun error interrupt occurred --------------------------------*/
if (((i2ssr & I2S_FLAG_UDR) == I2S_FLAG_UDR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET))
800456e: 697b ldr r3, [r7, #20]
8004570: f003 0308 and.w r3, r3, #8
8004574: 2b08 cmp r3, #8
8004576: d122 bne.n 80045be <I2S_IRQHandler+0x10c>
8004578: 687b ldr r3, [r7, #4]
800457a: 681b ldr r3, [r3, #0]
800457c: 685b ldr r3, [r3, #4]
800457e: f003 0320 and.w r3, r3, #32
8004582: 2b20 cmp r3, #32
8004584: d11b bne.n 80045be <I2S_IRQHandler+0x10c>
{
/* Disable TXE and ERR interrupt */
__HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
8004586: 687b ldr r3, [r7, #4]
8004588: 681b ldr r3, [r3, #0]
800458a: 685a ldr r2, [r3, #4]
800458c: 687b ldr r3, [r7, #4]
800458e: 681b ldr r3, [r3, #0]
8004590: f022 02a0 bic.w r2, r2, #160 ; 0xa0
8004594: 605a str r2, [r3, #4]
/* Clear Underrun flag */
__HAL_I2S_CLEAR_UDRFLAG(hi2s);
8004596: 2300 movs r3, #0
8004598: 60fb str r3, [r7, #12]
800459a: 687b ldr r3, [r7, #4]
800459c: 681b ldr r3, [r3, #0]
800459e: 689b ldr r3, [r3, #8]
80045a0: 60fb str r3, [r7, #12]
80045a2: 68fb ldr r3, [r7, #12]
/* Set the I2S State ready */
hi2s->State = HAL_I2S_STATE_READY;
80045a4: 687b ldr r3, [r7, #4]
80045a6: 2201 movs r2, #1
80045a8: f883 2041 strb.w r2, [r3, #65] ; 0x41
/* Set the error code and execute error callback*/
SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_UDR);
80045ac: 687b ldr r3, [r7, #4]
80045ae: 6c5b ldr r3, [r3, #68] ; 0x44
80045b0: f043 0204 orr.w r2, r3, #4
80045b4: 687b ldr r3, [r7, #4]
80045b6: 645a str r2, [r3, #68] ; 0x44
/* Call user error callback */
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
hi2s->ErrorCallback(hi2s);
#else
HAL_I2S_ErrorCallback(hi2s);
80045b8: 6878 ldr r0, [r7, #4]
80045ba: f7ff ff13 bl 80043e4 <HAL_I2S_ErrorCallback>
#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
}
}
}
80045be: bf00 nop
80045c0: 3718 adds r7, #24
80045c2: 46bd mov sp, r7
80045c4: bd80 pop {r7, pc}
...
080045c8 <HAL_I2SEx_FullDuplex_IRQHandler>:
* @brief This function handles I2S/I2Sext interrupt requests in full-duplex mode.
* @param hi2s I2S handle
* @retval HAL status
*/
void HAL_I2SEx_FullDuplex_IRQHandler(I2S_HandleTypeDef *hi2s)
{
80045c8: b580 push {r7, lr}
80045ca: b088 sub sp, #32
80045cc: af00 add r7, sp, #0
80045ce: 6078 str r0, [r7, #4]
__IO uint32_t i2ssr = hi2s->Instance->SR;
80045d0: 687b ldr r3, [r7, #4]
80045d2: 681b ldr r3, [r3, #0]
80045d4: 689b ldr r3, [r3, #8]
80045d6: 61fb str r3, [r7, #28]
__IO uint32_t i2sextsr = I2SxEXT(hi2s->Instance)->SR;
80045d8: 687b ldr r3, [r7, #4]
80045da: 681b ldr r3, [r3, #0]
80045dc: 4aa2 ldr r2, [pc, #648] ; (8004868 <HAL_I2SEx_FullDuplex_IRQHandler+0x2a0>)
80045de: 4293 cmp r3, r2
80045e0: d101 bne.n 80045e6 <HAL_I2SEx_FullDuplex_IRQHandler+0x1e>
80045e2: 4ba2 ldr r3, [pc, #648] ; (800486c <HAL_I2SEx_FullDuplex_IRQHandler+0x2a4>)
80045e4: e001 b.n 80045ea <HAL_I2SEx_FullDuplex_IRQHandler+0x22>
80045e6: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
80045ea: 689b ldr r3, [r3, #8]
80045ec: 61bb str r3, [r7, #24]
__IO uint32_t i2scr2 = hi2s->Instance->CR2;
80045ee: 687b ldr r3, [r7, #4]
80045f0: 681b ldr r3, [r3, #0]
80045f2: 685b ldr r3, [r3, #4]
80045f4: 617b str r3, [r7, #20]
__IO uint32_t i2sextcr2 = I2SxEXT(hi2s->Instance)->CR2;
80045f6: 687b ldr r3, [r7, #4]
80045f8: 681b ldr r3, [r3, #0]
80045fa: 4a9b ldr r2, [pc, #620] ; (8004868 <HAL_I2SEx_FullDuplex_IRQHandler+0x2a0>)
80045fc: 4293 cmp r3, r2
80045fe: d101 bne.n 8004604 <HAL_I2SEx_FullDuplex_IRQHandler+0x3c>
8004600: 4b9a ldr r3, [pc, #616] ; (800486c <HAL_I2SEx_FullDuplex_IRQHandler+0x2a4>)
8004602: e001 b.n 8004608 <HAL_I2SEx_FullDuplex_IRQHandler+0x40>
8004604: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
8004608: 685b ldr r3, [r3, #4]
800460a: 613b str r3, [r7, #16]
/* Check if the I2S_MODE_MASTER_TX or I2S_MODE_SLAVE_TX Mode is selected */
if ((hi2s->Init.Mode == I2S_MODE_MASTER_TX) || (hi2s->Init.Mode == I2S_MODE_SLAVE_TX))
800460c: 687b ldr r3, [r7, #4]
800460e: 685b ldr r3, [r3, #4]
8004610: f5b3 7f00 cmp.w r3, #512 ; 0x200
8004614: d004 beq.n 8004620 <HAL_I2SEx_FullDuplex_IRQHandler+0x58>
8004616: 687b ldr r3, [r7, #4]
8004618: 685b ldr r3, [r3, #4]
800461a: 2b00 cmp r3, #0
800461c: f040 8099 bne.w 8004752 <HAL_I2SEx_FullDuplex_IRQHandler+0x18a>
{
/* I2S in mode Transmitter -------------------------------------------------*/
if (((i2ssr & I2S_FLAG_TXE) == I2S_FLAG_TXE) && ((i2scr2 & I2S_IT_TXE) != RESET))
8004620: 69fb ldr r3, [r7, #28]
8004622: f003 0302 and.w r3, r3, #2
8004626: 2b02 cmp r3, #2
8004628: d107 bne.n 800463a <HAL_I2SEx_FullDuplex_IRQHandler+0x72>
800462a: 697b ldr r3, [r7, #20]
800462c: f003 0380 and.w r3, r3, #128 ; 0x80
8004630: 2b00 cmp r3, #0
8004632: d002 beq.n 800463a <HAL_I2SEx_FullDuplex_IRQHandler+0x72>
{
/* When the I2S mode is configured as I2S_MODE_MASTER_TX or I2S_MODE_SLAVE_TX,
the I2S TXE interrupt will be generated to manage the full-duplex transmit phase. */
I2SEx_TxISR_I2S(hi2s);
8004634: 6878 ldr r0, [r7, #4]
8004636: f000 f925 bl 8004884 <I2SEx_TxISR_I2S>
}
/* I2Sext in mode Receiver -----------------------------------------------*/
if (((i2sextsr & I2S_FLAG_RXNE) == I2S_FLAG_RXNE) && ((i2sextcr2 & I2S_IT_RXNE) != RESET))
800463a: 69bb ldr r3, [r7, #24]
800463c: f003 0301 and.w r3, r3, #1
8004640: 2b01 cmp r3, #1
8004642: d107 bne.n 8004654 <HAL_I2SEx_FullDuplex_IRQHandler+0x8c>
8004644: 693b ldr r3, [r7, #16]
8004646: f003 0340 and.w r3, r3, #64 ; 0x40
800464a: 2b00 cmp r3, #0
800464c: d002 beq.n 8004654 <HAL_I2SEx_FullDuplex_IRQHandler+0x8c>
{
/* When the I2S mode is configured as I2S_MODE_MASTER_TX or I2S_MODE_SLAVE_TX,
the I2Sext RXNE interrupt will be generated to manage the full-duplex receive phase. */
I2SEx_RxISR_I2SExt(hi2s);
800464e: 6878 ldr r0, [r7, #4]
8004650: f000 f9c8 bl 80049e4 <I2SEx_RxISR_I2SExt>
}
/* I2Sext Overrun error interrupt occurred --------------------------------*/
if (((i2sextsr & I2S_FLAG_OVR) == I2S_FLAG_OVR) && ((i2sextcr2 & I2S_IT_ERR) != RESET))
8004654: 69bb ldr r3, [r7, #24]
8004656: f003 0340 and.w r3, r3, #64 ; 0x40
800465a: 2b40 cmp r3, #64 ; 0x40
800465c: d13a bne.n 80046d4 <HAL_I2SEx_FullDuplex_IRQHandler+0x10c>
800465e: 693b ldr r3, [r7, #16]
8004660: f003 0320 and.w r3, r3, #32
8004664: 2b00 cmp r3, #0
8004666: d035 beq.n 80046d4 <HAL_I2SEx_FullDuplex_IRQHandler+0x10c>
{
/* Disable RXNE and ERR interrupt */
__HAL_I2SEXT_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
8004668: 687b ldr r3, [r7, #4]
800466a: 681b ldr r3, [r3, #0]
800466c: 4a7e ldr r2, [pc, #504] ; (8004868 <HAL_I2SEx_FullDuplex_IRQHandler+0x2a0>)
800466e: 4293 cmp r3, r2
8004670: d101 bne.n 8004676 <HAL_I2SEx_FullDuplex_IRQHandler+0xae>
8004672: 4b7e ldr r3, [pc, #504] ; (800486c <HAL_I2SEx_FullDuplex_IRQHandler+0x2a4>)
8004674: e001 b.n 800467a <HAL_I2SEx_FullDuplex_IRQHandler+0xb2>
8004676: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
800467a: 685a ldr r2, [r3, #4]
800467c: 687b ldr r3, [r7, #4]
800467e: 681b ldr r3, [r3, #0]
8004680: 4979 ldr r1, [pc, #484] ; (8004868 <HAL_I2SEx_FullDuplex_IRQHandler+0x2a0>)
8004682: 428b cmp r3, r1
8004684: d101 bne.n 800468a <HAL_I2SEx_FullDuplex_IRQHandler+0xc2>
8004686: 4b79 ldr r3, [pc, #484] ; (800486c <HAL_I2SEx_FullDuplex_IRQHandler+0x2a4>)
8004688: e001 b.n 800468e <HAL_I2SEx_FullDuplex_IRQHandler+0xc6>
800468a: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
800468e: f022 0260 bic.w r2, r2, #96 ; 0x60
8004692: 605a str r2, [r3, #4]
/* Disable TXE and ERR interrupt */
__HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
8004694: 687b ldr r3, [r7, #4]
8004696: 681b ldr r3, [r3, #0]
8004698: 685a ldr r2, [r3, #4]
800469a: 687b ldr r3, [r7, #4]
800469c: 681b ldr r3, [r3, #0]
800469e: f022 02a0 bic.w r2, r2, #160 ; 0xa0
80046a2: 605a str r2, [r3, #4]
/* Clear Overrun flag */
__HAL_I2S_CLEAR_OVRFLAG(hi2s);
80046a4: 2300 movs r3, #0
80046a6: 60fb str r3, [r7, #12]
80046a8: 687b ldr r3, [r7, #4]
80046aa: 681b ldr r3, [r3, #0]
80046ac: 68db ldr r3, [r3, #12]
80046ae: 60fb str r3, [r7, #12]
80046b0: 687b ldr r3, [r7, #4]
80046b2: 681b ldr r3, [r3, #0]
80046b4: 689b ldr r3, [r3, #8]
80046b6: 60fb str r3, [r7, #12]
80046b8: 68fb ldr r3, [r7, #12]
/* Set the I2S State ready */
hi2s->State = HAL_I2S_STATE_READY;
80046ba: 687b ldr r3, [r7, #4]
80046bc: 2201 movs r2, #1
80046be: f883 2041 strb.w r2, [r3, #65] ; 0x41
/* Set the error code and execute error callback*/
SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_OVR);
80046c2: 687b ldr r3, [r7, #4]
80046c4: 6c5b ldr r3, [r3, #68] ; 0x44
80046c6: f043 0202 orr.w r2, r3, #2
80046ca: 687b ldr r3, [r7, #4]
80046cc: 645a str r2, [r3, #68] ; 0x44
/* Call user error callback */
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
hi2s->ErrorCallback(hi2s);
#else
HAL_I2S_ErrorCallback(hi2s);
80046ce: 6878 ldr r0, [r7, #4]
80046d0: f7ff fe88 bl 80043e4 <HAL_I2S_ErrorCallback>
#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
}
/* I2S Underrun error interrupt occurred ----------------------------------*/
if (((i2ssr & I2S_FLAG_UDR) == I2S_FLAG_UDR) && ((i2scr2 & I2S_IT_ERR) != RESET))
80046d4: 69fb ldr r3, [r7, #28]
80046d6: f003 0308 and.w r3, r3, #8
80046da: 2b08 cmp r3, #8
80046dc: f040 80be bne.w 800485c <HAL_I2SEx_FullDuplex_IRQHandler+0x294>
80046e0: 697b ldr r3, [r7, #20]
80046e2: f003 0320 and.w r3, r3, #32
80046e6: 2b00 cmp r3, #0
80046e8: f000 80b8 beq.w 800485c <HAL_I2SEx_FullDuplex_IRQHandler+0x294>
{
/* Disable TXE and ERR interrupt */
__HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
80046ec: 687b ldr r3, [r7, #4]
80046ee: 681b ldr r3, [r3, #0]
80046f0: 685a ldr r2, [r3, #4]
80046f2: 687b ldr r3, [r7, #4]
80046f4: 681b ldr r3, [r3, #0]
80046f6: f022 02a0 bic.w r2, r2, #160 ; 0xa0
80046fa: 605a str r2, [r3, #4]
/* Disable RXNE and ERR interrupt */
__HAL_I2SEXT_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
80046fc: 687b ldr r3, [r7, #4]
80046fe: 681b ldr r3, [r3, #0]
8004700: 4a59 ldr r2, [pc, #356] ; (8004868 <HAL_I2SEx_FullDuplex_IRQHandler+0x2a0>)
8004702: 4293 cmp r3, r2
8004704: d101 bne.n 800470a <HAL_I2SEx_FullDuplex_IRQHandler+0x142>
8004706: 4b59 ldr r3, [pc, #356] ; (800486c <HAL_I2SEx_FullDuplex_IRQHandler+0x2a4>)
8004708: e001 b.n 800470e <HAL_I2SEx_FullDuplex_IRQHandler+0x146>
800470a: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
800470e: 685a ldr r2, [r3, #4]
8004710: 687b ldr r3, [r7, #4]
8004712: 681b ldr r3, [r3, #0]
8004714: 4954 ldr r1, [pc, #336] ; (8004868 <HAL_I2SEx_FullDuplex_IRQHandler+0x2a0>)
8004716: 428b cmp r3, r1
8004718: d101 bne.n 800471e <HAL_I2SEx_FullDuplex_IRQHandler+0x156>
800471a: 4b54 ldr r3, [pc, #336] ; (800486c <HAL_I2SEx_FullDuplex_IRQHandler+0x2a4>)
800471c: e001 b.n 8004722 <HAL_I2SEx_FullDuplex_IRQHandler+0x15a>
800471e: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
8004722: f022 0260 bic.w r2, r2, #96 ; 0x60
8004726: 605a str r2, [r3, #4]
/* Clear underrun flag */
__HAL_I2S_CLEAR_UDRFLAG(hi2s);
8004728: 2300 movs r3, #0
800472a: 60bb str r3, [r7, #8]
800472c: 687b ldr r3, [r7, #4]
800472e: 681b ldr r3, [r3, #0]
8004730: 689b ldr r3, [r3, #8]
8004732: 60bb str r3, [r7, #8]
8004734: 68bb ldr r3, [r7, #8]
/* Set the I2S State ready */
hi2s->State = HAL_I2S_STATE_READY;
8004736: 687b ldr r3, [r7, #4]
8004738: 2201 movs r2, #1
800473a: f883 2041 strb.w r2, [r3, #65] ; 0x41
/* Set the error code and execute error callback*/
SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_UDR);
800473e: 687b ldr r3, [r7, #4]
8004740: 6c5b ldr r3, [r3, #68] ; 0x44
8004742: f043 0204 orr.w r2, r3, #4
8004746: 687b ldr r3, [r7, #4]
8004748: 645a str r2, [r3, #68] ; 0x44
/* Call user error callback */
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
hi2s->ErrorCallback(hi2s);
#else
HAL_I2S_ErrorCallback(hi2s);
800474a: 6878 ldr r0, [r7, #4]
800474c: f7ff fe4a bl 80043e4 <HAL_I2S_ErrorCallback>
if (((i2ssr & I2S_FLAG_UDR) == I2S_FLAG_UDR) && ((i2scr2 & I2S_IT_ERR) != RESET))
8004750: e084 b.n 800485c <HAL_I2SEx_FullDuplex_IRQHandler+0x294>
}
/* The I2S_MODE_MASTER_RX or I2S_MODE_SLAVE_RX Mode is selected */
else
{
/* I2Sext in mode Transmitter ----------------------------------------------*/
if (((i2sextsr & I2S_FLAG_TXE) == I2S_FLAG_TXE) && ((i2sextcr2 & I2S_IT_TXE) != RESET))
8004752: 69bb ldr r3, [r7, #24]
8004754: f003 0302 and.w r3, r3, #2
8004758: 2b02 cmp r3, #2
800475a: d107 bne.n 800476c <HAL_I2SEx_FullDuplex_IRQHandler+0x1a4>
800475c: 693b ldr r3, [r7, #16]
800475e: f003 0380 and.w r3, r3, #128 ; 0x80
8004762: 2b00 cmp r3, #0
8004764: d002 beq.n 800476c <HAL_I2SEx_FullDuplex_IRQHandler+0x1a4>
{
/* When the I2S mode is configured as I2S_MODE_MASTER_RX or I2S_MODE_SLAVE_RX,
the I2Sext TXE interrupt will be generated to manage the full-duplex transmit phase. */
I2SEx_TxISR_I2SExt(hi2s);
8004766: 6878 ldr r0, [r7, #4]
8004768: f000 f8be bl 80048e8 <I2SEx_TxISR_I2SExt>
}
/* I2S in mode Receiver --------------------------------------------------*/
if (((i2ssr & I2S_FLAG_RXNE) == I2S_FLAG_RXNE) && ((i2scr2 & I2S_IT_RXNE) != RESET))
800476c: 69fb ldr r3, [r7, #28]
800476e: f003 0301 and.w r3, r3, #1
8004772: 2b01 cmp r3, #1
8004774: d107 bne.n 8004786 <HAL_I2SEx_FullDuplex_IRQHandler+0x1be>
8004776: 697b ldr r3, [r7, #20]
8004778: f003 0340 and.w r3, r3, #64 ; 0x40
800477c: 2b00 cmp r3, #0
800477e: d002 beq.n 8004786 <HAL_I2SEx_FullDuplex_IRQHandler+0x1be>
{
/* When the I2S mode is configured as I2S_MODE_MASTER_RX or I2S_MODE_SLAVE_RX,
the I2S RXNE interrupt will be generated to manage the full-duplex receive phase. */
I2SEx_RxISR_I2S(hi2s);
8004780: 6878 ldr r0, [r7, #4]
8004782: f000 f8fd bl 8004980 <I2SEx_RxISR_I2S>
}
/* I2S Overrun error interrupt occurred -------------------------------------*/
if (((i2ssr & I2S_FLAG_OVR) == I2S_FLAG_OVR) && ((i2scr2 & I2S_IT_ERR) != RESET))
8004786: 69fb ldr r3, [r7, #28]
8004788: f003 0340 and.w r3, r3, #64 ; 0x40
800478c: 2b40 cmp r3, #64 ; 0x40
800478e: d12f bne.n 80047f0 <HAL_I2SEx_FullDuplex_IRQHandler+0x228>
8004790: 697b ldr r3, [r7, #20]
8004792: f003 0320 and.w r3, r3, #32
8004796: 2b00 cmp r3, #0
8004798: d02a beq.n 80047f0 <HAL_I2SEx_FullDuplex_IRQHandler+0x228>
{
/* Disable RXNE and ERR interrupt */
__HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
800479a: 687b ldr r3, [r7, #4]
800479c: 681b ldr r3, [r3, #0]
800479e: 685a ldr r2, [r3, #4]
80047a0: 687b ldr r3, [r7, #4]
80047a2: 681b ldr r3, [r3, #0]
80047a4: f022 0260 bic.w r2, r2, #96 ; 0x60
80047a8: 605a str r2, [r3, #4]
/* Disable TXE and ERR interrupt */
__HAL_I2SEXT_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
80047aa: 687b ldr r3, [r7, #4]
80047ac: 681b ldr r3, [r3, #0]
80047ae: 4a2e ldr r2, [pc, #184] ; (8004868 <HAL_I2SEx_FullDuplex_IRQHandler+0x2a0>)
80047b0: 4293 cmp r3, r2
80047b2: d101 bne.n 80047b8 <HAL_I2SEx_FullDuplex_IRQHandler+0x1f0>
80047b4: 4b2d ldr r3, [pc, #180] ; (800486c <HAL_I2SEx_FullDuplex_IRQHandler+0x2a4>)
80047b6: e001 b.n 80047bc <HAL_I2SEx_FullDuplex_IRQHandler+0x1f4>
80047b8: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
80047bc: 685a ldr r2, [r3, #4]
80047be: 687b ldr r3, [r7, #4]
80047c0: 681b ldr r3, [r3, #0]
80047c2: 4929 ldr r1, [pc, #164] ; (8004868 <HAL_I2SEx_FullDuplex_IRQHandler+0x2a0>)
80047c4: 428b cmp r3, r1
80047c6: d101 bne.n 80047cc <HAL_I2SEx_FullDuplex_IRQHandler+0x204>
80047c8: 4b28 ldr r3, [pc, #160] ; (800486c <HAL_I2SEx_FullDuplex_IRQHandler+0x2a4>)
80047ca: e001 b.n 80047d0 <HAL_I2SEx_FullDuplex_IRQHandler+0x208>
80047cc: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
80047d0: f022 02a0 bic.w r2, r2, #160 ; 0xa0
80047d4: 605a str r2, [r3, #4]
/* Set the I2S State ready */
hi2s->State = HAL_I2S_STATE_READY;
80047d6: 687b ldr r3, [r7, #4]
80047d8: 2201 movs r2, #1
80047da: f883 2041 strb.w r2, [r3, #65] ; 0x41
/* Set the error code and execute error callback*/
SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_OVR);
80047de: 687b ldr r3, [r7, #4]
80047e0: 6c5b ldr r3, [r3, #68] ; 0x44
80047e2: f043 0202 orr.w r2, r3, #2
80047e6: 687b ldr r3, [r7, #4]
80047e8: 645a str r2, [r3, #68] ; 0x44
/* Call user error callback */
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
hi2s->ErrorCallback(hi2s);
#else
HAL_I2S_ErrorCallback(hi2s);
80047ea: 6878 ldr r0, [r7, #4]
80047ec: f7ff fdfa bl 80043e4 <HAL_I2S_ErrorCallback>
#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
}
/* I2Sext Underrun error interrupt occurred -------------------------------*/
if (((i2sextsr & I2S_FLAG_UDR) == I2S_FLAG_UDR) && ((i2sextcr2 & I2S_IT_ERR) != RESET))
80047f0: 69bb ldr r3, [r7, #24]
80047f2: f003 0308 and.w r3, r3, #8
80047f6: 2b08 cmp r3, #8
80047f8: d131 bne.n 800485e <HAL_I2SEx_FullDuplex_IRQHandler+0x296>
80047fa: 693b ldr r3, [r7, #16]
80047fc: f003 0320 and.w r3, r3, #32
8004800: 2b00 cmp r3, #0
8004802: d02c beq.n 800485e <HAL_I2SEx_FullDuplex_IRQHandler+0x296>
{
/* Disable TXE and ERR interrupt */
__HAL_I2SEXT_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
8004804: 687b ldr r3, [r7, #4]
8004806: 681b ldr r3, [r3, #0]
8004808: 4a17 ldr r2, [pc, #92] ; (8004868 <HAL_I2SEx_FullDuplex_IRQHandler+0x2a0>)
800480a: 4293 cmp r3, r2
800480c: d101 bne.n 8004812 <HAL_I2SEx_FullDuplex_IRQHandler+0x24a>
800480e: 4b17 ldr r3, [pc, #92] ; (800486c <HAL_I2SEx_FullDuplex_IRQHandler+0x2a4>)
8004810: e001 b.n 8004816 <HAL_I2SEx_FullDuplex_IRQHandler+0x24e>
8004812: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
8004816: 685a ldr r2, [r3, #4]
8004818: 687b ldr r3, [r7, #4]
800481a: 681b ldr r3, [r3, #0]
800481c: 4912 ldr r1, [pc, #72] ; (8004868 <HAL_I2SEx_FullDuplex_IRQHandler+0x2a0>)
800481e: 428b cmp r3, r1
8004820: d101 bne.n 8004826 <HAL_I2SEx_FullDuplex_IRQHandler+0x25e>
8004822: 4b12 ldr r3, [pc, #72] ; (800486c <HAL_I2SEx_FullDuplex_IRQHandler+0x2a4>)
8004824: e001 b.n 800482a <HAL_I2SEx_FullDuplex_IRQHandler+0x262>
8004826: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
800482a: f022 02a0 bic.w r2, r2, #160 ; 0xa0
800482e: 605a str r2, [r3, #4]
/* Disable RXNE and ERR interrupt */
__HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
8004830: 687b ldr r3, [r7, #4]
8004832: 681b ldr r3, [r3, #0]
8004834: 685a ldr r2, [r3, #4]
8004836: 687b ldr r3, [r7, #4]
8004838: 681b ldr r3, [r3, #0]
800483a: f022 0260 bic.w r2, r2, #96 ; 0x60
800483e: 605a str r2, [r3, #4]
/* Set the I2S State ready */
hi2s->State = HAL_I2S_STATE_READY;
8004840: 687b ldr r3, [r7, #4]
8004842: 2201 movs r2, #1
8004844: f883 2041 strb.w r2, [r3, #65] ; 0x41
/* Set the error code and execute error callback*/
SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_UDR);
8004848: 687b ldr r3, [r7, #4]
800484a: 6c5b ldr r3, [r3, #68] ; 0x44
800484c: f043 0204 orr.w r2, r3, #4
8004850: 687b ldr r3, [r7, #4]
8004852: 645a str r2, [r3, #68] ; 0x44
/* Call user error callback */
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
hi2s->ErrorCallback(hi2s);
#else
HAL_I2S_ErrorCallback(hi2s);
8004854: 6878 ldr r0, [r7, #4]
8004856: f7ff fdc5 bl 80043e4 <HAL_I2S_ErrorCallback>
#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
}
}
}
800485a: e000 b.n 800485e <HAL_I2SEx_FullDuplex_IRQHandler+0x296>
if (((i2ssr & I2S_FLAG_UDR) == I2S_FLAG_UDR) && ((i2scr2 & I2S_IT_ERR) != RESET))
800485c: bf00 nop
}
800485e: bf00 nop
8004860: 3720 adds r7, #32
8004862: 46bd mov sp, r7
8004864: bd80 pop {r7, pc}
8004866: bf00 nop
8004868: 40003800 .word 0x40003800
800486c: 40003400 .word 0x40003400
08004870 <HAL_I2SEx_TxRxCpltCallback>:
* @brief Tx and Rx Transfer completed callback
* @param hi2s I2S handle
* @retval None
*/
__weak void HAL_I2SEx_TxRxCpltCallback(I2S_HandleTypeDef *hi2s)
{
8004870: b480 push {r7}
8004872: b083 sub sp, #12
8004874: af00 add r7, sp, #0
8004876: 6078 str r0, [r7, #4]
UNUSED(hi2s);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_I2SEx_TxRxCpltCallback could be implemented in the user file
*/
}
8004878: bf00 nop
800487a: 370c adds r7, #12
800487c: 46bd mov sp, r7
800487e: f85d 7b04 ldr.w r7, [sp], #4
8004882: 4770 bx lr
08004884 <I2SEx_TxISR_I2S>:
* @brief I2S Full-Duplex IT handler transmit function
* @param hi2s I2S handle
* @retval None
*/
static void I2SEx_TxISR_I2S(I2S_HandleTypeDef *hi2s)
{
8004884: b580 push {r7, lr}
8004886: b082 sub sp, #8
8004888: af00 add r7, sp, #0
800488a: 6078 str r0, [r7, #4]
/* Write Data on DR register */
hi2s->Instance->DR = (*hi2s->pTxBuffPtr++);
800488c: 687b ldr r3, [r7, #4]
800488e: 6a5b ldr r3, [r3, #36] ; 0x24
8004890: 1c99 adds r1, r3, #2
8004892: 687a ldr r2, [r7, #4]
8004894: 6251 str r1, [r2, #36] ; 0x24
8004896: 881a ldrh r2, [r3, #0]
8004898: 687b ldr r3, [r7, #4]
800489a: 681b ldr r3, [r3, #0]
800489c: 60da str r2, [r3, #12]
hi2s->TxXferCount--;
800489e: 687b ldr r3, [r7, #4]
80048a0: 8d5b ldrh r3, [r3, #42] ; 0x2a
80048a2: b29b uxth r3, r3
80048a4: 3b01 subs r3, #1
80048a6: b29a uxth r2, r3
80048a8: 687b ldr r3, [r7, #4]
80048aa: 855a strh r2, [r3, #42] ; 0x2a
if (hi2s->TxXferCount == 0U)
80048ac: 687b ldr r3, [r7, #4]
80048ae: 8d5b ldrh r3, [r3, #42] ; 0x2a
80048b0: b29b uxth r3, r3
80048b2: 2b00 cmp r3, #0
80048b4: d113 bne.n 80048de <I2SEx_TxISR_I2S+0x5a>
{
/* Disable TXE and ERR interrupt */
__HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
80048b6: 687b ldr r3, [r7, #4]
80048b8: 681b ldr r3, [r3, #0]
80048ba: 685a ldr r2, [r3, #4]
80048bc: 687b ldr r3, [r7, #4]
80048be: 681b ldr r3, [r3, #0]
80048c0: f022 02a0 bic.w r2, r2, #160 ; 0xa0
80048c4: 605a str r2, [r3, #4]
if (hi2s->RxXferCount == 0U)
80048c6: 687b ldr r3, [r7, #4]
80048c8: 8e5b ldrh r3, [r3, #50] ; 0x32
80048ca: b29b uxth r3, r3
80048cc: 2b00 cmp r3, #0
80048ce: d106 bne.n 80048de <I2SEx_TxISR_I2S+0x5a>
{
hi2s->State = HAL_I2S_STATE_READY;
80048d0: 687b ldr r3, [r7, #4]
80048d2: 2201 movs r2, #1
80048d4: f883 2041 strb.w r2, [r3, #65] ; 0x41
/* Call user TxRx complete callback */
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
hi2s->TxRxCpltCallback(hi2s);
#else
HAL_I2SEx_TxRxCpltCallback(hi2s);
80048d8: 6878 ldr r0, [r7, #4]
80048da: f7ff ffc9 bl 8004870 <HAL_I2SEx_TxRxCpltCallback>
#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
}
}
}
80048de: bf00 nop
80048e0: 3708 adds r7, #8
80048e2: 46bd mov sp, r7
80048e4: bd80 pop {r7, pc}
...
080048e8 <I2SEx_TxISR_I2SExt>:
* @brief I2SExt Full-Duplex IT handler transmit function
* @param hi2s I2S handle
* @retval None
*/
static void I2SEx_TxISR_I2SExt(I2S_HandleTypeDef *hi2s)
{
80048e8: b580 push {r7, lr}
80048ea: b082 sub sp, #8
80048ec: af00 add r7, sp, #0
80048ee: 6078 str r0, [r7, #4]
/* Write Data on DR register */
I2SxEXT(hi2s->Instance)->DR = (*hi2s->pTxBuffPtr++);
80048f0: 687b ldr r3, [r7, #4]
80048f2: 6a5b ldr r3, [r3, #36] ; 0x24
80048f4: 1c99 adds r1, r3, #2
80048f6: 687a ldr r2, [r7, #4]
80048f8: 6251 str r1, [r2, #36] ; 0x24
80048fa: 8819 ldrh r1, [r3, #0]
80048fc: 687b ldr r3, [r7, #4]
80048fe: 681b ldr r3, [r3, #0]
8004900: 4a1d ldr r2, [pc, #116] ; (8004978 <I2SEx_TxISR_I2SExt+0x90>)
8004902: 4293 cmp r3, r2
8004904: d101 bne.n 800490a <I2SEx_TxISR_I2SExt+0x22>
8004906: 4b1d ldr r3, [pc, #116] ; (800497c <I2SEx_TxISR_I2SExt+0x94>)
8004908: e001 b.n 800490e <I2SEx_TxISR_I2SExt+0x26>
800490a: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
800490e: 460a mov r2, r1
8004910: 60da str r2, [r3, #12]
hi2s->TxXferCount--;
8004912: 687b ldr r3, [r7, #4]
8004914: 8d5b ldrh r3, [r3, #42] ; 0x2a
8004916: b29b uxth r3, r3
8004918: 3b01 subs r3, #1
800491a: b29a uxth r2, r3
800491c: 687b ldr r3, [r7, #4]
800491e: 855a strh r2, [r3, #42] ; 0x2a
if (hi2s->TxXferCount == 0U)
8004920: 687b ldr r3, [r7, #4]
8004922: 8d5b ldrh r3, [r3, #42] ; 0x2a
8004924: b29b uxth r3, r3
8004926: 2b00 cmp r3, #0
8004928: d121 bne.n 800496e <I2SEx_TxISR_I2SExt+0x86>
{
/* Disable I2Sext TXE and ERR interrupt */
__HAL_I2SEXT_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
800492a: 687b ldr r3, [r7, #4]
800492c: 681b ldr r3, [r3, #0]
800492e: 4a12 ldr r2, [pc, #72] ; (8004978 <I2SEx_TxISR_I2SExt+0x90>)
8004930: 4293 cmp r3, r2
8004932: d101 bne.n 8004938 <I2SEx_TxISR_I2SExt+0x50>
8004934: 4b11 ldr r3, [pc, #68] ; (800497c <I2SEx_TxISR_I2SExt+0x94>)
8004936: e001 b.n 800493c <I2SEx_TxISR_I2SExt+0x54>
8004938: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
800493c: 685a ldr r2, [r3, #4]
800493e: 687b ldr r3, [r7, #4]
8004940: 681b ldr r3, [r3, #0]
8004942: 490d ldr r1, [pc, #52] ; (8004978 <I2SEx_TxISR_I2SExt+0x90>)
8004944: 428b cmp r3, r1
8004946: d101 bne.n 800494c <I2SEx_TxISR_I2SExt+0x64>
8004948: 4b0c ldr r3, [pc, #48] ; (800497c <I2SEx_TxISR_I2SExt+0x94>)
800494a: e001 b.n 8004950 <I2SEx_TxISR_I2SExt+0x68>
800494c: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
8004950: f022 02a0 bic.w r2, r2, #160 ; 0xa0
8004954: 605a str r2, [r3, #4]
if (hi2s->RxXferCount == 0U)
8004956: 687b ldr r3, [r7, #4]
8004958: 8e5b ldrh r3, [r3, #50] ; 0x32
800495a: b29b uxth r3, r3
800495c: 2b00 cmp r3, #0
800495e: d106 bne.n 800496e <I2SEx_TxISR_I2SExt+0x86>
{
hi2s->State = HAL_I2S_STATE_READY;
8004960: 687b ldr r3, [r7, #4]
8004962: 2201 movs r2, #1
8004964: f883 2041 strb.w r2, [r3, #65] ; 0x41
/* Call user TxRx complete callback */
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
hi2s->TxRxCpltCallback(hi2s);
#else
HAL_I2SEx_TxRxCpltCallback(hi2s);
8004968: 6878 ldr r0, [r7, #4]
800496a: f7ff ff81 bl 8004870 <HAL_I2SEx_TxRxCpltCallback>
#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
}
}
}
800496e: bf00 nop
8004970: 3708 adds r7, #8
8004972: 46bd mov sp, r7
8004974: bd80 pop {r7, pc}
8004976: bf00 nop
8004978: 40003800 .word 0x40003800
800497c: 40003400 .word 0x40003400
08004980 <I2SEx_RxISR_I2S>:
* @brief I2S Full-Duplex IT handler receive function
* @param hi2s I2S handle
* @retval None
*/
static void I2SEx_RxISR_I2S(I2S_HandleTypeDef *hi2s)
{
8004980: b580 push {r7, lr}
8004982: b082 sub sp, #8
8004984: af00 add r7, sp, #0
8004986: 6078 str r0, [r7, #4]
/* Read Data from DR register */
(*hi2s->pRxBuffPtr++) = hi2s->Instance->DR;
8004988: 687b ldr r3, [r7, #4]
800498a: 681b ldr r3, [r3, #0]
800498c: 68d8 ldr r0, [r3, #12]
800498e: 687b ldr r3, [r7, #4]
8004990: 6adb ldr r3, [r3, #44] ; 0x2c
8004992: 1c99 adds r1, r3, #2
8004994: 687a ldr r2, [r7, #4]
8004996: 62d1 str r1, [r2, #44] ; 0x2c
8004998: b282 uxth r2, r0
800499a: 801a strh r2, [r3, #0]
hi2s->RxXferCount--;
800499c: 687b ldr r3, [r7, #4]
800499e: 8e5b ldrh r3, [r3, #50] ; 0x32
80049a0: b29b uxth r3, r3
80049a2: 3b01 subs r3, #1
80049a4: b29a uxth r2, r3
80049a6: 687b ldr r3, [r7, #4]
80049a8: 865a strh r2, [r3, #50] ; 0x32
if (hi2s->RxXferCount == 0U)
80049aa: 687b ldr r3, [r7, #4]
80049ac: 8e5b ldrh r3, [r3, #50] ; 0x32
80049ae: b29b uxth r3, r3
80049b0: 2b00 cmp r3, #0
80049b2: d113 bne.n 80049dc <I2SEx_RxISR_I2S+0x5c>
{
/* Disable RXNE and ERR interrupt */
__HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
80049b4: 687b ldr r3, [r7, #4]
80049b6: 681b ldr r3, [r3, #0]
80049b8: 685a ldr r2, [r3, #4]
80049ba: 687b ldr r3, [r7, #4]
80049bc: 681b ldr r3, [r3, #0]
80049be: f022 0260 bic.w r2, r2, #96 ; 0x60
80049c2: 605a str r2, [r3, #4]
if (hi2s->TxXferCount == 0U)
80049c4: 687b ldr r3, [r7, #4]
80049c6: 8d5b ldrh r3, [r3, #42] ; 0x2a
80049c8: b29b uxth r3, r3
80049ca: 2b00 cmp r3, #0
80049cc: d106 bne.n 80049dc <I2SEx_RxISR_I2S+0x5c>
{
hi2s->State = HAL_I2S_STATE_READY;
80049ce: 687b ldr r3, [r7, #4]
80049d0: 2201 movs r2, #1
80049d2: f883 2041 strb.w r2, [r3, #65] ; 0x41
/* Call user TxRx complete callback */
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
hi2s->TxRxCpltCallback(hi2s);
#else
HAL_I2SEx_TxRxCpltCallback(hi2s);
80049d6: 6878 ldr r0, [r7, #4]
80049d8: f7ff ff4a bl 8004870 <HAL_I2SEx_TxRxCpltCallback>
#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
}
}
}
80049dc: bf00 nop
80049de: 3708 adds r7, #8
80049e0: 46bd mov sp, r7
80049e2: bd80 pop {r7, pc}
080049e4 <I2SEx_RxISR_I2SExt>:
* @brief I2SExt Full-Duplex IT handler receive function
* @param hi2s I2S handle
* @retval None
*/
static void I2SEx_RxISR_I2SExt(I2S_HandleTypeDef *hi2s)
{
80049e4: b580 push {r7, lr}
80049e6: b082 sub sp, #8
80049e8: af00 add r7, sp, #0
80049ea: 6078 str r0, [r7, #4]
/* Read Data from DR register */
(*hi2s->pRxBuffPtr++) = I2SxEXT(hi2s->Instance)->DR;
80049ec: 687b ldr r3, [r7, #4]
80049ee: 681b ldr r3, [r3, #0]
80049f0: 4a20 ldr r2, [pc, #128] ; (8004a74 <I2SEx_RxISR_I2SExt+0x90>)
80049f2: 4293 cmp r3, r2
80049f4: d101 bne.n 80049fa <I2SEx_RxISR_I2SExt+0x16>
80049f6: 4b20 ldr r3, [pc, #128] ; (8004a78 <I2SEx_RxISR_I2SExt+0x94>)
80049f8: e001 b.n 80049fe <I2SEx_RxISR_I2SExt+0x1a>
80049fa: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
80049fe: 68d8 ldr r0, [r3, #12]
8004a00: 687b ldr r3, [r7, #4]
8004a02: 6adb ldr r3, [r3, #44] ; 0x2c
8004a04: 1c99 adds r1, r3, #2
8004a06: 687a ldr r2, [r7, #4]
8004a08: 62d1 str r1, [r2, #44] ; 0x2c
8004a0a: b282 uxth r2, r0
8004a0c: 801a strh r2, [r3, #0]
hi2s->RxXferCount--;
8004a0e: 687b ldr r3, [r7, #4]
8004a10: 8e5b ldrh r3, [r3, #50] ; 0x32
8004a12: b29b uxth r3, r3
8004a14: 3b01 subs r3, #1
8004a16: b29a uxth r2, r3
8004a18: 687b ldr r3, [r7, #4]
8004a1a: 865a strh r2, [r3, #50] ; 0x32
if (hi2s->RxXferCount == 0U)
8004a1c: 687b ldr r3, [r7, #4]
8004a1e: 8e5b ldrh r3, [r3, #50] ; 0x32
8004a20: b29b uxth r3, r3
8004a22: 2b00 cmp r3, #0
8004a24: d121 bne.n 8004a6a <I2SEx_RxISR_I2SExt+0x86>
{
/* Disable I2Sext RXNE and ERR interrupt */
__HAL_I2SEXT_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
8004a26: 687b ldr r3, [r7, #4]
8004a28: 681b ldr r3, [r3, #0]
8004a2a: 4a12 ldr r2, [pc, #72] ; (8004a74 <I2SEx_RxISR_I2SExt+0x90>)
8004a2c: 4293 cmp r3, r2
8004a2e: d101 bne.n 8004a34 <I2SEx_RxISR_I2SExt+0x50>
8004a30: 4b11 ldr r3, [pc, #68] ; (8004a78 <I2SEx_RxISR_I2SExt+0x94>)
8004a32: e001 b.n 8004a38 <I2SEx_RxISR_I2SExt+0x54>
8004a34: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
8004a38: 685a ldr r2, [r3, #4]
8004a3a: 687b ldr r3, [r7, #4]
8004a3c: 681b ldr r3, [r3, #0]
8004a3e: 490d ldr r1, [pc, #52] ; (8004a74 <I2SEx_RxISR_I2SExt+0x90>)
8004a40: 428b cmp r3, r1
8004a42: d101 bne.n 8004a48 <I2SEx_RxISR_I2SExt+0x64>
8004a44: 4b0c ldr r3, [pc, #48] ; (8004a78 <I2SEx_RxISR_I2SExt+0x94>)
8004a46: e001 b.n 8004a4c <I2SEx_RxISR_I2SExt+0x68>
8004a48: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
8004a4c: f022 0260 bic.w r2, r2, #96 ; 0x60
8004a50: 605a str r2, [r3, #4]
if (hi2s->TxXferCount == 0U)
8004a52: 687b ldr r3, [r7, #4]
8004a54: 8d5b ldrh r3, [r3, #42] ; 0x2a
8004a56: b29b uxth r3, r3
8004a58: 2b00 cmp r3, #0
8004a5a: d106 bne.n 8004a6a <I2SEx_RxISR_I2SExt+0x86>
{
hi2s->State = HAL_I2S_STATE_READY;
8004a5c: 687b ldr r3, [r7, #4]
8004a5e: 2201 movs r2, #1
8004a60: f883 2041 strb.w r2, [r3, #65] ; 0x41
/* Call user TxRx complete callback */
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
hi2s->TxRxCpltCallback(hi2s);
#else
HAL_I2SEx_TxRxCpltCallback(hi2s);
8004a64: 6878 ldr r0, [r7, #4]
8004a66: f7ff ff03 bl 8004870 <HAL_I2SEx_TxRxCpltCallback>
#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
}
}
}
8004a6a: bf00 nop
8004a6c: 3708 adds r7, #8
8004a6e: 46bd mov sp, r7
8004a70: bd80 pop {r7, pc}
8004a72: bf00 nop
8004a74: 40003800 .word 0x40003800
8004a78: 40003400 .word 0x40003400
08004a7c <HAL_RCC_OscConfig>:
* supported by this API. User should request a transition to HSE Off
* first and then HSE On or HSE Bypass.
* @retval HAL status
*/
__weak HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
{
8004a7c: b580 push {r7, lr}
8004a7e: b086 sub sp, #24
8004a80: af00 add r7, sp, #0
8004a82: 6078 str r0, [r7, #4]
uint32_t tickstart, pll_config;
/* Check Null pointer */
if(RCC_OscInitStruct == NULL)
8004a84: 687b ldr r3, [r7, #4]
8004a86: 2b00 cmp r3, #0
8004a88: d101 bne.n 8004a8e <HAL_RCC_OscConfig+0x12>
{
return HAL_ERROR;
8004a8a: 2301 movs r3, #1
8004a8c: e25b b.n 8004f46 <HAL_RCC_OscConfig+0x4ca>
}
/* Check the parameters */
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
/*------------------------------- HSE Configuration ------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
8004a8e: 687b ldr r3, [r7, #4]
8004a90: 681b ldr r3, [r3, #0]
8004a92: f003 0301 and.w r3, r3, #1
8004a96: 2b00 cmp r3, #0
8004a98: d075 beq.n 8004b86 <HAL_RCC_OscConfig+0x10a>
{
/* Check the parameters */
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
/* When the HSE is used as system clock or clock source for PLL in these cases HSE will not disabled */
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) ||\
8004a9a: 4ba3 ldr r3, [pc, #652] ; (8004d28 <HAL_RCC_OscConfig+0x2ac>)
8004a9c: 689b ldr r3, [r3, #8]
8004a9e: f003 030c and.w r3, r3, #12
8004aa2: 2b04 cmp r3, #4
8004aa4: d00c beq.n 8004ac0 <HAL_RCC_OscConfig+0x44>
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
8004aa6: 4ba0 ldr r3, [pc, #640] ; (8004d28 <HAL_RCC_OscConfig+0x2ac>)
8004aa8: 689b ldr r3, [r3, #8]
8004aaa: f003 030c and.w r3, r3, #12
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) ||\
8004aae: 2b08 cmp r3, #8
8004ab0: d112 bne.n 8004ad8 <HAL_RCC_OscConfig+0x5c>
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
8004ab2: 4b9d ldr r3, [pc, #628] ; (8004d28 <HAL_RCC_OscConfig+0x2ac>)
8004ab4: 685b ldr r3, [r3, #4]
8004ab6: f403 0380 and.w r3, r3, #4194304 ; 0x400000
8004aba: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000
8004abe: d10b bne.n 8004ad8 <HAL_RCC_OscConfig+0x5c>
{
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
8004ac0: 4b99 ldr r3, [pc, #612] ; (8004d28 <HAL_RCC_OscConfig+0x2ac>)
8004ac2: 681b ldr r3, [r3, #0]
8004ac4: f403 3300 and.w r3, r3, #131072 ; 0x20000
8004ac8: 2b00 cmp r3, #0
8004aca: d05b beq.n 8004b84 <HAL_RCC_OscConfig+0x108>
8004acc: 687b ldr r3, [r7, #4]
8004ace: 685b ldr r3, [r3, #4]
8004ad0: 2b00 cmp r3, #0
8004ad2: d157 bne.n 8004b84 <HAL_RCC_OscConfig+0x108>
{
return HAL_ERROR;
8004ad4: 2301 movs r3, #1
8004ad6: e236 b.n 8004f46 <HAL_RCC_OscConfig+0x4ca>
}
}
else
{
/* Set the new HSE configuration ---------------------------------------*/
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
8004ad8: 687b ldr r3, [r7, #4]
8004ada: 685b ldr r3, [r3, #4]
8004adc: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
8004ae0: d106 bne.n 8004af0 <HAL_RCC_OscConfig+0x74>
8004ae2: 4b91 ldr r3, [pc, #580] ; (8004d28 <HAL_RCC_OscConfig+0x2ac>)
8004ae4: 681b ldr r3, [r3, #0]
8004ae6: 4a90 ldr r2, [pc, #576] ; (8004d28 <HAL_RCC_OscConfig+0x2ac>)
8004ae8: f443 3380 orr.w r3, r3, #65536 ; 0x10000
8004aec: 6013 str r3, [r2, #0]
8004aee: e01d b.n 8004b2c <HAL_RCC_OscConfig+0xb0>
8004af0: 687b ldr r3, [r7, #4]
8004af2: 685b ldr r3, [r3, #4]
8004af4: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000
8004af8: d10c bne.n 8004b14 <HAL_RCC_OscConfig+0x98>
8004afa: 4b8b ldr r3, [pc, #556] ; (8004d28 <HAL_RCC_OscConfig+0x2ac>)
8004afc: 681b ldr r3, [r3, #0]
8004afe: 4a8a ldr r2, [pc, #552] ; (8004d28 <HAL_RCC_OscConfig+0x2ac>)
8004b00: f443 2380 orr.w r3, r3, #262144 ; 0x40000
8004b04: 6013 str r3, [r2, #0]
8004b06: 4b88 ldr r3, [pc, #544] ; (8004d28 <HAL_RCC_OscConfig+0x2ac>)
8004b08: 681b ldr r3, [r3, #0]
8004b0a: 4a87 ldr r2, [pc, #540] ; (8004d28 <HAL_RCC_OscConfig+0x2ac>)
8004b0c: f443 3380 orr.w r3, r3, #65536 ; 0x10000
8004b10: 6013 str r3, [r2, #0]
8004b12: e00b b.n 8004b2c <HAL_RCC_OscConfig+0xb0>
8004b14: 4b84 ldr r3, [pc, #528] ; (8004d28 <HAL_RCC_OscConfig+0x2ac>)
8004b16: 681b ldr r3, [r3, #0]
8004b18: 4a83 ldr r2, [pc, #524] ; (8004d28 <HAL_RCC_OscConfig+0x2ac>)
8004b1a: f423 3380 bic.w r3, r3, #65536 ; 0x10000
8004b1e: 6013 str r3, [r2, #0]
8004b20: 4b81 ldr r3, [pc, #516] ; (8004d28 <HAL_RCC_OscConfig+0x2ac>)
8004b22: 681b ldr r3, [r3, #0]
8004b24: 4a80 ldr r2, [pc, #512] ; (8004d28 <HAL_RCC_OscConfig+0x2ac>)
8004b26: f423 2380 bic.w r3, r3, #262144 ; 0x40000
8004b2a: 6013 str r3, [r2, #0]
/* Check the HSE State */
if((RCC_OscInitStruct->HSEState) != RCC_HSE_OFF)
8004b2c: 687b ldr r3, [r7, #4]
8004b2e: 685b ldr r3, [r3, #4]
8004b30: 2b00 cmp r3, #0
8004b32: d013 beq.n 8004b5c <HAL_RCC_OscConfig+0xe0>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8004b34: f7fc fb90 bl 8001258 <HAL_GetTick>
8004b38: 6138 str r0, [r7, #16]
/* Wait till HSE is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8004b3a: e008 b.n 8004b4e <HAL_RCC_OscConfig+0xd2>
{
if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
8004b3c: f7fc fb8c bl 8001258 <HAL_GetTick>
8004b40: 4602 mov r2, r0
8004b42: 693b ldr r3, [r7, #16]
8004b44: 1ad3 subs r3, r2, r3
8004b46: 2b64 cmp r3, #100 ; 0x64
8004b48: d901 bls.n 8004b4e <HAL_RCC_OscConfig+0xd2>
{
return HAL_TIMEOUT;
8004b4a: 2303 movs r3, #3
8004b4c: e1fb b.n 8004f46 <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8004b4e: 4b76 ldr r3, [pc, #472] ; (8004d28 <HAL_RCC_OscConfig+0x2ac>)
8004b50: 681b ldr r3, [r3, #0]
8004b52: f403 3300 and.w r3, r3, #131072 ; 0x20000
8004b56: 2b00 cmp r3, #0
8004b58: d0f0 beq.n 8004b3c <HAL_RCC_OscConfig+0xc0>
8004b5a: e014 b.n 8004b86 <HAL_RCC_OscConfig+0x10a>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8004b5c: f7fc fb7c bl 8001258 <HAL_GetTick>
8004b60: 6138 str r0, [r7, #16]
/* Wait till HSE is bypassed or disabled */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
8004b62: e008 b.n 8004b76 <HAL_RCC_OscConfig+0xfa>
{
if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
8004b64: f7fc fb78 bl 8001258 <HAL_GetTick>
8004b68: 4602 mov r2, r0
8004b6a: 693b ldr r3, [r7, #16]
8004b6c: 1ad3 subs r3, r2, r3
8004b6e: 2b64 cmp r3, #100 ; 0x64
8004b70: d901 bls.n 8004b76 <HAL_RCC_OscConfig+0xfa>
{
return HAL_TIMEOUT;
8004b72: 2303 movs r3, #3
8004b74: e1e7 b.n 8004f46 <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
8004b76: 4b6c ldr r3, [pc, #432] ; (8004d28 <HAL_RCC_OscConfig+0x2ac>)
8004b78: 681b ldr r3, [r3, #0]
8004b7a: f403 3300 and.w r3, r3, #131072 ; 0x20000
8004b7e: 2b00 cmp r3, #0
8004b80: d1f0 bne.n 8004b64 <HAL_RCC_OscConfig+0xe8>
8004b82: e000 b.n 8004b86 <HAL_RCC_OscConfig+0x10a>
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
8004b84: bf00 nop
}
}
}
}
/*----------------------------- HSI Configuration --------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
8004b86: 687b ldr r3, [r7, #4]
8004b88: 681b ldr r3, [r3, #0]
8004b8a: f003 0302 and.w r3, r3, #2
8004b8e: 2b00 cmp r3, #0
8004b90: d063 beq.n 8004c5a <HAL_RCC_OscConfig+0x1de>
/* Check the parameters */
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) ||\
8004b92: 4b65 ldr r3, [pc, #404] ; (8004d28 <HAL_RCC_OscConfig+0x2ac>)
8004b94: 689b ldr r3, [r3, #8]
8004b96: f003 030c and.w r3, r3, #12
8004b9a: 2b00 cmp r3, #0
8004b9c: d00b beq.n 8004bb6 <HAL_RCC_OscConfig+0x13a>
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
8004b9e: 4b62 ldr r3, [pc, #392] ; (8004d28 <HAL_RCC_OscConfig+0x2ac>)
8004ba0: 689b ldr r3, [r3, #8]
8004ba2: f003 030c and.w r3, r3, #12
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) ||\
8004ba6: 2b08 cmp r3, #8
8004ba8: d11c bne.n 8004be4 <HAL_RCC_OscConfig+0x168>
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
8004baa: 4b5f ldr r3, [pc, #380] ; (8004d28 <HAL_RCC_OscConfig+0x2ac>)
8004bac: 685b ldr r3, [r3, #4]
8004bae: f403 0380 and.w r3, r3, #4194304 ; 0x400000
8004bb2: 2b00 cmp r3, #0
8004bb4: d116 bne.n 8004be4 <HAL_RCC_OscConfig+0x168>
{
/* When HSI is used as system clock it will not disabled */
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
8004bb6: 4b5c ldr r3, [pc, #368] ; (8004d28 <HAL_RCC_OscConfig+0x2ac>)
8004bb8: 681b ldr r3, [r3, #0]
8004bba: f003 0302 and.w r3, r3, #2
8004bbe: 2b00 cmp r3, #0
8004bc0: d005 beq.n 8004bce <HAL_RCC_OscConfig+0x152>
8004bc2: 687b ldr r3, [r7, #4]
8004bc4: 68db ldr r3, [r3, #12]
8004bc6: 2b01 cmp r3, #1
8004bc8: d001 beq.n 8004bce <HAL_RCC_OscConfig+0x152>
{
return HAL_ERROR;
8004bca: 2301 movs r3, #1
8004bcc: e1bb b.n 8004f46 <HAL_RCC_OscConfig+0x4ca>
}
/* Otherwise, just the calibration is allowed */
else
{
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
8004bce: 4b56 ldr r3, [pc, #344] ; (8004d28 <HAL_RCC_OscConfig+0x2ac>)
8004bd0: 681b ldr r3, [r3, #0]
8004bd2: f023 02f8 bic.w r2, r3, #248 ; 0xf8
8004bd6: 687b ldr r3, [r7, #4]
8004bd8: 691b ldr r3, [r3, #16]
8004bda: 00db lsls r3, r3, #3
8004bdc: 4952 ldr r1, [pc, #328] ; (8004d28 <HAL_RCC_OscConfig+0x2ac>)
8004bde: 4313 orrs r3, r2
8004be0: 600b str r3, [r1, #0]
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
8004be2: e03a b.n 8004c5a <HAL_RCC_OscConfig+0x1de>
}
}
else
{
/* Check the HSI State */
if((RCC_OscInitStruct->HSIState)!= RCC_HSI_OFF)
8004be4: 687b ldr r3, [r7, #4]
8004be6: 68db ldr r3, [r3, #12]
8004be8: 2b00 cmp r3, #0
8004bea: d020 beq.n 8004c2e <HAL_RCC_OscConfig+0x1b2>
{
/* Enable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_ENABLE();
8004bec: 4b4f ldr r3, [pc, #316] ; (8004d2c <HAL_RCC_OscConfig+0x2b0>)
8004bee: 2201 movs r2, #1
8004bf0: 601a str r2, [r3, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
8004bf2: f7fc fb31 bl 8001258 <HAL_GetTick>
8004bf6: 6138 str r0, [r7, #16]
/* Wait till HSI is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8004bf8: e008 b.n 8004c0c <HAL_RCC_OscConfig+0x190>
{
if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
8004bfa: f7fc fb2d bl 8001258 <HAL_GetTick>
8004bfe: 4602 mov r2, r0
8004c00: 693b ldr r3, [r7, #16]
8004c02: 1ad3 subs r3, r2, r3
8004c04: 2b02 cmp r3, #2
8004c06: d901 bls.n 8004c0c <HAL_RCC_OscConfig+0x190>
{
return HAL_TIMEOUT;
8004c08: 2303 movs r3, #3
8004c0a: e19c b.n 8004f46 <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8004c0c: 4b46 ldr r3, [pc, #280] ; (8004d28 <HAL_RCC_OscConfig+0x2ac>)
8004c0e: 681b ldr r3, [r3, #0]
8004c10: f003 0302 and.w r3, r3, #2
8004c14: 2b00 cmp r3, #0
8004c16: d0f0 beq.n 8004bfa <HAL_RCC_OscConfig+0x17e>
}
}
/* Adjusts the Internal High Speed oscillator (HSI) calibration value. */
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
8004c18: 4b43 ldr r3, [pc, #268] ; (8004d28 <HAL_RCC_OscConfig+0x2ac>)
8004c1a: 681b ldr r3, [r3, #0]
8004c1c: f023 02f8 bic.w r2, r3, #248 ; 0xf8
8004c20: 687b ldr r3, [r7, #4]
8004c22: 691b ldr r3, [r3, #16]
8004c24: 00db lsls r3, r3, #3
8004c26: 4940 ldr r1, [pc, #256] ; (8004d28 <HAL_RCC_OscConfig+0x2ac>)
8004c28: 4313 orrs r3, r2
8004c2a: 600b str r3, [r1, #0]
8004c2c: e015 b.n 8004c5a <HAL_RCC_OscConfig+0x1de>
}
else
{
/* Disable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_DISABLE();
8004c2e: 4b3f ldr r3, [pc, #252] ; (8004d2c <HAL_RCC_OscConfig+0x2b0>)
8004c30: 2200 movs r2, #0
8004c32: 601a str r2, [r3, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
8004c34: f7fc fb10 bl 8001258 <HAL_GetTick>
8004c38: 6138 str r0, [r7, #16]
/* Wait till HSI is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
8004c3a: e008 b.n 8004c4e <HAL_RCC_OscConfig+0x1d2>
{
if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
8004c3c: f7fc fb0c bl 8001258 <HAL_GetTick>
8004c40: 4602 mov r2, r0
8004c42: 693b ldr r3, [r7, #16]
8004c44: 1ad3 subs r3, r2, r3
8004c46: 2b02 cmp r3, #2
8004c48: d901 bls.n 8004c4e <HAL_RCC_OscConfig+0x1d2>
{
return HAL_TIMEOUT;
8004c4a: 2303 movs r3, #3
8004c4c: e17b b.n 8004f46 <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
8004c4e: 4b36 ldr r3, [pc, #216] ; (8004d28 <HAL_RCC_OscConfig+0x2ac>)
8004c50: 681b ldr r3, [r3, #0]
8004c52: f003 0302 and.w r3, r3, #2
8004c56: 2b00 cmp r3, #0
8004c58: d1f0 bne.n 8004c3c <HAL_RCC_OscConfig+0x1c0>
}
}
}
}
/*------------------------------ LSI Configuration -------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
8004c5a: 687b ldr r3, [r7, #4]
8004c5c: 681b ldr r3, [r3, #0]
8004c5e: f003 0308 and.w r3, r3, #8
8004c62: 2b00 cmp r3, #0
8004c64: d030 beq.n 8004cc8 <HAL_RCC_OscConfig+0x24c>
{
/* Check the parameters */
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
/* Check the LSI State */
if((RCC_OscInitStruct->LSIState)!= RCC_LSI_OFF)
8004c66: 687b ldr r3, [r7, #4]
8004c68: 695b ldr r3, [r3, #20]
8004c6a: 2b00 cmp r3, #0
8004c6c: d016 beq.n 8004c9c <HAL_RCC_OscConfig+0x220>
{
/* Enable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_ENABLE();
8004c6e: 4b30 ldr r3, [pc, #192] ; (8004d30 <HAL_RCC_OscConfig+0x2b4>)
8004c70: 2201 movs r2, #1
8004c72: 601a str r2, [r3, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
8004c74: f7fc faf0 bl 8001258 <HAL_GetTick>
8004c78: 6138 str r0, [r7, #16]
/* Wait till LSI is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
8004c7a: e008 b.n 8004c8e <HAL_RCC_OscConfig+0x212>
{
if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
8004c7c: f7fc faec bl 8001258 <HAL_GetTick>
8004c80: 4602 mov r2, r0
8004c82: 693b ldr r3, [r7, #16]
8004c84: 1ad3 subs r3, r2, r3
8004c86: 2b02 cmp r3, #2
8004c88: d901 bls.n 8004c8e <HAL_RCC_OscConfig+0x212>
{
return HAL_TIMEOUT;
8004c8a: 2303 movs r3, #3
8004c8c: e15b b.n 8004f46 <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
8004c8e: 4b26 ldr r3, [pc, #152] ; (8004d28 <HAL_RCC_OscConfig+0x2ac>)
8004c90: 6f5b ldr r3, [r3, #116] ; 0x74
8004c92: f003 0302 and.w r3, r3, #2
8004c96: 2b00 cmp r3, #0
8004c98: d0f0 beq.n 8004c7c <HAL_RCC_OscConfig+0x200>
8004c9a: e015 b.n 8004cc8 <HAL_RCC_OscConfig+0x24c>
}
}
else
{
/* Disable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_DISABLE();
8004c9c: 4b24 ldr r3, [pc, #144] ; (8004d30 <HAL_RCC_OscConfig+0x2b4>)
8004c9e: 2200 movs r2, #0
8004ca0: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8004ca2: f7fc fad9 bl 8001258 <HAL_GetTick>
8004ca6: 6138 str r0, [r7, #16]
/* Wait till LSI is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
8004ca8: e008 b.n 8004cbc <HAL_RCC_OscConfig+0x240>
{
if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
8004caa: f7fc fad5 bl 8001258 <HAL_GetTick>
8004cae: 4602 mov r2, r0
8004cb0: 693b ldr r3, [r7, #16]
8004cb2: 1ad3 subs r3, r2, r3
8004cb4: 2b02 cmp r3, #2
8004cb6: d901 bls.n 8004cbc <HAL_RCC_OscConfig+0x240>
{
return HAL_TIMEOUT;
8004cb8: 2303 movs r3, #3
8004cba: e144 b.n 8004f46 <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
8004cbc: 4b1a ldr r3, [pc, #104] ; (8004d28 <HAL_RCC_OscConfig+0x2ac>)
8004cbe: 6f5b ldr r3, [r3, #116] ; 0x74
8004cc0: f003 0302 and.w r3, r3, #2
8004cc4: 2b00 cmp r3, #0
8004cc6: d1f0 bne.n 8004caa <HAL_RCC_OscConfig+0x22e>
}
}
}
}
/*------------------------------ LSE Configuration -------------------------*/
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
8004cc8: 687b ldr r3, [r7, #4]
8004cca: 681b ldr r3, [r3, #0]
8004ccc: f003 0304 and.w r3, r3, #4
8004cd0: 2b00 cmp r3, #0
8004cd2: f000 80a0 beq.w 8004e16 <HAL_RCC_OscConfig+0x39a>
{
FlagStatus pwrclkchanged = RESET;
8004cd6: 2300 movs r3, #0
8004cd8: 75fb strb r3, [r7, #23]
/* Check the parameters */
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
/* Update LSE configuration in Backup Domain control register */
/* Requires to enable write access to Backup Domain of necessary */
if(__HAL_RCC_PWR_IS_CLK_DISABLED())
8004cda: 4b13 ldr r3, [pc, #76] ; (8004d28 <HAL_RCC_OscConfig+0x2ac>)
8004cdc: 6c1b ldr r3, [r3, #64] ; 0x40
8004cde: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
8004ce2: 2b00 cmp r3, #0
8004ce4: d10f bne.n 8004d06 <HAL_RCC_OscConfig+0x28a>
{
__HAL_RCC_PWR_CLK_ENABLE();
8004ce6: 2300 movs r3, #0
8004ce8: 60bb str r3, [r7, #8]
8004cea: 4b0f ldr r3, [pc, #60] ; (8004d28 <HAL_RCC_OscConfig+0x2ac>)
8004cec: 6c1b ldr r3, [r3, #64] ; 0x40
8004cee: 4a0e ldr r2, [pc, #56] ; (8004d28 <HAL_RCC_OscConfig+0x2ac>)
8004cf0: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
8004cf4: 6413 str r3, [r2, #64] ; 0x40
8004cf6: 4b0c ldr r3, [pc, #48] ; (8004d28 <HAL_RCC_OscConfig+0x2ac>)
8004cf8: 6c1b ldr r3, [r3, #64] ; 0x40
8004cfa: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
8004cfe: 60bb str r3, [r7, #8]
8004d00: 68bb ldr r3, [r7, #8]
pwrclkchanged = SET;
8004d02: 2301 movs r3, #1
8004d04: 75fb strb r3, [r7, #23]
}
if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8004d06: 4b0b ldr r3, [pc, #44] ; (8004d34 <HAL_RCC_OscConfig+0x2b8>)
8004d08: 681b ldr r3, [r3, #0]
8004d0a: f403 7380 and.w r3, r3, #256 ; 0x100
8004d0e: 2b00 cmp r3, #0
8004d10: d121 bne.n 8004d56 <HAL_RCC_OscConfig+0x2da>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
8004d12: 4b08 ldr r3, [pc, #32] ; (8004d34 <HAL_RCC_OscConfig+0x2b8>)
8004d14: 681b ldr r3, [r3, #0]
8004d16: 4a07 ldr r2, [pc, #28] ; (8004d34 <HAL_RCC_OscConfig+0x2b8>)
8004d18: f443 7380 orr.w r3, r3, #256 ; 0x100
8004d1c: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
8004d1e: f7fc fa9b bl 8001258 <HAL_GetTick>
8004d22: 6138 str r0, [r7, #16]
while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8004d24: e011 b.n 8004d4a <HAL_RCC_OscConfig+0x2ce>
8004d26: bf00 nop
8004d28: 40023800 .word 0x40023800
8004d2c: 42470000 .word 0x42470000
8004d30: 42470e80 .word 0x42470e80
8004d34: 40007000 .word 0x40007000
{
if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
8004d38: f7fc fa8e bl 8001258 <HAL_GetTick>
8004d3c: 4602 mov r2, r0
8004d3e: 693b ldr r3, [r7, #16]
8004d40: 1ad3 subs r3, r2, r3
8004d42: 2b02 cmp r3, #2
8004d44: d901 bls.n 8004d4a <HAL_RCC_OscConfig+0x2ce>
{
return HAL_TIMEOUT;
8004d46: 2303 movs r3, #3
8004d48: e0fd b.n 8004f46 <HAL_RCC_OscConfig+0x4ca>
while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8004d4a: 4b81 ldr r3, [pc, #516] ; (8004f50 <HAL_RCC_OscConfig+0x4d4>)
8004d4c: 681b ldr r3, [r3, #0]
8004d4e: f403 7380 and.w r3, r3, #256 ; 0x100
8004d52: 2b00 cmp r3, #0
8004d54: d0f0 beq.n 8004d38 <HAL_RCC_OscConfig+0x2bc>
}
}
}
/* Set the new LSE configuration -----------------------------------------*/
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
8004d56: 687b ldr r3, [r7, #4]
8004d58: 689b ldr r3, [r3, #8]
8004d5a: 2b01 cmp r3, #1
8004d5c: d106 bne.n 8004d6c <HAL_RCC_OscConfig+0x2f0>
8004d5e: 4b7d ldr r3, [pc, #500] ; (8004f54 <HAL_RCC_OscConfig+0x4d8>)
8004d60: 6f1b ldr r3, [r3, #112] ; 0x70
8004d62: 4a7c ldr r2, [pc, #496] ; (8004f54 <HAL_RCC_OscConfig+0x4d8>)
8004d64: f043 0301 orr.w r3, r3, #1
8004d68: 6713 str r3, [r2, #112] ; 0x70
8004d6a: e01c b.n 8004da6 <HAL_RCC_OscConfig+0x32a>
8004d6c: 687b ldr r3, [r7, #4]
8004d6e: 689b ldr r3, [r3, #8]
8004d70: 2b05 cmp r3, #5
8004d72: d10c bne.n 8004d8e <HAL_RCC_OscConfig+0x312>
8004d74: 4b77 ldr r3, [pc, #476] ; (8004f54 <HAL_RCC_OscConfig+0x4d8>)
8004d76: 6f1b ldr r3, [r3, #112] ; 0x70
8004d78: 4a76 ldr r2, [pc, #472] ; (8004f54 <HAL_RCC_OscConfig+0x4d8>)
8004d7a: f043 0304 orr.w r3, r3, #4
8004d7e: 6713 str r3, [r2, #112] ; 0x70
8004d80: 4b74 ldr r3, [pc, #464] ; (8004f54 <HAL_RCC_OscConfig+0x4d8>)
8004d82: 6f1b ldr r3, [r3, #112] ; 0x70
8004d84: 4a73 ldr r2, [pc, #460] ; (8004f54 <HAL_RCC_OscConfig+0x4d8>)
8004d86: f043 0301 orr.w r3, r3, #1
8004d8a: 6713 str r3, [r2, #112] ; 0x70
8004d8c: e00b b.n 8004da6 <HAL_RCC_OscConfig+0x32a>
8004d8e: 4b71 ldr r3, [pc, #452] ; (8004f54 <HAL_RCC_OscConfig+0x4d8>)
8004d90: 6f1b ldr r3, [r3, #112] ; 0x70
8004d92: 4a70 ldr r2, [pc, #448] ; (8004f54 <HAL_RCC_OscConfig+0x4d8>)
8004d94: f023 0301 bic.w r3, r3, #1
8004d98: 6713 str r3, [r2, #112] ; 0x70
8004d9a: 4b6e ldr r3, [pc, #440] ; (8004f54 <HAL_RCC_OscConfig+0x4d8>)
8004d9c: 6f1b ldr r3, [r3, #112] ; 0x70
8004d9e: 4a6d ldr r2, [pc, #436] ; (8004f54 <HAL_RCC_OscConfig+0x4d8>)
8004da0: f023 0304 bic.w r3, r3, #4
8004da4: 6713 str r3, [r2, #112] ; 0x70
/* Check the LSE State */
if((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF)
8004da6: 687b ldr r3, [r7, #4]
8004da8: 689b ldr r3, [r3, #8]
8004daa: 2b00 cmp r3, #0
8004dac: d015 beq.n 8004dda <HAL_RCC_OscConfig+0x35e>
{
/* Get Start Tick*/
tickstart = HAL_GetTick();
8004dae: f7fc fa53 bl 8001258 <HAL_GetTick>
8004db2: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8004db4: e00a b.n 8004dcc <HAL_RCC_OscConfig+0x350>
{
if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
8004db6: f7fc fa4f bl 8001258 <HAL_GetTick>
8004dba: 4602 mov r2, r0
8004dbc: 693b ldr r3, [r7, #16]
8004dbe: 1ad3 subs r3, r2, r3
8004dc0: f241 3288 movw r2, #5000 ; 0x1388
8004dc4: 4293 cmp r3, r2
8004dc6: d901 bls.n 8004dcc <HAL_RCC_OscConfig+0x350>
{
return HAL_TIMEOUT;
8004dc8: 2303 movs r3, #3
8004dca: e0bc b.n 8004f46 <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8004dcc: 4b61 ldr r3, [pc, #388] ; (8004f54 <HAL_RCC_OscConfig+0x4d8>)
8004dce: 6f1b ldr r3, [r3, #112] ; 0x70
8004dd0: f003 0302 and.w r3, r3, #2
8004dd4: 2b00 cmp r3, #0
8004dd6: d0ee beq.n 8004db6 <HAL_RCC_OscConfig+0x33a>
8004dd8: e014 b.n 8004e04 <HAL_RCC_OscConfig+0x388>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8004dda: f7fc fa3d bl 8001258 <HAL_GetTick>
8004dde: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
8004de0: e00a b.n 8004df8 <HAL_RCC_OscConfig+0x37c>
{
if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
8004de2: f7fc fa39 bl 8001258 <HAL_GetTick>
8004de6: 4602 mov r2, r0
8004de8: 693b ldr r3, [r7, #16]
8004dea: 1ad3 subs r3, r2, r3
8004dec: f241 3288 movw r2, #5000 ; 0x1388
8004df0: 4293 cmp r3, r2
8004df2: d901 bls.n 8004df8 <HAL_RCC_OscConfig+0x37c>
{
return HAL_TIMEOUT;
8004df4: 2303 movs r3, #3
8004df6: e0a6 b.n 8004f46 <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
8004df8: 4b56 ldr r3, [pc, #344] ; (8004f54 <HAL_RCC_OscConfig+0x4d8>)
8004dfa: 6f1b ldr r3, [r3, #112] ; 0x70
8004dfc: f003 0302 and.w r3, r3, #2
8004e00: 2b00 cmp r3, #0
8004e02: d1ee bne.n 8004de2 <HAL_RCC_OscConfig+0x366>
}
}
}
/* Restore clock configuration if changed */
if(pwrclkchanged == SET)
8004e04: 7dfb ldrb r3, [r7, #23]
8004e06: 2b01 cmp r3, #1
8004e08: d105 bne.n 8004e16 <HAL_RCC_OscConfig+0x39a>
{
__HAL_RCC_PWR_CLK_DISABLE();
8004e0a: 4b52 ldr r3, [pc, #328] ; (8004f54 <HAL_RCC_OscConfig+0x4d8>)
8004e0c: 6c1b ldr r3, [r3, #64] ; 0x40
8004e0e: 4a51 ldr r2, [pc, #324] ; (8004f54 <HAL_RCC_OscConfig+0x4d8>)
8004e10: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000
8004e14: 6413 str r3, [r2, #64] ; 0x40
}
}
/*-------------------------------- PLL Configuration -----------------------*/
/* Check the parameters */
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
8004e16: 687b ldr r3, [r7, #4]
8004e18: 699b ldr r3, [r3, #24]
8004e1a: 2b00 cmp r3, #0
8004e1c: f000 8092 beq.w 8004f44 <HAL_RCC_OscConfig+0x4c8>
{
/* Check if the PLL is used as system clock or not */
if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
8004e20: 4b4c ldr r3, [pc, #304] ; (8004f54 <HAL_RCC_OscConfig+0x4d8>)
8004e22: 689b ldr r3, [r3, #8]
8004e24: f003 030c and.w r3, r3, #12
8004e28: 2b08 cmp r3, #8
8004e2a: d05c beq.n 8004ee6 <HAL_RCC_OscConfig+0x46a>
{
if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
8004e2c: 687b ldr r3, [r7, #4]
8004e2e: 699b ldr r3, [r3, #24]
8004e30: 2b02 cmp r3, #2
8004e32: d141 bne.n 8004eb8 <HAL_RCC_OscConfig+0x43c>
assert_param(IS_RCC_PLLN_VALUE(RCC_OscInitStruct->PLL.PLLN));
assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP));
assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ));
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
8004e34: 4b48 ldr r3, [pc, #288] ; (8004f58 <HAL_RCC_OscConfig+0x4dc>)
8004e36: 2200 movs r2, #0
8004e38: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8004e3a: f7fc fa0d bl 8001258 <HAL_GetTick>
8004e3e: 6138 str r0, [r7, #16]
/* Wait till PLL is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8004e40: e008 b.n 8004e54 <HAL_RCC_OscConfig+0x3d8>
{
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
8004e42: f7fc fa09 bl 8001258 <HAL_GetTick>
8004e46: 4602 mov r2, r0
8004e48: 693b ldr r3, [r7, #16]
8004e4a: 1ad3 subs r3, r2, r3
8004e4c: 2b02 cmp r3, #2
8004e4e: d901 bls.n 8004e54 <HAL_RCC_OscConfig+0x3d8>
{
return HAL_TIMEOUT;
8004e50: 2303 movs r3, #3
8004e52: e078 b.n 8004f46 <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8004e54: 4b3f ldr r3, [pc, #252] ; (8004f54 <HAL_RCC_OscConfig+0x4d8>)
8004e56: 681b ldr r3, [r3, #0]
8004e58: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
8004e5c: 2b00 cmp r3, #0
8004e5e: d1f0 bne.n 8004e42 <HAL_RCC_OscConfig+0x3c6>
}
}
/* Configure the main PLL clock source, multiplication and division factors. */
WRITE_REG(RCC->PLLCFGR, (RCC_OscInitStruct->PLL.PLLSource | \
8004e60: 687b ldr r3, [r7, #4]
8004e62: 69da ldr r2, [r3, #28]
8004e64: 687b ldr r3, [r7, #4]
8004e66: 6a1b ldr r3, [r3, #32]
8004e68: 431a orrs r2, r3
8004e6a: 687b ldr r3, [r7, #4]
8004e6c: 6a5b ldr r3, [r3, #36] ; 0x24
8004e6e: 019b lsls r3, r3, #6
8004e70: 431a orrs r2, r3
8004e72: 687b ldr r3, [r7, #4]
8004e74: 6a9b ldr r3, [r3, #40] ; 0x28
8004e76: 085b lsrs r3, r3, #1
8004e78: 3b01 subs r3, #1
8004e7a: 041b lsls r3, r3, #16
8004e7c: 431a orrs r2, r3
8004e7e: 687b ldr r3, [r7, #4]
8004e80: 6adb ldr r3, [r3, #44] ; 0x2c
8004e82: 061b lsls r3, r3, #24
8004e84: 4933 ldr r1, [pc, #204] ; (8004f54 <HAL_RCC_OscConfig+0x4d8>)
8004e86: 4313 orrs r3, r2
8004e88: 604b str r3, [r1, #4]
RCC_OscInitStruct->PLL.PLLM | \
(RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos) | \
(((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U) << RCC_PLLCFGR_PLLP_Pos) | \
(RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)));
/* Enable the main PLL. */
__HAL_RCC_PLL_ENABLE();
8004e8a: 4b33 ldr r3, [pc, #204] ; (8004f58 <HAL_RCC_OscConfig+0x4dc>)
8004e8c: 2201 movs r2, #1
8004e8e: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8004e90: f7fc f9e2 bl 8001258 <HAL_GetTick>
8004e94: 6138 str r0, [r7, #16]
/* Wait till PLL is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8004e96: e008 b.n 8004eaa <HAL_RCC_OscConfig+0x42e>
{
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
8004e98: f7fc f9de bl 8001258 <HAL_GetTick>
8004e9c: 4602 mov r2, r0
8004e9e: 693b ldr r3, [r7, #16]
8004ea0: 1ad3 subs r3, r2, r3
8004ea2: 2b02 cmp r3, #2
8004ea4: d901 bls.n 8004eaa <HAL_RCC_OscConfig+0x42e>
{
return HAL_TIMEOUT;
8004ea6: 2303 movs r3, #3
8004ea8: e04d b.n 8004f46 <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8004eaa: 4b2a ldr r3, [pc, #168] ; (8004f54 <HAL_RCC_OscConfig+0x4d8>)
8004eac: 681b ldr r3, [r3, #0]
8004eae: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
8004eb2: 2b00 cmp r3, #0
8004eb4: d0f0 beq.n 8004e98 <HAL_RCC_OscConfig+0x41c>
8004eb6: e045 b.n 8004f44 <HAL_RCC_OscConfig+0x4c8>
}
}
else
{
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
8004eb8: 4b27 ldr r3, [pc, #156] ; (8004f58 <HAL_RCC_OscConfig+0x4dc>)
8004eba: 2200 movs r2, #0
8004ebc: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8004ebe: f7fc f9cb bl 8001258 <HAL_GetTick>
8004ec2: 6138 str r0, [r7, #16]
/* Wait till PLL is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8004ec4: e008 b.n 8004ed8 <HAL_RCC_OscConfig+0x45c>
{
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
8004ec6: f7fc f9c7 bl 8001258 <HAL_GetTick>
8004eca: 4602 mov r2, r0
8004ecc: 693b ldr r3, [r7, #16]
8004ece: 1ad3 subs r3, r2, r3
8004ed0: 2b02 cmp r3, #2
8004ed2: d901 bls.n 8004ed8 <HAL_RCC_OscConfig+0x45c>
{
return HAL_TIMEOUT;
8004ed4: 2303 movs r3, #3
8004ed6: e036 b.n 8004f46 <HAL_RCC_OscConfig+0x4ca>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8004ed8: 4b1e ldr r3, [pc, #120] ; (8004f54 <HAL_RCC_OscConfig+0x4d8>)
8004eda: 681b ldr r3, [r3, #0]
8004edc: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
8004ee0: 2b00 cmp r3, #0
8004ee2: d1f0 bne.n 8004ec6 <HAL_RCC_OscConfig+0x44a>
8004ee4: e02e b.n 8004f44 <HAL_RCC_OscConfig+0x4c8>
}
}
else
{
/* Check if there is a request to disable the PLL used as System clock source */
if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
8004ee6: 687b ldr r3, [r7, #4]
8004ee8: 699b ldr r3, [r3, #24]
8004eea: 2b01 cmp r3, #1
8004eec: d101 bne.n 8004ef2 <HAL_RCC_OscConfig+0x476>
{
return HAL_ERROR;
8004eee: 2301 movs r3, #1
8004ef0: e029 b.n 8004f46 <HAL_RCC_OscConfig+0x4ca>
}
else
{
/* Do not return HAL_ERROR if request repeats the current configuration */
pll_config = RCC->PLLCFGR;
8004ef2: 4b18 ldr r3, [pc, #96] ; (8004f54 <HAL_RCC_OscConfig+0x4d8>)
8004ef4: 685b ldr r3, [r3, #4]
8004ef6: 60fb str r3, [r7, #12]
if((READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
8004ef8: 68fb ldr r3, [r7, #12]
8004efa: f403 0280 and.w r2, r3, #4194304 ; 0x400000
8004efe: 687b ldr r3, [r7, #4]
8004f00: 69db ldr r3, [r3, #28]
8004f02: 429a cmp r2, r3
8004f04: d11c bne.n 8004f40 <HAL_RCC_OscConfig+0x4c4>
(READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != RCC_OscInitStruct->PLL.PLLM) ||
8004f06: 68fb ldr r3, [r7, #12]
8004f08: f003 023f and.w r2, r3, #63 ; 0x3f
8004f0c: 687b ldr r3, [r7, #4]
8004f0e: 6a1b ldr r3, [r3, #32]
if((READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
8004f10: 429a cmp r2, r3
8004f12: d115 bne.n 8004f40 <HAL_RCC_OscConfig+0x4c4>
(READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != RCC_OscInitStruct->PLL.PLLN) ||
8004f14: 68fa ldr r2, [r7, #12]
8004f16: f647 73c0 movw r3, #32704 ; 0x7fc0
8004f1a: 4013 ands r3, r2
8004f1c: 687a ldr r2, [r7, #4]
8004f1e: 6a52 ldr r2, [r2, #36] ; 0x24
(READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != RCC_OscInitStruct->PLL.PLLM) ||
8004f20: 4293 cmp r3, r2
8004f22: d10d bne.n 8004f40 <HAL_RCC_OscConfig+0x4c4>
(READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != RCC_OscInitStruct->PLL.PLLP) ||
8004f24: 68fb ldr r3, [r7, #12]
8004f26: f403 3240 and.w r2, r3, #196608 ; 0x30000
8004f2a: 687b ldr r3, [r7, #4]
8004f2c: 6a9b ldr r3, [r3, #40] ; 0x28
(READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != RCC_OscInitStruct->PLL.PLLN) ||
8004f2e: 429a cmp r2, r3
8004f30: d106 bne.n 8004f40 <HAL_RCC_OscConfig+0x4c4>
(READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != RCC_OscInitStruct->PLL.PLLQ))
8004f32: 68fb ldr r3, [r7, #12]
8004f34: f003 6270 and.w r2, r3, #251658240 ; 0xf000000
8004f38: 687b ldr r3, [r7, #4]
8004f3a: 6adb ldr r3, [r3, #44] ; 0x2c
(READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != RCC_OscInitStruct->PLL.PLLP) ||
8004f3c: 429a cmp r2, r3
8004f3e: d001 beq.n 8004f44 <HAL_RCC_OscConfig+0x4c8>
{
return HAL_ERROR;
8004f40: 2301 movs r3, #1
8004f42: e000 b.n 8004f46 <HAL_RCC_OscConfig+0x4ca>
}
}
}
}
return HAL_OK;
8004f44: 2300 movs r3, #0
}
8004f46: 4618 mov r0, r3
8004f48: 3718 adds r7, #24
8004f4a: 46bd mov sp, r7
8004f4c: bd80 pop {r7, pc}
8004f4e: bf00 nop
8004f50: 40007000 .word 0x40007000
8004f54: 40023800 .word 0x40023800
8004f58: 42470060 .word 0x42470060
08004f5c <HAL_RCC_ClockConfig>:
* HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency
* (for more details refer to section above "Initialization/de-initialization functions")
* @retval None
*/
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
{
8004f5c: b580 push {r7, lr}
8004f5e: b084 sub sp, #16
8004f60: af00 add r7, sp, #0
8004f62: 6078 str r0, [r7, #4]
8004f64: 6039 str r1, [r7, #0]
uint32_t tickstart;
/* Check Null pointer */
if(RCC_ClkInitStruct == NULL)
8004f66: 687b ldr r3, [r7, #4]
8004f68: 2b00 cmp r3, #0
8004f6a: d101 bne.n 8004f70 <HAL_RCC_ClockConfig+0x14>
{
return HAL_ERROR;
8004f6c: 2301 movs r3, #1
8004f6e: e0cc b.n 800510a <HAL_RCC_ClockConfig+0x1ae>
/* To correctly read data from FLASH memory, the number of wait states (LATENCY)
must be correctly programmed according to the frequency of the CPU clock
(HCLK) and the supply voltage of the device. */
/* Increasing the number of wait states because of higher CPU frequency */
if(FLatency > __HAL_FLASH_GET_LATENCY())
8004f70: 4b68 ldr r3, [pc, #416] ; (8005114 <HAL_RCC_ClockConfig+0x1b8>)
8004f72: 681b ldr r3, [r3, #0]
8004f74: f003 030f and.w r3, r3, #15
8004f78: 683a ldr r2, [r7, #0]
8004f7a: 429a cmp r2, r3
8004f7c: d90c bls.n 8004f98 <HAL_RCC_ClockConfig+0x3c>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
8004f7e: 4b65 ldr r3, [pc, #404] ; (8005114 <HAL_RCC_ClockConfig+0x1b8>)
8004f80: 683a ldr r2, [r7, #0]
8004f82: b2d2 uxtb r2, r2
8004f84: 701a strb r2, [r3, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if(__HAL_FLASH_GET_LATENCY() != FLatency)
8004f86: 4b63 ldr r3, [pc, #396] ; (8005114 <HAL_RCC_ClockConfig+0x1b8>)
8004f88: 681b ldr r3, [r3, #0]
8004f8a: f003 030f and.w r3, r3, #15
8004f8e: 683a ldr r2, [r7, #0]
8004f90: 429a cmp r2, r3
8004f92: d001 beq.n 8004f98 <HAL_RCC_ClockConfig+0x3c>
{
return HAL_ERROR;
8004f94: 2301 movs r3, #1
8004f96: e0b8 b.n 800510a <HAL_RCC_ClockConfig+0x1ae>
}
}
/*-------------------------- HCLK Configuration --------------------------*/
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
8004f98: 687b ldr r3, [r7, #4]
8004f9a: 681b ldr r3, [r3, #0]
8004f9c: f003 0302 and.w r3, r3, #2
8004fa0: 2b00 cmp r3, #0
8004fa2: d020 beq.n 8004fe6 <HAL_RCC_ClockConfig+0x8a>
{
/* Set the highest APBx dividers in order to ensure that we do not go through
a non-spec phase whatever we decrease or increase HCLK. */
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
8004fa4: 687b ldr r3, [r7, #4]
8004fa6: 681b ldr r3, [r3, #0]
8004fa8: f003 0304 and.w r3, r3, #4
8004fac: 2b00 cmp r3, #0
8004fae: d005 beq.n 8004fbc <HAL_RCC_ClockConfig+0x60>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
8004fb0: 4b59 ldr r3, [pc, #356] ; (8005118 <HAL_RCC_ClockConfig+0x1bc>)
8004fb2: 689b ldr r3, [r3, #8]
8004fb4: 4a58 ldr r2, [pc, #352] ; (8005118 <HAL_RCC_ClockConfig+0x1bc>)
8004fb6: f443 53e0 orr.w r3, r3, #7168 ; 0x1c00
8004fba: 6093 str r3, [r2, #8]
}
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
8004fbc: 687b ldr r3, [r7, #4]
8004fbe: 681b ldr r3, [r3, #0]
8004fc0: f003 0308 and.w r3, r3, #8
8004fc4: 2b00 cmp r3, #0
8004fc6: d005 beq.n 8004fd4 <HAL_RCC_ClockConfig+0x78>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
8004fc8: 4b53 ldr r3, [pc, #332] ; (8005118 <HAL_RCC_ClockConfig+0x1bc>)
8004fca: 689b ldr r3, [r3, #8]
8004fcc: 4a52 ldr r2, [pc, #328] ; (8005118 <HAL_RCC_ClockConfig+0x1bc>)
8004fce: f443 4360 orr.w r3, r3, #57344 ; 0xe000
8004fd2: 6093 str r3, [r2, #8]
}
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
8004fd4: 4b50 ldr r3, [pc, #320] ; (8005118 <HAL_RCC_ClockConfig+0x1bc>)
8004fd6: 689b ldr r3, [r3, #8]
8004fd8: f023 02f0 bic.w r2, r3, #240 ; 0xf0
8004fdc: 687b ldr r3, [r7, #4]
8004fde: 689b ldr r3, [r3, #8]
8004fe0: 494d ldr r1, [pc, #308] ; (8005118 <HAL_RCC_ClockConfig+0x1bc>)
8004fe2: 4313 orrs r3, r2
8004fe4: 608b str r3, [r1, #8]
}
/*------------------------- SYSCLK Configuration ---------------------------*/
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
8004fe6: 687b ldr r3, [r7, #4]
8004fe8: 681b ldr r3, [r3, #0]
8004fea: f003 0301 and.w r3, r3, #1
8004fee: 2b00 cmp r3, #0
8004ff0: d044 beq.n 800507c <HAL_RCC_ClockConfig+0x120>
{
assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
/* HSE is selected as System Clock Source */
if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
8004ff2: 687b ldr r3, [r7, #4]
8004ff4: 685b ldr r3, [r3, #4]
8004ff6: 2b01 cmp r3, #1
8004ff8: d107 bne.n 800500a <HAL_RCC_ClockConfig+0xae>
{
/* Check the HSE ready flag */
if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8004ffa: 4b47 ldr r3, [pc, #284] ; (8005118 <HAL_RCC_ClockConfig+0x1bc>)
8004ffc: 681b ldr r3, [r3, #0]
8004ffe: f403 3300 and.w r3, r3, #131072 ; 0x20000
8005002: 2b00 cmp r3, #0
8005004: d119 bne.n 800503a <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
8005006: 2301 movs r3, #1
8005008: e07f b.n 800510a <HAL_RCC_ClockConfig+0x1ae>
}
}
/* PLL is selected as System Clock Source */
else if((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) ||
800500a: 687b ldr r3, [r7, #4]
800500c: 685b ldr r3, [r3, #4]
800500e: 2b02 cmp r3, #2
8005010: d003 beq.n 800501a <HAL_RCC_ClockConfig+0xbe>
(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK))
8005012: 687b ldr r3, [r7, #4]
8005014: 685b ldr r3, [r3, #4]
else if((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) ||
8005016: 2b03 cmp r3, #3
8005018: d107 bne.n 800502a <HAL_RCC_ClockConfig+0xce>
{
/* Check the PLL ready flag */
if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
800501a: 4b3f ldr r3, [pc, #252] ; (8005118 <HAL_RCC_ClockConfig+0x1bc>)
800501c: 681b ldr r3, [r3, #0]
800501e: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
8005022: 2b00 cmp r3, #0
8005024: d109 bne.n 800503a <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
8005026: 2301 movs r3, #1
8005028: e06f b.n 800510a <HAL_RCC_ClockConfig+0x1ae>
}
/* HSI is selected as System Clock Source */
else
{
/* Check the HSI ready flag */
if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
800502a: 4b3b ldr r3, [pc, #236] ; (8005118 <HAL_RCC_ClockConfig+0x1bc>)
800502c: 681b ldr r3, [r3, #0]
800502e: f003 0302 and.w r3, r3, #2
8005032: 2b00 cmp r3, #0
8005034: d101 bne.n 800503a <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
8005036: 2301 movs r3, #1
8005038: e067 b.n 800510a <HAL_RCC_ClockConfig+0x1ae>
}
}
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
800503a: 4b37 ldr r3, [pc, #220] ; (8005118 <HAL_RCC_ClockConfig+0x1bc>)
800503c: 689b ldr r3, [r3, #8]
800503e: f023 0203 bic.w r2, r3, #3
8005042: 687b ldr r3, [r7, #4]
8005044: 685b ldr r3, [r3, #4]
8005046: 4934 ldr r1, [pc, #208] ; (8005118 <HAL_RCC_ClockConfig+0x1bc>)
8005048: 4313 orrs r3, r2
800504a: 608b str r3, [r1, #8]
/* Get Start Tick */
tickstart = HAL_GetTick();
800504c: f7fc f904 bl 8001258 <HAL_GetTick>
8005050: 60f8 str r0, [r7, #12]
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
8005052: e00a b.n 800506a <HAL_RCC_ClockConfig+0x10e>
{
if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
8005054: f7fc f900 bl 8001258 <HAL_GetTick>
8005058: 4602 mov r2, r0
800505a: 68fb ldr r3, [r7, #12]
800505c: 1ad3 subs r3, r2, r3
800505e: f241 3288 movw r2, #5000 ; 0x1388
8005062: 4293 cmp r3, r2
8005064: d901 bls.n 800506a <HAL_RCC_ClockConfig+0x10e>
{
return HAL_TIMEOUT;
8005066: 2303 movs r3, #3
8005068: e04f b.n 800510a <HAL_RCC_ClockConfig+0x1ae>
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
800506a: 4b2b ldr r3, [pc, #172] ; (8005118 <HAL_RCC_ClockConfig+0x1bc>)
800506c: 689b ldr r3, [r3, #8]
800506e: f003 020c and.w r2, r3, #12
8005072: 687b ldr r3, [r7, #4]
8005074: 685b ldr r3, [r3, #4]
8005076: 009b lsls r3, r3, #2
8005078: 429a cmp r2, r3
800507a: d1eb bne.n 8005054 <HAL_RCC_ClockConfig+0xf8>
}
}
}
/* Decreasing the number of wait states because of lower CPU frequency */
if(FLatency < __HAL_FLASH_GET_LATENCY())
800507c: 4b25 ldr r3, [pc, #148] ; (8005114 <HAL_RCC_ClockConfig+0x1b8>)
800507e: 681b ldr r3, [r3, #0]
8005080: f003 030f and.w r3, r3, #15
8005084: 683a ldr r2, [r7, #0]
8005086: 429a cmp r2, r3
8005088: d20c bcs.n 80050a4 <HAL_RCC_ClockConfig+0x148>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
800508a: 4b22 ldr r3, [pc, #136] ; (8005114 <HAL_RCC_ClockConfig+0x1b8>)
800508c: 683a ldr r2, [r7, #0]
800508e: b2d2 uxtb r2, r2
8005090: 701a strb r2, [r3, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if(__HAL_FLASH_GET_LATENCY() != FLatency)
8005092: 4b20 ldr r3, [pc, #128] ; (8005114 <HAL_RCC_ClockConfig+0x1b8>)
8005094: 681b ldr r3, [r3, #0]
8005096: f003 030f and.w r3, r3, #15
800509a: 683a ldr r2, [r7, #0]
800509c: 429a cmp r2, r3
800509e: d001 beq.n 80050a4 <HAL_RCC_ClockConfig+0x148>
{
return HAL_ERROR;
80050a0: 2301 movs r3, #1
80050a2: e032 b.n 800510a <HAL_RCC_ClockConfig+0x1ae>
}
}
/*-------------------------- PCLK1 Configuration ---------------------------*/
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
80050a4: 687b ldr r3, [r7, #4]
80050a6: 681b ldr r3, [r3, #0]
80050a8: f003 0304 and.w r3, r3, #4
80050ac: 2b00 cmp r3, #0
80050ae: d008 beq.n 80050c2 <HAL_RCC_ClockConfig+0x166>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
80050b0: 4b19 ldr r3, [pc, #100] ; (8005118 <HAL_RCC_ClockConfig+0x1bc>)
80050b2: 689b ldr r3, [r3, #8]
80050b4: f423 52e0 bic.w r2, r3, #7168 ; 0x1c00
80050b8: 687b ldr r3, [r7, #4]
80050ba: 68db ldr r3, [r3, #12]
80050bc: 4916 ldr r1, [pc, #88] ; (8005118 <HAL_RCC_ClockConfig+0x1bc>)
80050be: 4313 orrs r3, r2
80050c0: 608b str r3, [r1, #8]
}
/*-------------------------- PCLK2 Configuration ---------------------------*/
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
80050c2: 687b ldr r3, [r7, #4]
80050c4: 681b ldr r3, [r3, #0]
80050c6: f003 0308 and.w r3, r3, #8
80050ca: 2b00 cmp r3, #0
80050cc: d009 beq.n 80050e2 <HAL_RCC_ClockConfig+0x186>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U));
80050ce: 4b12 ldr r3, [pc, #72] ; (8005118 <HAL_RCC_ClockConfig+0x1bc>)
80050d0: 689b ldr r3, [r3, #8]
80050d2: f423 4260 bic.w r2, r3, #57344 ; 0xe000
80050d6: 687b ldr r3, [r7, #4]
80050d8: 691b ldr r3, [r3, #16]
80050da: 00db lsls r3, r3, #3
80050dc: 490e ldr r1, [pc, #56] ; (8005118 <HAL_RCC_ClockConfig+0x1bc>)
80050de: 4313 orrs r3, r2
80050e0: 608b str r3, [r1, #8]
}
/* Update the SystemCoreClock global variable */
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos];
80050e2: f000 f821 bl 8005128 <HAL_RCC_GetSysClockFreq>
80050e6: 4601 mov r1, r0
80050e8: 4b0b ldr r3, [pc, #44] ; (8005118 <HAL_RCC_ClockConfig+0x1bc>)
80050ea: 689b ldr r3, [r3, #8]
80050ec: 091b lsrs r3, r3, #4
80050ee: f003 030f and.w r3, r3, #15
80050f2: 4a0a ldr r2, [pc, #40] ; (800511c <HAL_RCC_ClockConfig+0x1c0>)
80050f4: 5cd3 ldrb r3, [r2, r3]
80050f6: fa21 f303 lsr.w r3, r1, r3
80050fa: 4a09 ldr r2, [pc, #36] ; (8005120 <HAL_RCC_ClockConfig+0x1c4>)
80050fc: 6013 str r3, [r2, #0]
/* Configure the source of time base considering new system clocks settings */
HAL_InitTick (uwTickPrio);
80050fe: 4b09 ldr r3, [pc, #36] ; (8005124 <HAL_RCC_ClockConfig+0x1c8>)
8005100: 681b ldr r3, [r3, #0]
8005102: 4618 mov r0, r3
8005104: f7fc f864 bl 80011d0 <HAL_InitTick>
return HAL_OK;
8005108: 2300 movs r3, #0
}
800510a: 4618 mov r0, r3
800510c: 3710 adds r7, #16
800510e: 46bd mov sp, r7
8005110: bd80 pop {r7, pc}
8005112: bf00 nop
8005114: 40023c00 .word 0x40023c00
8005118: 40023800 .word 0x40023800
800511c: 0800a200 .word 0x0800a200
8005120: 20000014 .word 0x20000014
8005124: 20000018 .word 0x20000018
08005128 <HAL_RCC_GetSysClockFreq>:
*
*
* @retval SYSCLK frequency
*/
__weak uint32_t HAL_RCC_GetSysClockFreq(void)
{
8005128: b5f0 push {r4, r5, r6, r7, lr}
800512a: b085 sub sp, #20
800512c: af00 add r7, sp, #0
uint32_t pllm = 0U, pllvco = 0U, pllp = 0U;
800512e: 2300 movs r3, #0
8005130: 607b str r3, [r7, #4]
8005132: 2300 movs r3, #0
8005134: 60fb str r3, [r7, #12]
8005136: 2300 movs r3, #0
8005138: 603b str r3, [r7, #0]
uint32_t sysclockfreq = 0U;
800513a: 2300 movs r3, #0
800513c: 60bb str r3, [r7, #8]
/* Get SYSCLK source -------------------------------------------------------*/
switch (RCC->CFGR & RCC_CFGR_SWS)
800513e: 4b63 ldr r3, [pc, #396] ; (80052cc <HAL_RCC_GetSysClockFreq+0x1a4>)
8005140: 689b ldr r3, [r3, #8]
8005142: f003 030c and.w r3, r3, #12
8005146: 2b04 cmp r3, #4
8005148: d007 beq.n 800515a <HAL_RCC_GetSysClockFreq+0x32>
800514a: 2b08 cmp r3, #8
800514c: d008 beq.n 8005160 <HAL_RCC_GetSysClockFreq+0x38>
800514e: 2b00 cmp r3, #0
8005150: f040 80b4 bne.w 80052bc <HAL_RCC_GetSysClockFreq+0x194>
{
case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */
{
sysclockfreq = HSI_VALUE;
8005154: 4b5e ldr r3, [pc, #376] ; (80052d0 <HAL_RCC_GetSysClockFreq+0x1a8>)
8005156: 60bb str r3, [r7, #8]
break;
8005158: e0b3 b.n 80052c2 <HAL_RCC_GetSysClockFreq+0x19a>
}
case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */
{
sysclockfreq = HSE_VALUE;
800515a: 4b5e ldr r3, [pc, #376] ; (80052d4 <HAL_RCC_GetSysClockFreq+0x1ac>)
800515c: 60bb str r3, [r7, #8]
break;
800515e: e0b0 b.n 80052c2 <HAL_RCC_GetSysClockFreq+0x19a>
}
case RCC_CFGR_SWS_PLL: /* PLL used as system clock source */
{
/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
SYSCLK = PLL_VCO / PLLP */
pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
8005160: 4b5a ldr r3, [pc, #360] ; (80052cc <HAL_RCC_GetSysClockFreq+0x1a4>)
8005162: 685b ldr r3, [r3, #4]
8005164: f003 033f and.w r3, r3, #63 ; 0x3f
8005168: 607b str r3, [r7, #4]
if(__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI)
800516a: 4b58 ldr r3, [pc, #352] ; (80052cc <HAL_RCC_GetSysClockFreq+0x1a4>)
800516c: 685b ldr r3, [r3, #4]
800516e: f403 0380 and.w r3, r3, #4194304 ; 0x400000
8005172: 2b00 cmp r3, #0
8005174: d04a beq.n 800520c <HAL_RCC_GetSysClockFreq+0xe4>
{
/* HSE used as PLL clock source */
pllvco = (uint32_t) ((((uint64_t) HSE_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
8005176: 4b55 ldr r3, [pc, #340] ; (80052cc <HAL_RCC_GetSysClockFreq+0x1a4>)
8005178: 685b ldr r3, [r3, #4]
800517a: 099b lsrs r3, r3, #6
800517c: f04f 0400 mov.w r4, #0
8005180: f240 11ff movw r1, #511 ; 0x1ff
8005184: f04f 0200 mov.w r2, #0
8005188: ea03 0501 and.w r5, r3, r1
800518c: ea04 0602 and.w r6, r4, r2
8005190: 4629 mov r1, r5
8005192: 4632 mov r2, r6
8005194: f04f 0300 mov.w r3, #0
8005198: f04f 0400 mov.w r4, #0
800519c: 0154 lsls r4, r2, #5
800519e: ea44 64d1 orr.w r4, r4, r1, lsr #27
80051a2: 014b lsls r3, r1, #5
80051a4: 4619 mov r1, r3
80051a6: 4622 mov r2, r4
80051a8: 1b49 subs r1, r1, r5
80051aa: eb62 0206 sbc.w r2, r2, r6
80051ae: f04f 0300 mov.w r3, #0
80051b2: f04f 0400 mov.w r4, #0
80051b6: 0194 lsls r4, r2, #6
80051b8: ea44 6491 orr.w r4, r4, r1, lsr #26
80051bc: 018b lsls r3, r1, #6
80051be: 1a5b subs r3, r3, r1
80051c0: eb64 0402 sbc.w r4, r4, r2
80051c4: f04f 0100 mov.w r1, #0
80051c8: f04f 0200 mov.w r2, #0
80051cc: 00e2 lsls r2, r4, #3
80051ce: ea42 7253 orr.w r2, r2, r3, lsr #29
80051d2: 00d9 lsls r1, r3, #3
80051d4: 460b mov r3, r1
80051d6: 4614 mov r4, r2
80051d8: 195b adds r3, r3, r5
80051da: eb44 0406 adc.w r4, r4, r6
80051de: f04f 0100 mov.w r1, #0
80051e2: f04f 0200 mov.w r2, #0
80051e6: 0262 lsls r2, r4, #9
80051e8: ea42 52d3 orr.w r2, r2, r3, lsr #23
80051ec: 0259 lsls r1, r3, #9
80051ee: 460b mov r3, r1
80051f0: 4614 mov r4, r2
80051f2: 4618 mov r0, r3
80051f4: 4621 mov r1, r4
80051f6: 687b ldr r3, [r7, #4]
80051f8: f04f 0400 mov.w r4, #0
80051fc: 461a mov r2, r3
80051fe: 4623 mov r3, r4
8005200: f7fb f83e bl 8000280 <__aeabi_uldivmod>
8005204: 4603 mov r3, r0
8005206: 460c mov r4, r1
8005208: 60fb str r3, [r7, #12]
800520a: e049 b.n 80052a0 <HAL_RCC_GetSysClockFreq+0x178>
}
else
{
/* HSI used as PLL clock source */
pllvco = (uint32_t) ((((uint64_t) HSI_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
800520c: 4b2f ldr r3, [pc, #188] ; (80052cc <HAL_RCC_GetSysClockFreq+0x1a4>)
800520e: 685b ldr r3, [r3, #4]
8005210: 099b lsrs r3, r3, #6
8005212: f04f 0400 mov.w r4, #0
8005216: f240 11ff movw r1, #511 ; 0x1ff
800521a: f04f 0200 mov.w r2, #0
800521e: ea03 0501 and.w r5, r3, r1
8005222: ea04 0602 and.w r6, r4, r2
8005226: 4629 mov r1, r5
8005228: 4632 mov r2, r6
800522a: f04f 0300 mov.w r3, #0
800522e: f04f 0400 mov.w r4, #0
8005232: 0154 lsls r4, r2, #5
8005234: ea44 64d1 orr.w r4, r4, r1, lsr #27
8005238: 014b lsls r3, r1, #5
800523a: 4619 mov r1, r3
800523c: 4622 mov r2, r4
800523e: 1b49 subs r1, r1, r5
8005240: eb62 0206 sbc.w r2, r2, r6
8005244: f04f 0300 mov.w r3, #0
8005248: f04f 0400 mov.w r4, #0
800524c: 0194 lsls r4, r2, #6
800524e: ea44 6491 orr.w r4, r4, r1, lsr #26
8005252: 018b lsls r3, r1, #6
8005254: 1a5b subs r3, r3, r1
8005256: eb64 0402 sbc.w r4, r4, r2
800525a: f04f 0100 mov.w r1, #0
800525e: f04f 0200 mov.w r2, #0
8005262: 00e2 lsls r2, r4, #3
8005264: ea42 7253 orr.w r2, r2, r3, lsr #29
8005268: 00d9 lsls r1, r3, #3
800526a: 460b mov r3, r1
800526c: 4614 mov r4, r2
800526e: 195b adds r3, r3, r5
8005270: eb44 0406 adc.w r4, r4, r6
8005274: f04f 0100 mov.w r1, #0
8005278: f04f 0200 mov.w r2, #0
800527c: 02a2 lsls r2, r4, #10
800527e: ea42 5293 orr.w r2, r2, r3, lsr #22
8005282: 0299 lsls r1, r3, #10
8005284: 460b mov r3, r1
8005286: 4614 mov r4, r2
8005288: 4618 mov r0, r3
800528a: 4621 mov r1, r4
800528c: 687b ldr r3, [r7, #4]
800528e: f04f 0400 mov.w r4, #0
8005292: 461a mov r2, r3
8005294: 4623 mov r3, r4
8005296: f7fa fff3 bl 8000280 <__aeabi_uldivmod>
800529a: 4603 mov r3, r0
800529c: 460c mov r4, r1
800529e: 60fb str r3, [r7, #12]
}
pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1U) *2U);
80052a0: 4b0a ldr r3, [pc, #40] ; (80052cc <HAL_RCC_GetSysClockFreq+0x1a4>)
80052a2: 685b ldr r3, [r3, #4]
80052a4: 0c1b lsrs r3, r3, #16
80052a6: f003 0303 and.w r3, r3, #3
80052aa: 3301 adds r3, #1
80052ac: 005b lsls r3, r3, #1
80052ae: 603b str r3, [r7, #0]
sysclockfreq = pllvco/pllp;
80052b0: 68fa ldr r2, [r7, #12]
80052b2: 683b ldr r3, [r7, #0]
80052b4: fbb2 f3f3 udiv r3, r2, r3
80052b8: 60bb str r3, [r7, #8]
break;
80052ba: e002 b.n 80052c2 <HAL_RCC_GetSysClockFreq+0x19a>
}
default:
{
sysclockfreq = HSI_VALUE;
80052bc: 4b04 ldr r3, [pc, #16] ; (80052d0 <HAL_RCC_GetSysClockFreq+0x1a8>)
80052be: 60bb str r3, [r7, #8]
break;
80052c0: bf00 nop
}
}
return sysclockfreq;
80052c2: 68bb ldr r3, [r7, #8]
}
80052c4: 4618 mov r0, r3
80052c6: 3714 adds r7, #20
80052c8: 46bd mov sp, r7
80052ca: bdf0 pop {r4, r5, r6, r7, pc}
80052cc: 40023800 .word 0x40023800
80052d0: 00f42400 .word 0x00f42400
80052d4: 007a1200 .word 0x007a1200
080052d8 <HAL_RCC_GetHCLKFreq>:
* @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
* and updated within this function
* @retval HCLK frequency
*/
uint32_t HAL_RCC_GetHCLKFreq(void)
{
80052d8: b480 push {r7}
80052da: af00 add r7, sp, #0
return SystemCoreClock;
80052dc: 4b03 ldr r3, [pc, #12] ; (80052ec <HAL_RCC_GetHCLKFreq+0x14>)
80052de: 681b ldr r3, [r3, #0]
}
80052e0: 4618 mov r0, r3
80052e2: 46bd mov sp, r7
80052e4: f85d 7b04 ldr.w r7, [sp], #4
80052e8: 4770 bx lr
80052ea: bf00 nop
80052ec: 20000014 .word 0x20000014
080052f0 <HAL_RCC_GetPCLK1Freq>:
* @note Each time PCLK1 changes, this function must be called to update the
* right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
* @retval PCLK1 frequency
*/
uint32_t HAL_RCC_GetPCLK1Freq(void)
{
80052f0: b580 push {r7, lr}
80052f2: af00 add r7, sp, #0
/* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1)>> RCC_CFGR_PPRE1_Pos]);
80052f4: f7ff fff0 bl 80052d8 <HAL_RCC_GetHCLKFreq>
80052f8: 4601 mov r1, r0
80052fa: 4b05 ldr r3, [pc, #20] ; (8005310 <HAL_RCC_GetPCLK1Freq+0x20>)
80052fc: 689b ldr r3, [r3, #8]
80052fe: 0a9b lsrs r3, r3, #10
8005300: f003 0307 and.w r3, r3, #7
8005304: 4a03 ldr r2, [pc, #12] ; (8005314 <HAL_RCC_GetPCLK1Freq+0x24>)
8005306: 5cd3 ldrb r3, [r2, r3]
8005308: fa21 f303 lsr.w r3, r1, r3
}
800530c: 4618 mov r0, r3
800530e: bd80 pop {r7, pc}
8005310: 40023800 .word 0x40023800
8005314: 0800a210 .word 0x0800a210
08005318 <HAL_RCC_GetPCLK2Freq>:
* @note Each time PCLK2 changes, this function must be called to update the
* right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
* @retval PCLK2 frequency
*/
uint32_t HAL_RCC_GetPCLK2Freq(void)
{
8005318: b580 push {r7, lr}
800531a: af00 add r7, sp, #0
/* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2)>> RCC_CFGR_PPRE2_Pos]);
800531c: f7ff ffdc bl 80052d8 <HAL_RCC_GetHCLKFreq>
8005320: 4601 mov r1, r0
8005322: 4b05 ldr r3, [pc, #20] ; (8005338 <HAL_RCC_GetPCLK2Freq+0x20>)
8005324: 689b ldr r3, [r3, #8]
8005326: 0b5b lsrs r3, r3, #13
8005328: f003 0307 and.w r3, r3, #7
800532c: 4a03 ldr r2, [pc, #12] ; (800533c <HAL_RCC_GetPCLK2Freq+0x24>)
800532e: 5cd3 ldrb r3, [r2, r3]
8005330: fa21 f303 lsr.w r3, r1, r3
}
8005334: 4618 mov r0, r3
8005336: bd80 pop {r7, pc}
8005338: 40023800 .word 0x40023800
800533c: 0800a210 .word 0x0800a210
08005340 <HAL_RCCEx_PeriphCLKConfig>:
* domain (RTC and RCC_BDCR register expect BKPSRAM) will be reset
*
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
{
8005340: b580 push {r7, lr}
8005342: b086 sub sp, #24
8005344: af00 add r7, sp, #0
8005346: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U;
8005348: 2300 movs r3, #0
800534a: 617b str r3, [r7, #20]
uint32_t tmpreg1 = 0U;
800534c: 2300 movs r3, #0
800534e: 613b str r3, [r7, #16]
/* Check the parameters */
assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
/*---------------------------- I2S configuration ---------------------------*/
if((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == RCC_PERIPHCLK_I2S) ||
8005350: 687b ldr r3, [r7, #4]
8005352: 681b ldr r3, [r3, #0]
8005354: f003 0301 and.w r3, r3, #1
8005358: 2b00 cmp r3, #0
800535a: d105 bne.n 8005368 <HAL_RCCEx_PeriphCLKConfig+0x28>
(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLLI2S) == RCC_PERIPHCLK_PLLI2S))
800535c: 687b ldr r3, [r7, #4]
800535e: 681b ldr r3, [r3, #0]
8005360: f003 0304 and.w r3, r3, #4
if((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == RCC_PERIPHCLK_I2S) ||
8005364: 2b00 cmp r3, #0
8005366: d035 beq.n 80053d4 <HAL_RCCEx_PeriphCLKConfig+0x94>
assert_param(IS_RCC_PLLI2SN_VALUE(PeriphClkInit->PLLI2S.PLLI2SN));
#if defined(STM32F411xE)
assert_param(IS_RCC_PLLI2SM_VALUE(PeriphClkInit->PLLI2S.PLLI2SM));
#endif /* STM32F411xE */
/* Disable the PLLI2S */
__HAL_RCC_PLLI2S_DISABLE();
8005368: 4b67 ldr r3, [pc, #412] ; (8005508 <HAL_RCCEx_PeriphCLKConfig+0x1c8>)
800536a: 2200 movs r2, #0
800536c: 601a str r2, [r3, #0]
/* Get tick */
tickstart = HAL_GetTick();
800536e: f7fb ff73 bl 8001258 <HAL_GetTick>
8005372: 6178 str r0, [r7, #20]
/* Wait till PLLI2S is disabled */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) != RESET)
8005374: e008 b.n 8005388 <HAL_RCCEx_PeriphCLKConfig+0x48>
{
if((HAL_GetTick() - tickstart ) > PLLI2S_TIMEOUT_VALUE)
8005376: f7fb ff6f bl 8001258 <HAL_GetTick>
800537a: 4602 mov r2, r0
800537c: 697b ldr r3, [r7, #20]
800537e: 1ad3 subs r3, r2, r3
8005380: 2b02 cmp r3, #2
8005382: d901 bls.n 8005388 <HAL_RCCEx_PeriphCLKConfig+0x48>
{
/* return in case of Timeout detected */
return HAL_TIMEOUT;
8005384: 2303 movs r3, #3
8005386: e0ba b.n 80054fe <HAL_RCCEx_PeriphCLKConfig+0x1be>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) != RESET)
8005388: 4b60 ldr r3, [pc, #384] ; (800550c <HAL_RCCEx_PeriphCLKConfig+0x1cc>)
800538a: 681b ldr r3, [r3, #0]
800538c: f003 6300 and.w r3, r3, #134217728 ; 0x8000000
8005390: 2b00 cmp r3, #0
8005392: d1f0 bne.n 8005376 <HAL_RCCEx_PeriphCLKConfig+0x36>
__HAL_RCC_PLLI2S_I2SCLK_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN, PeriphClkInit->PLLI2S.PLLI2SR);
#else
/* Configure the PLLI2S division factors */
/* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) * (PLLI2SN/PLLM) */
/* I2SCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SR */
__HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SR);
8005394: 687b ldr r3, [r7, #4]
8005396: 685b ldr r3, [r3, #4]
8005398: 019a lsls r2, r3, #6
800539a: 687b ldr r3, [r7, #4]
800539c: 689b ldr r3, [r3, #8]
800539e: 071b lsls r3, r3, #28
80053a0: 495a ldr r1, [pc, #360] ; (800550c <HAL_RCCEx_PeriphCLKConfig+0x1cc>)
80053a2: 4313 orrs r3, r2
80053a4: f8c1 3084 str.w r3, [r1, #132] ; 0x84
#endif /* STM32F411xE */
/* Enable the PLLI2S */
__HAL_RCC_PLLI2S_ENABLE();
80053a8: 4b57 ldr r3, [pc, #348] ; (8005508 <HAL_RCCEx_PeriphCLKConfig+0x1c8>)
80053aa: 2201 movs r2, #1
80053ac: 601a str r2, [r3, #0]
/* Get tick */
tickstart = HAL_GetTick();
80053ae: f7fb ff53 bl 8001258 <HAL_GetTick>
80053b2: 6178 str r0, [r7, #20]
/* Wait till PLLI2S is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET)
80053b4: e008 b.n 80053c8 <HAL_RCCEx_PeriphCLKConfig+0x88>
{
if((HAL_GetTick() - tickstart ) > PLLI2S_TIMEOUT_VALUE)
80053b6: f7fb ff4f bl 8001258 <HAL_GetTick>
80053ba: 4602 mov r2, r0
80053bc: 697b ldr r3, [r7, #20]
80053be: 1ad3 subs r3, r2, r3
80053c0: 2b02 cmp r3, #2
80053c2: d901 bls.n 80053c8 <HAL_RCCEx_PeriphCLKConfig+0x88>
{
/* return in case of Timeout detected */
return HAL_TIMEOUT;
80053c4: 2303 movs r3, #3
80053c6: e09a b.n 80054fe <HAL_RCCEx_PeriphCLKConfig+0x1be>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET)
80053c8: 4b50 ldr r3, [pc, #320] ; (800550c <HAL_RCCEx_PeriphCLKConfig+0x1cc>)
80053ca: 681b ldr r3, [r3, #0]
80053cc: f003 6300 and.w r3, r3, #134217728 ; 0x8000000
80053d0: 2b00 cmp r3, #0
80053d2: d0f0 beq.n 80053b6 <HAL_RCCEx_PeriphCLKConfig+0x76>
}
}
}
/*---------------------------- RTC configuration ---------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC))
80053d4: 687b ldr r3, [r7, #4]
80053d6: 681b ldr r3, [r3, #0]
80053d8: f003 0302 and.w r3, r3, #2
80053dc: 2b00 cmp r3, #0
80053de: f000 8083 beq.w 80054e8 <HAL_RCCEx_PeriphCLKConfig+0x1a8>
{
/* Check for RTC Parameters used to output RTCCLK */
assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
/* Enable Power Clock*/
__HAL_RCC_PWR_CLK_ENABLE();
80053e2: 2300 movs r3, #0
80053e4: 60fb str r3, [r7, #12]
80053e6: 4b49 ldr r3, [pc, #292] ; (800550c <HAL_RCCEx_PeriphCLKConfig+0x1cc>)
80053e8: 6c1b ldr r3, [r3, #64] ; 0x40
80053ea: 4a48 ldr r2, [pc, #288] ; (800550c <HAL_RCCEx_PeriphCLKConfig+0x1cc>)
80053ec: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
80053f0: 6413 str r3, [r2, #64] ; 0x40
80053f2: 4b46 ldr r3, [pc, #280] ; (800550c <HAL_RCCEx_PeriphCLKConfig+0x1cc>)
80053f4: 6c1b ldr r3, [r3, #64] ; 0x40
80053f6: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
80053fa: 60fb str r3, [r7, #12]
80053fc: 68fb ldr r3, [r7, #12]
/* Enable write access to Backup domain */
PWR->CR |= PWR_CR_DBP;
80053fe: 4b44 ldr r3, [pc, #272] ; (8005510 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
8005400: 681b ldr r3, [r3, #0]
8005402: 4a43 ldr r2, [pc, #268] ; (8005510 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
8005404: f443 7380 orr.w r3, r3, #256 ; 0x100
8005408: 6013 str r3, [r2, #0]
/* Get tick */
tickstart = HAL_GetTick();
800540a: f7fb ff25 bl 8001258 <HAL_GetTick>
800540e: 6178 str r0, [r7, #20]
while((PWR->CR & PWR_CR_DBP) == RESET)
8005410: e008 b.n 8005424 <HAL_RCCEx_PeriphCLKConfig+0xe4>
{
if((HAL_GetTick() - tickstart ) > RCC_DBP_TIMEOUT_VALUE)
8005412: f7fb ff21 bl 8001258 <HAL_GetTick>
8005416: 4602 mov r2, r0
8005418: 697b ldr r3, [r7, #20]
800541a: 1ad3 subs r3, r2, r3
800541c: 2b02 cmp r3, #2
800541e: d901 bls.n 8005424 <HAL_RCCEx_PeriphCLKConfig+0xe4>
{
return HAL_TIMEOUT;
8005420: 2303 movs r3, #3
8005422: e06c b.n 80054fe <HAL_RCCEx_PeriphCLKConfig+0x1be>
while((PWR->CR & PWR_CR_DBP) == RESET)
8005424: 4b3a ldr r3, [pc, #232] ; (8005510 <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
8005426: 681b ldr r3, [r3, #0]
8005428: f403 7380 and.w r3, r3, #256 ; 0x100
800542c: 2b00 cmp r3, #0
800542e: d0f0 beq.n 8005412 <HAL_RCCEx_PeriphCLKConfig+0xd2>
}
}
/* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */
tmpreg1 = (RCC->BDCR & RCC_BDCR_RTCSEL);
8005430: 4b36 ldr r3, [pc, #216] ; (800550c <HAL_RCCEx_PeriphCLKConfig+0x1cc>)
8005432: 6f1b ldr r3, [r3, #112] ; 0x70
8005434: f403 7340 and.w r3, r3, #768 ; 0x300
8005438: 613b str r3, [r7, #16]
if((tmpreg1 != 0x00000000U) && ((tmpreg1) != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
800543a: 693b ldr r3, [r7, #16]
800543c: 2b00 cmp r3, #0
800543e: d02f beq.n 80054a0 <HAL_RCCEx_PeriphCLKConfig+0x160>
8005440: 687b ldr r3, [r7, #4]
8005442: 68db ldr r3, [r3, #12]
8005444: f403 7340 and.w r3, r3, #768 ; 0x300
8005448: 693a ldr r2, [r7, #16]
800544a: 429a cmp r2, r3
800544c: d028 beq.n 80054a0 <HAL_RCCEx_PeriphCLKConfig+0x160>
{
/* Store the content of BDCR register before the reset of Backup Domain */
tmpreg1 = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
800544e: 4b2f ldr r3, [pc, #188] ; (800550c <HAL_RCCEx_PeriphCLKConfig+0x1cc>)
8005450: 6f1b ldr r3, [r3, #112] ; 0x70
8005452: f423 7340 bic.w r3, r3, #768 ; 0x300
8005456: 613b str r3, [r7, #16]
/* RTC Clock selection can be changed only if the Backup Domain is reset */
__HAL_RCC_BACKUPRESET_FORCE();
8005458: 4b2e ldr r3, [pc, #184] ; (8005514 <HAL_RCCEx_PeriphCLKConfig+0x1d4>)
800545a: 2201 movs r2, #1
800545c: 601a str r2, [r3, #0]
__HAL_RCC_BACKUPRESET_RELEASE();
800545e: 4b2d ldr r3, [pc, #180] ; (8005514 <HAL_RCCEx_PeriphCLKConfig+0x1d4>)
8005460: 2200 movs r2, #0
8005462: 601a str r2, [r3, #0]
/* Restore the Content of BDCR register */
RCC->BDCR = tmpreg1;
8005464: 4a29 ldr r2, [pc, #164] ; (800550c <HAL_RCCEx_PeriphCLKConfig+0x1cc>)
8005466: 693b ldr r3, [r7, #16]
8005468: 6713 str r3, [r2, #112] ; 0x70
/* Wait for LSE reactivation if LSE was enable prior to Backup Domain reset */
if(HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSEON))
800546a: 4b28 ldr r3, [pc, #160] ; (800550c <HAL_RCCEx_PeriphCLKConfig+0x1cc>)
800546c: 6f1b ldr r3, [r3, #112] ; 0x70
800546e: f003 0301 and.w r3, r3, #1
8005472: 2b01 cmp r3, #1
8005474: d114 bne.n 80054a0 <HAL_RCCEx_PeriphCLKConfig+0x160>
{
/* Get tick */
tickstart = HAL_GetTick();
8005476: f7fb feef bl 8001258 <HAL_GetTick>
800547a: 6178 str r0, [r7, #20]
/* Wait till LSE is ready */
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
800547c: e00a b.n 8005494 <HAL_RCCEx_PeriphCLKConfig+0x154>
{
if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
800547e: f7fb feeb bl 8001258 <HAL_GetTick>
8005482: 4602 mov r2, r0
8005484: 697b ldr r3, [r7, #20]
8005486: 1ad3 subs r3, r2, r3
8005488: f241 3288 movw r2, #5000 ; 0x1388
800548c: 4293 cmp r3, r2
800548e: d901 bls.n 8005494 <HAL_RCCEx_PeriphCLKConfig+0x154>
{
return HAL_TIMEOUT;
8005490: 2303 movs r3, #3
8005492: e034 b.n 80054fe <HAL_RCCEx_PeriphCLKConfig+0x1be>
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8005494: 4b1d ldr r3, [pc, #116] ; (800550c <HAL_RCCEx_PeriphCLKConfig+0x1cc>)
8005496: 6f1b ldr r3, [r3, #112] ; 0x70
8005498: f003 0302 and.w r3, r3, #2
800549c: 2b00 cmp r3, #0
800549e: d0ee beq.n 800547e <HAL_RCCEx_PeriphCLKConfig+0x13e>
}
}
}
}
__HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
80054a0: 687b ldr r3, [r7, #4]
80054a2: 68db ldr r3, [r3, #12]
80054a4: f403 7340 and.w r3, r3, #768 ; 0x300
80054a8: f5b3 7f40 cmp.w r3, #768 ; 0x300
80054ac: d10d bne.n 80054ca <HAL_RCCEx_PeriphCLKConfig+0x18a>
80054ae: 4b17 ldr r3, [pc, #92] ; (800550c <HAL_RCCEx_PeriphCLKConfig+0x1cc>)
80054b0: 689b ldr r3, [r3, #8]
80054b2: f423 12f8 bic.w r2, r3, #2031616 ; 0x1f0000
80054b6: 687b ldr r3, [r7, #4]
80054b8: 68db ldr r3, [r3, #12]
80054ba: f023 4370 bic.w r3, r3, #4026531840 ; 0xf0000000
80054be: f423 7340 bic.w r3, r3, #768 ; 0x300
80054c2: 4912 ldr r1, [pc, #72] ; (800550c <HAL_RCCEx_PeriphCLKConfig+0x1cc>)
80054c4: 4313 orrs r3, r2
80054c6: 608b str r3, [r1, #8]
80054c8: e005 b.n 80054d6 <HAL_RCCEx_PeriphCLKConfig+0x196>
80054ca: 4b10 ldr r3, [pc, #64] ; (800550c <HAL_RCCEx_PeriphCLKConfig+0x1cc>)
80054cc: 689b ldr r3, [r3, #8]
80054ce: 4a0f ldr r2, [pc, #60] ; (800550c <HAL_RCCEx_PeriphCLKConfig+0x1cc>)
80054d0: f423 13f8 bic.w r3, r3, #2031616 ; 0x1f0000
80054d4: 6093 str r3, [r2, #8]
80054d6: 4b0d ldr r3, [pc, #52] ; (800550c <HAL_RCCEx_PeriphCLKConfig+0x1cc>)
80054d8: 6f1a ldr r2, [r3, #112] ; 0x70
80054da: 687b ldr r3, [r7, #4]
80054dc: 68db ldr r3, [r3, #12]
80054de: f3c3 030b ubfx r3, r3, #0, #12
80054e2: 490a ldr r1, [pc, #40] ; (800550c <HAL_RCCEx_PeriphCLKConfig+0x1cc>)
80054e4: 4313 orrs r3, r2
80054e6: 670b str r3, [r1, #112] ; 0x70
}
#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
/*---------------------------- TIM configuration ---------------------------*/
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM) == (RCC_PERIPHCLK_TIM))
80054e8: 687b ldr r3, [r7, #4]
80054ea: 681b ldr r3, [r3, #0]
80054ec: f003 0308 and.w r3, r3, #8
80054f0: 2b00 cmp r3, #0
80054f2: d003 beq.n 80054fc <HAL_RCCEx_PeriphCLKConfig+0x1bc>
{
__HAL_RCC_TIMCLKPRESCALER(PeriphClkInit->TIMPresSelection);
80054f4: 687b ldr r3, [r7, #4]
80054f6: 7c1a ldrb r2, [r3, #16]
80054f8: 4b07 ldr r3, [pc, #28] ; (8005518 <HAL_RCCEx_PeriphCLKConfig+0x1d8>)
80054fa: 601a str r2, [r3, #0]
}
#endif /* STM32F401xC || STM32F401xE || STM32F411xE */
return HAL_OK;
80054fc: 2300 movs r3, #0
}
80054fe: 4618 mov r0, r3
8005500: 3718 adds r7, #24
8005502: 46bd mov sp, r7
8005504: bd80 pop {r7, pc}
8005506: bf00 nop
8005508: 42470068 .word 0x42470068
800550c: 40023800 .word 0x40023800
8005510: 40007000 .word 0x40007000
8005514: 42470e40 .word 0x42470e40
8005518: 424711e0 .word 0x424711e0
0800551c <HAL_RCCEx_GetPeriphCLKFreq>:
* This parameter can be one of the following values:
* @arg RCC_PERIPHCLK_I2S: I2S peripheral clock
* @retval Frequency in KHz
*/
uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk)
{
800551c: b480 push {r7}
800551e: b087 sub sp, #28
8005520: af00 add r7, sp, #0
8005522: 6078 str r0, [r7, #4]
/* This variable used to store the I2S clock frequency (value in Hz) */
uint32_t frequency = 0U;
8005524: 2300 movs r3, #0
8005526: 617b str r3, [r7, #20]
/* This variable used to store the VCO Input (value in Hz) */
uint32_t vcoinput = 0U;
8005528: 2300 movs r3, #0
800552a: 613b str r3, [r7, #16]
uint32_t srcclk = 0U;
800552c: 2300 movs r3, #0
800552e: 60fb str r3, [r7, #12]
/* This variable used to store the VCO Output (value in Hz) */
uint32_t vcooutput = 0U;
8005530: 2300 movs r3, #0
8005532: 60bb str r3, [r7, #8]
switch (PeriphClk)
8005534: 687b ldr r3, [r7, #4]
8005536: 2b01 cmp r3, #1
8005538: d13d bne.n 80055b6 <HAL_RCCEx_GetPeriphCLKFreq+0x9a>
{
case RCC_PERIPHCLK_I2S:
{
/* Get the current I2S source */
srcclk = __HAL_RCC_GET_I2S_SOURCE();
800553a: 4b22 ldr r3, [pc, #136] ; (80055c4 <HAL_RCCEx_GetPeriphCLKFreq+0xa8>)
800553c: 689b ldr r3, [r3, #8]
800553e: f403 0300 and.w r3, r3, #8388608 ; 0x800000
8005542: 60fb str r3, [r7, #12]
switch (srcclk)
8005544: 68fb ldr r3, [r7, #12]
8005546: 2b00 cmp r3, #0
8005548: d004 beq.n 8005554 <HAL_RCCEx_GetPeriphCLKFreq+0x38>
800554a: 2b01 cmp r3, #1
800554c: d12f bne.n 80055ae <HAL_RCCEx_GetPeriphCLKFreq+0x92>
{
/* Check if I2S clock selection is External clock mapped on the I2S_CKIN pin used as I2S clock */
case RCC_I2SCLKSOURCE_EXT:
{
/* Set the I2S clock to the external clock value */
frequency = EXTERNAL_CLOCK_VALUE;
800554e: 4b1e ldr r3, [pc, #120] ; (80055c8 <HAL_RCCEx_GetPeriphCLKFreq+0xac>)
8005550: 617b str r3, [r7, #20]
break;
8005552: e02f b.n 80055b4 <HAL_RCCEx_GetPeriphCLKFreq+0x98>
vcoinput = (uint32_t)(HSI_VALUE / (uint32_t)(RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SM));
}
#else
/* Configure the PLLI2S division factor */
/* PLLI2S_VCO Input = PLL_SOURCE/PLLM */
if((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
8005554: 4b1b ldr r3, [pc, #108] ; (80055c4 <HAL_RCCEx_GetPeriphCLKFreq+0xa8>)
8005556: 685b ldr r3, [r3, #4]
8005558: f403 0380 and.w r3, r3, #4194304 ; 0x400000
800555c: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000
8005560: d108 bne.n 8005574 <HAL_RCCEx_GetPeriphCLKFreq+0x58>
{
/* Get the I2S source clock value */
vcoinput = (uint32_t)(HSE_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM));
8005562: 4b18 ldr r3, [pc, #96] ; (80055c4 <HAL_RCCEx_GetPeriphCLKFreq+0xa8>)
8005564: 685b ldr r3, [r3, #4]
8005566: f003 033f and.w r3, r3, #63 ; 0x3f
800556a: 4a18 ldr r2, [pc, #96] ; (80055cc <HAL_RCCEx_GetPeriphCLKFreq+0xb0>)
800556c: fbb2 f3f3 udiv r3, r2, r3
8005570: 613b str r3, [r7, #16]
8005572: e007 b.n 8005584 <HAL_RCCEx_GetPeriphCLKFreq+0x68>
}
else
{
/* Get the I2S source clock value */
vcoinput = (uint32_t)(HSI_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM));
8005574: 4b13 ldr r3, [pc, #76] ; (80055c4 <HAL_RCCEx_GetPeriphCLKFreq+0xa8>)
8005576: 685b ldr r3, [r3, #4]
8005578: f003 033f and.w r3, r3, #63 ; 0x3f
800557c: 4a14 ldr r2, [pc, #80] ; (80055d0 <HAL_RCCEx_GetPeriphCLKFreq+0xb4>)
800557e: fbb2 f3f3 udiv r3, r2, r3
8005582: 613b str r3, [r7, #16]
}
#endif /* STM32F411xE */
/* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */
vcooutput = (uint32_t)(vcoinput * (((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SN) >> 6U) & (RCC_PLLI2SCFGR_PLLI2SN >> 6U)));
8005584: 4b0f ldr r3, [pc, #60] ; (80055c4 <HAL_RCCEx_GetPeriphCLKFreq+0xa8>)
8005586: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
800558a: 099b lsrs r3, r3, #6
800558c: f3c3 0208 ubfx r2, r3, #0, #9
8005590: 693b ldr r3, [r7, #16]
8005592: fb02 f303 mul.w r3, r2, r3
8005596: 60bb str r3, [r7, #8]
/* I2S_CLK = PLLI2S_VCO Output/PLLI2SR */
frequency = (uint32_t)(vcooutput /(((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> 28U) & (RCC_PLLI2SCFGR_PLLI2SR >> 28U)));
8005598: 4b0a ldr r3, [pc, #40] ; (80055c4 <HAL_RCCEx_GetPeriphCLKFreq+0xa8>)
800559a: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
800559e: 0f1b lsrs r3, r3, #28
80055a0: f003 0307 and.w r3, r3, #7
80055a4: 68ba ldr r2, [r7, #8]
80055a6: fbb2 f3f3 udiv r3, r2, r3
80055aa: 617b str r3, [r7, #20]
break;
80055ac: e002 b.n 80055b4 <HAL_RCCEx_GetPeriphCLKFreq+0x98>
}
/* Clock not enabled for I2S*/
default:
{
frequency = 0U;
80055ae: 2300 movs r3, #0
80055b0: 617b str r3, [r7, #20]
break;
80055b2: bf00 nop
}
}
break;
80055b4: bf00 nop
}
}
return frequency;
80055b6: 697b ldr r3, [r7, #20]
}
80055b8: 4618 mov r0, r3
80055ba: 371c adds r7, #28
80055bc: 46bd mov sp, r7
80055be: f85d 7b04 ldr.w r7, [sp], #4
80055c2: 4770 bx lr
80055c4: 40023800 .word 0x40023800
80055c8: 00bb8000 .word 0x00bb8000
80055cc: 007a1200 .word 0x007a1200
80055d0: 00f42400 .word 0x00f42400
080055d4 <HAL_SPI_Init>:
* @param hspi pointer to a SPI_HandleTypeDef structure that contains
* the configuration information for SPI module.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
{
80055d4: b580 push {r7, lr}
80055d6: b082 sub sp, #8
80055d8: af00 add r7, sp, #0
80055da: 6078 str r0, [r7, #4]
/* Check the SPI handle allocation */
if (hspi == NULL)
80055dc: 687b ldr r3, [r7, #4]
80055de: 2b00 cmp r3, #0
80055e0: d101 bne.n 80055e6 <HAL_SPI_Init+0x12>
{
return HAL_ERROR;
80055e2: 2301 movs r3, #1
80055e4: e056 b.n 8005694 <HAL_SPI_Init+0xc0>
if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
{
assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial));
}
#else
hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
80055e6: 687b ldr r3, [r7, #4]
80055e8: 2200 movs r2, #0
80055ea: 629a str r2, [r3, #40] ; 0x28
#endif /* USE_SPI_CRC */
if (hspi->State == HAL_SPI_STATE_RESET)
80055ec: 687b ldr r3, [r7, #4]
80055ee: f893 3051 ldrb.w r3, [r3, #81] ; 0x51
80055f2: b2db uxtb r3, r3
80055f4: 2b00 cmp r3, #0
80055f6: d106 bne.n 8005606 <HAL_SPI_Init+0x32>
{
/* Allocate lock resource and initialize it */
hspi->Lock = HAL_UNLOCKED;
80055f8: 687b ldr r3, [r7, #4]
80055fa: 2200 movs r2, #0
80055fc: f883 2050 strb.w r2, [r3, #80] ; 0x50
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
hspi->MspInitCallback(hspi);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
HAL_SPI_MspInit(hspi);
8005600: 6878 ldr r0, [r7, #4]
8005602: f7fb fbb5 bl 8000d70 <HAL_SPI_MspInit>
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
}
hspi->State = HAL_SPI_STATE_BUSY;
8005606: 687b ldr r3, [r7, #4]
8005608: 2202 movs r2, #2
800560a: f883 2051 strb.w r2, [r3, #81] ; 0x51
/* Disable the selected SPI peripheral */
__HAL_SPI_DISABLE(hspi);
800560e: 687b ldr r3, [r7, #4]
8005610: 681b ldr r3, [r3, #0]
8005612: 681a ldr r2, [r3, #0]
8005614: 687b ldr r3, [r7, #4]
8005616: 681b ldr r3, [r3, #0]
8005618: f022 0240 bic.w r2, r2, #64 ; 0x40
800561c: 601a str r2, [r3, #0]
/*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/
/* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management,
Communication speed, First bit and CRC calculation state */
WRITE_REG(hspi->Instance->CR1, (hspi->Init.Mode | hspi->Init.Direction | hspi->Init.DataSize |
800561e: 687b ldr r3, [r7, #4]
8005620: 685a ldr r2, [r3, #4]
8005622: 687b ldr r3, [r7, #4]
8005624: 689b ldr r3, [r3, #8]
8005626: 431a orrs r2, r3
8005628: 687b ldr r3, [r7, #4]
800562a: 68db ldr r3, [r3, #12]
800562c: 431a orrs r2, r3
800562e: 687b ldr r3, [r7, #4]
8005630: 691b ldr r3, [r3, #16]
8005632: 431a orrs r2, r3
8005634: 687b ldr r3, [r7, #4]
8005636: 695b ldr r3, [r3, #20]
8005638: 431a orrs r2, r3
800563a: 687b ldr r3, [r7, #4]
800563c: 699b ldr r3, [r3, #24]
800563e: f403 7300 and.w r3, r3, #512 ; 0x200
8005642: 431a orrs r2, r3
8005644: 687b ldr r3, [r7, #4]
8005646: 69db ldr r3, [r3, #28]
8005648: 431a orrs r2, r3
800564a: 687b ldr r3, [r7, #4]
800564c: 6a1b ldr r3, [r3, #32]
800564e: ea42 0103 orr.w r1, r2, r3
8005652: 687b ldr r3, [r7, #4]
8005654: 6a9a ldr r2, [r3, #40] ; 0x28
8005656: 687b ldr r3, [r7, #4]
8005658: 681b ldr r3, [r3, #0]
800565a: 430a orrs r2, r1
800565c: 601a str r2, [r3, #0]
hspi->Init.CLKPolarity | hspi->Init.CLKPhase | (hspi->Init.NSS & SPI_CR1_SSM) |
hspi->Init.BaudRatePrescaler | hspi->Init.FirstBit | hspi->Init.CRCCalculation));
/* Configure : NSS management, TI Mode */
WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE) | hspi->Init.TIMode));
800565e: 687b ldr r3, [r7, #4]
8005660: 699b ldr r3, [r3, #24]
8005662: 0c1b lsrs r3, r3, #16
8005664: f003 0104 and.w r1, r3, #4
8005668: 687b ldr r3, [r7, #4]
800566a: 6a5a ldr r2, [r3, #36] ; 0x24
800566c: 687b ldr r3, [r7, #4]
800566e: 681b ldr r3, [r3, #0]
8005670: 430a orrs r2, r1
8005672: 605a str r2, [r3, #4]
}
#endif /* USE_SPI_CRC */
#if defined(SPI_I2SCFGR_I2SMOD)
/* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */
CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD);
8005674: 687b ldr r3, [r7, #4]
8005676: 681b ldr r3, [r3, #0]
8005678: 69da ldr r2, [r3, #28]
800567a: 687b ldr r3, [r7, #4]
800567c: 681b ldr r3, [r3, #0]
800567e: f422 6200 bic.w r2, r2, #2048 ; 0x800
8005682: 61da str r2, [r3, #28]
#endif /* SPI_I2SCFGR_I2SMOD */
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
8005684: 687b ldr r3, [r7, #4]
8005686: 2200 movs r2, #0
8005688: 655a str r2, [r3, #84] ; 0x54
hspi->State = HAL_SPI_STATE_READY;
800568a: 687b ldr r3, [r7, #4]
800568c: 2201 movs r2, #1
800568e: f883 2051 strb.w r2, [r3, #81] ; 0x51
return HAL_OK;
8005692: 2300 movs r3, #0
}
8005694: 4618 mov r0, r3
8005696: 3708 adds r7, #8
8005698: 46bd mov sp, r7
800569a: bd80 pop {r7, pc}
0800569c <HAL_UART_Init>:
* @param huart Pointer to a UART_HandleTypeDef structure that contains
* the configuration information for the specified UART module.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
{
800569c: b580 push {r7, lr}
800569e: b082 sub sp, #8
80056a0: af00 add r7, sp, #0
80056a2: 6078 str r0, [r7, #4]
/* Check the UART handle allocation */
if (huart == NULL)
80056a4: 687b ldr r3, [r7, #4]
80056a6: 2b00 cmp r3, #0
80056a8: d101 bne.n 80056ae <HAL_UART_Init+0x12>
{
return HAL_ERROR;
80056aa: 2301 movs r3, #1
80056ac: e03f b.n 800572e <HAL_UART_Init+0x92>
assert_param(IS_UART_INSTANCE(huart->Instance));
}
assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
if (huart->gState == HAL_UART_STATE_RESET)
80056ae: 687b ldr r3, [r7, #4]
80056b0: f893 3039 ldrb.w r3, [r3, #57] ; 0x39
80056b4: b2db uxtb r3, r3
80056b6: 2b00 cmp r3, #0
80056b8: d106 bne.n 80056c8 <HAL_UART_Init+0x2c>
{
/* Allocate lock resource and initialize it */
huart->Lock = HAL_UNLOCKED;
80056ba: 687b ldr r3, [r7, #4]
80056bc: 2200 movs r2, #0
80056be: f883 2038 strb.w r2, [r3, #56] ; 0x38
/* Init the low level hardware */
huart->MspInitCallback(huart);
#else
/* Init the low level hardware : GPIO, CLOCK */
HAL_UART_MspInit(huart);
80056c2: 6878 ldr r0, [r7, #4]
80056c4: f7fb fb9c bl 8000e00 <HAL_UART_MspInit>
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
}
huart->gState = HAL_UART_STATE_BUSY;
80056c8: 687b ldr r3, [r7, #4]
80056ca: 2224 movs r2, #36 ; 0x24
80056cc: f883 2039 strb.w r2, [r3, #57] ; 0x39
/* Disable the peripheral */
__HAL_UART_DISABLE(huart);
80056d0: 687b ldr r3, [r7, #4]
80056d2: 681b ldr r3, [r3, #0]
80056d4: 68da ldr r2, [r3, #12]
80056d6: 687b ldr r3, [r7, #4]
80056d8: 681b ldr r3, [r3, #0]
80056da: f422 5200 bic.w r2, r2, #8192 ; 0x2000
80056de: 60da str r2, [r3, #12]
/* Set the UART Communication parameters */
UART_SetConfig(huart);
80056e0: 6878 ldr r0, [r7, #4]
80056e2: f000 f90b bl 80058fc <UART_SetConfig>
/* In asynchronous mode, the following bits must be kept cleared:
- LINEN and CLKEN bits in the USART_CR2 register,
- SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
80056e6: 687b ldr r3, [r7, #4]
80056e8: 681b ldr r3, [r3, #0]
80056ea: 691a ldr r2, [r3, #16]
80056ec: 687b ldr r3, [r7, #4]
80056ee: 681b ldr r3, [r3, #0]
80056f0: f422 4290 bic.w r2, r2, #18432 ; 0x4800
80056f4: 611a str r2, [r3, #16]
CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
80056f6: 687b ldr r3, [r7, #4]
80056f8: 681b ldr r3, [r3, #0]
80056fa: 695a ldr r2, [r3, #20]
80056fc: 687b ldr r3, [r7, #4]
80056fe: 681b ldr r3, [r3, #0]
8005700: f022 022a bic.w r2, r2, #42 ; 0x2a
8005704: 615a str r2, [r3, #20]
/* Enable the peripheral */
__HAL_UART_ENABLE(huart);
8005706: 687b ldr r3, [r7, #4]
8005708: 681b ldr r3, [r3, #0]
800570a: 68da ldr r2, [r3, #12]
800570c: 687b ldr r3, [r7, #4]
800570e: 681b ldr r3, [r3, #0]
8005710: f442 5200 orr.w r2, r2, #8192 ; 0x2000
8005714: 60da str r2, [r3, #12]
/* Initialize the UART state */
huart->ErrorCode = HAL_UART_ERROR_NONE;
8005716: 687b ldr r3, [r7, #4]
8005718: 2200 movs r2, #0
800571a: 63da str r2, [r3, #60] ; 0x3c
huart->gState = HAL_UART_STATE_READY;
800571c: 687b ldr r3, [r7, #4]
800571e: 2220 movs r2, #32
8005720: f883 2039 strb.w r2, [r3, #57] ; 0x39
huart->RxState = HAL_UART_STATE_READY;
8005724: 687b ldr r3, [r7, #4]
8005726: 2220 movs r2, #32
8005728: f883 203a strb.w r2, [r3, #58] ; 0x3a
return HAL_OK;
800572c: 2300 movs r3, #0
}
800572e: 4618 mov r0, r3
8005730: 3708 adds r7, #8
8005732: 46bd mov sp, r7
8005734: bd80 pop {r7, pc}
08005736 <HAL_UART_Transmit>:
* @param Size Amount of data elements (u8 or u16) to be sent
* @param Timeout Timeout duration
* @retval HAL status
*/
HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
{
8005736: b580 push {r7, lr}
8005738: b088 sub sp, #32
800573a: af02 add r7, sp, #8
800573c: 60f8 str r0, [r7, #12]
800573e: 60b9 str r1, [r7, #8]
8005740: 603b str r3, [r7, #0]
8005742: 4613 mov r3, r2
8005744: 80fb strh r3, [r7, #6]
uint16_t *tmp;
uint32_t tickstart = 0U;
8005746: 2300 movs r3, #0
8005748: 617b str r3, [r7, #20]
/* Check that a Tx process is not already ongoing */
if (huart->gState == HAL_UART_STATE_READY)
800574a: 68fb ldr r3, [r7, #12]
800574c: f893 3039 ldrb.w r3, [r3, #57] ; 0x39
8005750: b2db uxtb r3, r3
8005752: 2b20 cmp r3, #32
8005754: f040 8083 bne.w 800585e <HAL_UART_Transmit+0x128>
{
if ((pData == NULL) || (Size == 0U))
8005758: 68bb ldr r3, [r7, #8]
800575a: 2b00 cmp r3, #0
800575c: d002 beq.n 8005764 <HAL_UART_Transmit+0x2e>
800575e: 88fb ldrh r3, [r7, #6]
8005760: 2b00 cmp r3, #0
8005762: d101 bne.n 8005768 <HAL_UART_Transmit+0x32>
{
return HAL_ERROR;
8005764: 2301 movs r3, #1
8005766: e07b b.n 8005860 <HAL_UART_Transmit+0x12a>
}
/* Process Locked */
__HAL_LOCK(huart);
8005768: 68fb ldr r3, [r7, #12]
800576a: f893 3038 ldrb.w r3, [r3, #56] ; 0x38
800576e: 2b01 cmp r3, #1
8005770: d101 bne.n 8005776 <HAL_UART_Transmit+0x40>
8005772: 2302 movs r3, #2
8005774: e074 b.n 8005860 <HAL_UART_Transmit+0x12a>
8005776: 68fb ldr r3, [r7, #12]
8005778: 2201 movs r2, #1
800577a: f883 2038 strb.w r2, [r3, #56] ; 0x38
huart->ErrorCode = HAL_UART_ERROR_NONE;
800577e: 68fb ldr r3, [r7, #12]
8005780: 2200 movs r2, #0
8005782: 63da str r2, [r3, #60] ; 0x3c
huart->gState = HAL_UART_STATE_BUSY_TX;
8005784: 68fb ldr r3, [r7, #12]
8005786: 2221 movs r2, #33 ; 0x21
8005788: f883 2039 strb.w r2, [r3, #57] ; 0x39
/* Init tickstart for timeout managment */
tickstart = HAL_GetTick();
800578c: f7fb fd64 bl 8001258 <HAL_GetTick>
8005790: 6178 str r0, [r7, #20]
huart->TxXferSize = Size;
8005792: 68fb ldr r3, [r7, #12]
8005794: 88fa ldrh r2, [r7, #6]
8005796: 849a strh r2, [r3, #36] ; 0x24
huart->TxXferCount = Size;
8005798: 68fb ldr r3, [r7, #12]
800579a: 88fa ldrh r2, [r7, #6]
800579c: 84da strh r2, [r3, #38] ; 0x26
/* Process Unlocked */
__HAL_UNLOCK(huart);
800579e: 68fb ldr r3, [r7, #12]
80057a0: 2200 movs r2, #0
80057a2: f883 2038 strb.w r2, [r3, #56] ; 0x38
while (huart->TxXferCount > 0U)
80057a6: e042 b.n 800582e <HAL_UART_Transmit+0xf8>
{
huart->TxXferCount--;
80057a8: 68fb ldr r3, [r7, #12]
80057aa: 8cdb ldrh r3, [r3, #38] ; 0x26
80057ac: b29b uxth r3, r3
80057ae: 3b01 subs r3, #1
80057b0: b29a uxth r2, r3
80057b2: 68fb ldr r3, [r7, #12]
80057b4: 84da strh r2, [r3, #38] ; 0x26
if (huart->Init.WordLength == UART_WORDLENGTH_9B)
80057b6: 68fb ldr r3, [r7, #12]
80057b8: 689b ldr r3, [r3, #8]
80057ba: f5b3 5f80 cmp.w r3, #4096 ; 0x1000
80057be: d122 bne.n 8005806 <HAL_UART_Transmit+0xd0>
{
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
80057c0: 683b ldr r3, [r7, #0]
80057c2: 9300 str r3, [sp, #0]
80057c4: 697b ldr r3, [r7, #20]
80057c6: 2200 movs r2, #0
80057c8: 2180 movs r1, #128 ; 0x80
80057ca: 68f8 ldr r0, [r7, #12]
80057cc: f000 f84c bl 8005868 <UART_WaitOnFlagUntilTimeout>
80057d0: 4603 mov r3, r0
80057d2: 2b00 cmp r3, #0
80057d4: d001 beq.n 80057da <HAL_UART_Transmit+0xa4>
{
return HAL_TIMEOUT;
80057d6: 2303 movs r3, #3
80057d8: e042 b.n 8005860 <HAL_UART_Transmit+0x12a>
}
tmp = (uint16_t *) pData;
80057da: 68bb ldr r3, [r7, #8]
80057dc: 613b str r3, [r7, #16]
huart->Instance->DR = (*tmp & (uint16_t)0x01FF);
80057de: 693b ldr r3, [r7, #16]
80057e0: 881b ldrh r3, [r3, #0]
80057e2: 461a mov r2, r3
80057e4: 68fb ldr r3, [r7, #12]
80057e6: 681b ldr r3, [r3, #0]
80057e8: f3c2 0208 ubfx r2, r2, #0, #9
80057ec: 605a str r2, [r3, #4]
if (huart->Init.Parity == UART_PARITY_NONE)
80057ee: 68fb ldr r3, [r7, #12]
80057f0: 691b ldr r3, [r3, #16]
80057f2: 2b00 cmp r3, #0
80057f4: d103 bne.n 80057fe <HAL_UART_Transmit+0xc8>
{
pData += 2U;
80057f6: 68bb ldr r3, [r7, #8]
80057f8: 3302 adds r3, #2
80057fa: 60bb str r3, [r7, #8]
80057fc: e017 b.n 800582e <HAL_UART_Transmit+0xf8>
}
else
{
pData += 1U;
80057fe: 68bb ldr r3, [r7, #8]
8005800: 3301 adds r3, #1
8005802: 60bb str r3, [r7, #8]
8005804: e013 b.n 800582e <HAL_UART_Transmit+0xf8>
}
}
else
{
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
8005806: 683b ldr r3, [r7, #0]
8005808: 9300 str r3, [sp, #0]
800580a: 697b ldr r3, [r7, #20]
800580c: 2200 movs r2, #0
800580e: 2180 movs r1, #128 ; 0x80
8005810: 68f8 ldr r0, [r7, #12]
8005812: f000 f829 bl 8005868 <UART_WaitOnFlagUntilTimeout>
8005816: 4603 mov r3, r0
8005818: 2b00 cmp r3, #0
800581a: d001 beq.n 8005820 <HAL_UART_Transmit+0xea>
{
return HAL_TIMEOUT;
800581c: 2303 movs r3, #3
800581e: e01f b.n 8005860 <HAL_UART_Transmit+0x12a>
}
huart->Instance->DR = (*pData++ & (uint8_t)0xFF);
8005820: 68bb ldr r3, [r7, #8]
8005822: 1c5a adds r2, r3, #1
8005824: 60ba str r2, [r7, #8]
8005826: 781a ldrb r2, [r3, #0]
8005828: 68fb ldr r3, [r7, #12]
800582a: 681b ldr r3, [r3, #0]
800582c: 605a str r2, [r3, #4]
while (huart->TxXferCount > 0U)
800582e: 68fb ldr r3, [r7, #12]
8005830: 8cdb ldrh r3, [r3, #38] ; 0x26
8005832: b29b uxth r3, r3
8005834: 2b00 cmp r3, #0
8005836: d1b7 bne.n 80057a8 <HAL_UART_Transmit+0x72>
}
}
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
8005838: 683b ldr r3, [r7, #0]
800583a: 9300 str r3, [sp, #0]
800583c: 697b ldr r3, [r7, #20]
800583e: 2200 movs r2, #0
8005840: 2140 movs r1, #64 ; 0x40
8005842: 68f8 ldr r0, [r7, #12]
8005844: f000 f810 bl 8005868 <UART_WaitOnFlagUntilTimeout>
8005848: 4603 mov r3, r0
800584a: 2b00 cmp r3, #0
800584c: d001 beq.n 8005852 <HAL_UART_Transmit+0x11c>
{
return HAL_TIMEOUT;
800584e: 2303 movs r3, #3
8005850: e006 b.n 8005860 <HAL_UART_Transmit+0x12a>
}
/* At end of Tx process, restore huart->gState to Ready */
huart->gState = HAL_UART_STATE_READY;
8005852: 68fb ldr r3, [r7, #12]
8005854: 2220 movs r2, #32
8005856: f883 2039 strb.w r2, [r3, #57] ; 0x39
return HAL_OK;
800585a: 2300 movs r3, #0
800585c: e000 b.n 8005860 <HAL_UART_Transmit+0x12a>
}
else
{
return HAL_BUSY;
800585e: 2302 movs r3, #2
}
}
8005860: 4618 mov r0, r3
8005862: 3718 adds r7, #24
8005864: 46bd mov sp, r7
8005866: bd80 pop {r7, pc}
08005868 <UART_WaitOnFlagUntilTimeout>:
* @param Tickstart Tick start value
* @param Timeout Timeout duration
* @retval HAL status
*/
static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
{
8005868: b580 push {r7, lr}
800586a: b084 sub sp, #16
800586c: af00 add r7, sp, #0
800586e: 60f8 str r0, [r7, #12]
8005870: 60b9 str r1, [r7, #8]
8005872: 603b str r3, [r7, #0]
8005874: 4613 mov r3, r2
8005876: 71fb strb r3, [r7, #7]
/* Wait until flag is set */
while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
8005878: e02c b.n 80058d4 <UART_WaitOnFlagUntilTimeout+0x6c>
{
/* Check for the Timeout */
if (Timeout != HAL_MAX_DELAY)
800587a: 69bb ldr r3, [r7, #24]
800587c: f1b3 3fff cmp.w r3, #4294967295
8005880: d028 beq.n 80058d4 <UART_WaitOnFlagUntilTimeout+0x6c>
{
if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout))
8005882: 69bb ldr r3, [r7, #24]
8005884: 2b00 cmp r3, #0
8005886: d007 beq.n 8005898 <UART_WaitOnFlagUntilTimeout+0x30>
8005888: f7fb fce6 bl 8001258 <HAL_GetTick>
800588c: 4602 mov r2, r0
800588e: 683b ldr r3, [r7, #0]
8005890: 1ad3 subs r3, r2, r3
8005892: 69ba ldr r2, [r7, #24]
8005894: 429a cmp r2, r3
8005896: d21d bcs.n 80058d4 <UART_WaitOnFlagUntilTimeout+0x6c>
{
/* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
8005898: 68fb ldr r3, [r7, #12]
800589a: 681b ldr r3, [r3, #0]
800589c: 68da ldr r2, [r3, #12]
800589e: 68fb ldr r3, [r7, #12]
80058a0: 681b ldr r3, [r3, #0]
80058a2: f422 72d0 bic.w r2, r2, #416 ; 0x1a0
80058a6: 60da str r2, [r3, #12]
CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
80058a8: 68fb ldr r3, [r7, #12]
80058aa: 681b ldr r3, [r3, #0]
80058ac: 695a ldr r2, [r3, #20]
80058ae: 68fb ldr r3, [r7, #12]
80058b0: 681b ldr r3, [r3, #0]
80058b2: f022 0201 bic.w r2, r2, #1
80058b6: 615a str r2, [r3, #20]
huart->gState = HAL_UART_STATE_READY;
80058b8: 68fb ldr r3, [r7, #12]
80058ba: 2220 movs r2, #32
80058bc: f883 2039 strb.w r2, [r3, #57] ; 0x39
huart->RxState = HAL_UART_STATE_READY;
80058c0: 68fb ldr r3, [r7, #12]
80058c2: 2220 movs r2, #32
80058c4: f883 203a strb.w r2, [r3, #58] ; 0x3a
/* Process Unlocked */
__HAL_UNLOCK(huart);
80058c8: 68fb ldr r3, [r7, #12]
80058ca: 2200 movs r2, #0
80058cc: f883 2038 strb.w r2, [r3, #56] ; 0x38
return HAL_TIMEOUT;
80058d0: 2303 movs r3, #3
80058d2: e00f b.n 80058f4 <UART_WaitOnFlagUntilTimeout+0x8c>
while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
80058d4: 68fb ldr r3, [r7, #12]
80058d6: 681b ldr r3, [r3, #0]
80058d8: 681a ldr r2, [r3, #0]
80058da: 68bb ldr r3, [r7, #8]
80058dc: 4013 ands r3, r2
80058de: 68ba ldr r2, [r7, #8]
80058e0: 429a cmp r2, r3
80058e2: bf0c ite eq
80058e4: 2301 moveq r3, #1
80058e6: 2300 movne r3, #0
80058e8: b2db uxtb r3, r3
80058ea: 461a mov r2, r3
80058ec: 79fb ldrb r3, [r7, #7]
80058ee: 429a cmp r2, r3
80058f0: d0c3 beq.n 800587a <UART_WaitOnFlagUntilTimeout+0x12>
}
}
}
return HAL_OK;
80058f2: 2300 movs r3, #0
}
80058f4: 4618 mov r0, r3
80058f6: 3710 adds r7, #16
80058f8: 46bd mov sp, r7
80058fa: bd80 pop {r7, pc}
080058fc <UART_SetConfig>:
* @param huart Pointer to a UART_HandleTypeDef structure that contains
* the configuration information for the specified UART module.
* @retval None
*/
static void UART_SetConfig(UART_HandleTypeDef *huart)
{
80058fc: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
8005900: b085 sub sp, #20
8005902: af00 add r7, sp, #0
8005904: 6078 str r0, [r7, #4]
assert_param(IS_UART_MODE(huart->Init.Mode));
/*-------------------------- USART CR2 Configuration -----------------------*/
/* Configure the UART Stop Bits: Set STOP[13:12] bits
according to huart->Init.StopBits value */
MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
8005906: 687b ldr r3, [r7, #4]
8005908: 681b ldr r3, [r3, #0]
800590a: 691b ldr r3, [r3, #16]
800590c: f423 5140 bic.w r1, r3, #12288 ; 0x3000
8005910: 687b ldr r3, [r7, #4]
8005912: 68da ldr r2, [r3, #12]
8005914: 687b ldr r3, [r7, #4]
8005916: 681b ldr r3, [r3, #0]
8005918: 430a orrs r2, r1
800591a: 611a str r2, [r3, #16]
Set the M bits according to huart->Init.WordLength value
Set PCE and PS bits according to huart->Init.Parity value
Set TE and RE bits according to huart->Init.Mode value
Set OVER8 bit according to huart->Init.OverSampling value */
tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
800591c: 687b ldr r3, [r7, #4]
800591e: 689a ldr r2, [r3, #8]
8005920: 687b ldr r3, [r7, #4]
8005922: 691b ldr r3, [r3, #16]
8005924: 431a orrs r2, r3
8005926: 687b ldr r3, [r7, #4]
8005928: 695b ldr r3, [r3, #20]
800592a: 431a orrs r2, r3
800592c: 687b ldr r3, [r7, #4]
800592e: 69db ldr r3, [r3, #28]
8005930: 4313 orrs r3, r2
8005932: 60fb str r3, [r7, #12]
MODIFY_REG(huart->Instance->CR1,
8005934: 687b ldr r3, [r7, #4]
8005936: 681b ldr r3, [r3, #0]
8005938: 68db ldr r3, [r3, #12]
800593a: f423 4316 bic.w r3, r3, #38400 ; 0x9600
800593e: f023 030c bic.w r3, r3, #12
8005942: 687a ldr r2, [r7, #4]
8005944: 6812 ldr r2, [r2, #0]
8005946: 68f9 ldr r1, [r7, #12]
8005948: 430b orrs r3, r1
800594a: 60d3 str r3, [r2, #12]
(uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
tmpreg);
/*-------------------------- USART CR3 Configuration -----------------------*/
/* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
800594c: 687b ldr r3, [r7, #4]
800594e: 681b ldr r3, [r3, #0]
8005950: 695b ldr r3, [r3, #20]
8005952: f423 7140 bic.w r1, r3, #768 ; 0x300
8005956: 687b ldr r3, [r7, #4]
8005958: 699a ldr r2, [r3, #24]
800595a: 687b ldr r3, [r7, #4]
800595c: 681b ldr r3, [r3, #0]
800595e: 430a orrs r2, r1
8005960: 615a str r2, [r3, #20]
/* Check the Over Sampling */
if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
8005962: 687b ldr r3, [r7, #4]
8005964: 69db ldr r3, [r3, #28]
8005966: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
800596a: f040 818b bne.w 8005c84 <UART_SetConfig+0x388>
{
pclk = HAL_RCC_GetPCLK2Freq();
huart->Instance->BRR = UART_BRR_SAMPLING8(pclk, huart->Init.BaudRate);
}
#elif defined(USART6)
if ((huart->Instance == USART1) || (huart->Instance == USART6))
800596e: 687b ldr r3, [r7, #4]
8005970: 681b ldr r3, [r3, #0]
8005972: 4ac1 ldr r2, [pc, #772] ; (8005c78 <UART_SetConfig+0x37c>)
8005974: 4293 cmp r3, r2
8005976: d005 beq.n 8005984 <UART_SetConfig+0x88>
8005978: 687b ldr r3, [r7, #4]
800597a: 681b ldr r3, [r3, #0]
800597c: 4abf ldr r2, [pc, #764] ; (8005c7c <UART_SetConfig+0x380>)
800597e: 4293 cmp r3, r2
8005980: f040 80bd bne.w 8005afe <UART_SetConfig+0x202>
{
pclk = HAL_RCC_GetPCLK2Freq();
8005984: f7ff fcc8 bl 8005318 <HAL_RCC_GetPCLK2Freq>
8005988: 60b8 str r0, [r7, #8]
huart->Instance->BRR = UART_BRR_SAMPLING8(pclk, huart->Init.BaudRate);
800598a: 68bb ldr r3, [r7, #8]
800598c: 461d mov r5, r3
800598e: f04f 0600 mov.w r6, #0
8005992: 46a8 mov r8, r5
8005994: 46b1 mov r9, r6
8005996: eb18 0308 adds.w r3, r8, r8
800599a: eb49 0409 adc.w r4, r9, r9
800599e: 4698 mov r8, r3
80059a0: 46a1 mov r9, r4
80059a2: eb18 0805 adds.w r8, r8, r5
80059a6: eb49 0906 adc.w r9, r9, r6
80059aa: f04f 0100 mov.w r1, #0
80059ae: f04f 0200 mov.w r2, #0
80059b2: ea4f 02c9 mov.w r2, r9, lsl #3
80059b6: ea42 7258 orr.w r2, r2, r8, lsr #29
80059ba: ea4f 01c8 mov.w r1, r8, lsl #3
80059be: 4688 mov r8, r1
80059c0: 4691 mov r9, r2
80059c2: eb18 0005 adds.w r0, r8, r5
80059c6: eb49 0106 adc.w r1, r9, r6
80059ca: 687b ldr r3, [r7, #4]
80059cc: 685b ldr r3, [r3, #4]
80059ce: 461d mov r5, r3
80059d0: f04f 0600 mov.w r6, #0
80059d4: 196b adds r3, r5, r5
80059d6: eb46 0406 adc.w r4, r6, r6
80059da: 461a mov r2, r3
80059dc: 4623 mov r3, r4
80059de: f7fa fc4f bl 8000280 <__aeabi_uldivmod>
80059e2: 4603 mov r3, r0
80059e4: 460c mov r4, r1
80059e6: 461a mov r2, r3
80059e8: 4ba5 ldr r3, [pc, #660] ; (8005c80 <UART_SetConfig+0x384>)
80059ea: fba3 2302 umull r2, r3, r3, r2
80059ee: 095b lsrs r3, r3, #5
80059f0: ea4f 1803 mov.w r8, r3, lsl #4
80059f4: 68bb ldr r3, [r7, #8]
80059f6: 461d mov r5, r3
80059f8: f04f 0600 mov.w r6, #0
80059fc: 46a9 mov r9, r5
80059fe: 46b2 mov sl, r6
8005a00: eb19 0309 adds.w r3, r9, r9
8005a04: eb4a 040a adc.w r4, sl, sl
8005a08: 4699 mov r9, r3
8005a0a: 46a2 mov sl, r4
8005a0c: eb19 0905 adds.w r9, r9, r5
8005a10: eb4a 0a06 adc.w sl, sl, r6
8005a14: f04f 0100 mov.w r1, #0
8005a18: f04f 0200 mov.w r2, #0
8005a1c: ea4f 02ca mov.w r2, sl, lsl #3
8005a20: ea42 7259 orr.w r2, r2, r9, lsr #29
8005a24: ea4f 01c9 mov.w r1, r9, lsl #3
8005a28: 4689 mov r9, r1
8005a2a: 4692 mov sl, r2
8005a2c: eb19 0005 adds.w r0, r9, r5
8005a30: eb4a 0106 adc.w r1, sl, r6
8005a34: 687b ldr r3, [r7, #4]
8005a36: 685b ldr r3, [r3, #4]
8005a38: 461d mov r5, r3
8005a3a: f04f 0600 mov.w r6, #0
8005a3e: 196b adds r3, r5, r5
8005a40: eb46 0406 adc.w r4, r6, r6
8005a44: 461a mov r2, r3
8005a46: 4623 mov r3, r4
8005a48: f7fa fc1a bl 8000280 <__aeabi_uldivmod>
8005a4c: 4603 mov r3, r0
8005a4e: 460c mov r4, r1
8005a50: 461a mov r2, r3
8005a52: 4b8b ldr r3, [pc, #556] ; (8005c80 <UART_SetConfig+0x384>)
8005a54: fba3 1302 umull r1, r3, r3, r2
8005a58: 095b lsrs r3, r3, #5
8005a5a: 2164 movs r1, #100 ; 0x64
8005a5c: fb01 f303 mul.w r3, r1, r3
8005a60: 1ad3 subs r3, r2, r3
8005a62: 00db lsls r3, r3, #3
8005a64: 3332 adds r3, #50 ; 0x32
8005a66: 4a86 ldr r2, [pc, #536] ; (8005c80 <UART_SetConfig+0x384>)
8005a68: fba2 2303 umull r2, r3, r2, r3
8005a6c: 095b lsrs r3, r3, #5
8005a6e: 005b lsls r3, r3, #1
8005a70: f403 73f8 and.w r3, r3, #496 ; 0x1f0
8005a74: 4498 add r8, r3
8005a76: 68bb ldr r3, [r7, #8]
8005a78: 461d mov r5, r3
8005a7a: f04f 0600 mov.w r6, #0
8005a7e: 46a9 mov r9, r5
8005a80: 46b2 mov sl, r6
8005a82: eb19 0309 adds.w r3, r9, r9
8005a86: eb4a 040a adc.w r4, sl, sl
8005a8a: 4699 mov r9, r3
8005a8c: 46a2 mov sl, r4
8005a8e: eb19 0905 adds.w r9, r9, r5
8005a92: eb4a 0a06 adc.w sl, sl, r6
8005a96: f04f 0100 mov.w r1, #0
8005a9a: f04f 0200 mov.w r2, #0
8005a9e: ea4f 02ca mov.w r2, sl, lsl #3
8005aa2: ea42 7259 orr.w r2, r2, r9, lsr #29
8005aa6: ea4f 01c9 mov.w r1, r9, lsl #3
8005aaa: 4689 mov r9, r1
8005aac: 4692 mov sl, r2
8005aae: eb19 0005 adds.w r0, r9, r5
8005ab2: eb4a 0106 adc.w r1, sl, r6
8005ab6: 687b ldr r3, [r7, #4]
8005ab8: 685b ldr r3, [r3, #4]
8005aba: 461d mov r5, r3
8005abc: f04f 0600 mov.w r6, #0
8005ac0: 196b adds r3, r5, r5
8005ac2: eb46 0406 adc.w r4, r6, r6
8005ac6: 461a mov r2, r3
8005ac8: 4623 mov r3, r4
8005aca: f7fa fbd9 bl 8000280 <__aeabi_uldivmod>
8005ace: 4603 mov r3, r0
8005ad0: 460c mov r4, r1
8005ad2: 461a mov r2, r3
8005ad4: 4b6a ldr r3, [pc, #424] ; (8005c80 <UART_SetConfig+0x384>)
8005ad6: fba3 1302 umull r1, r3, r3, r2
8005ada: 095b lsrs r3, r3, #5
8005adc: 2164 movs r1, #100 ; 0x64
8005ade: fb01 f303 mul.w r3, r1, r3
8005ae2: 1ad3 subs r3, r2, r3
8005ae4: 00db lsls r3, r3, #3
8005ae6: 3332 adds r3, #50 ; 0x32
8005ae8: 4a65 ldr r2, [pc, #404] ; (8005c80 <UART_SetConfig+0x384>)
8005aea: fba2 2303 umull r2, r3, r2, r3
8005aee: 095b lsrs r3, r3, #5
8005af0: f003 0207 and.w r2, r3, #7
8005af4: 687b ldr r3, [r7, #4]
8005af6: 681b ldr r3, [r3, #0]
8005af8: 4442 add r2, r8
8005afa: 609a str r2, [r3, #8]
8005afc: e26f b.n 8005fde <UART_SetConfig+0x6e2>
huart->Instance->BRR = UART_BRR_SAMPLING8(pclk, huart->Init.BaudRate);
}
#endif /* USART6 */
else
{
pclk = HAL_RCC_GetPCLK1Freq();
8005afe: f7ff fbf7 bl 80052f0 <HAL_RCC_GetPCLK1Freq>
8005b02: 60b8 str r0, [r7, #8]
huart->Instance->BRR = UART_BRR_SAMPLING8(pclk, huart->Init.BaudRate);
8005b04: 68bb ldr r3, [r7, #8]
8005b06: 461d mov r5, r3
8005b08: f04f 0600 mov.w r6, #0
8005b0c: 46a8 mov r8, r5
8005b0e: 46b1 mov r9, r6
8005b10: eb18 0308 adds.w r3, r8, r8
8005b14: eb49 0409 adc.w r4, r9, r9
8005b18: 4698 mov r8, r3
8005b1a: 46a1 mov r9, r4
8005b1c: eb18 0805 adds.w r8, r8, r5
8005b20: eb49 0906 adc.w r9, r9, r6
8005b24: f04f 0100 mov.w r1, #0
8005b28: f04f 0200 mov.w r2, #0
8005b2c: ea4f 02c9 mov.w r2, r9, lsl #3
8005b30: ea42 7258 orr.w r2, r2, r8, lsr #29
8005b34: ea4f 01c8 mov.w r1, r8, lsl #3
8005b38: 4688 mov r8, r1
8005b3a: 4691 mov r9, r2
8005b3c: eb18 0005 adds.w r0, r8, r5
8005b40: eb49 0106 adc.w r1, r9, r6
8005b44: 687b ldr r3, [r7, #4]
8005b46: 685b ldr r3, [r3, #4]
8005b48: 461d mov r5, r3
8005b4a: f04f 0600 mov.w r6, #0
8005b4e: 196b adds r3, r5, r5
8005b50: eb46 0406 adc.w r4, r6, r6
8005b54: 461a mov r2, r3
8005b56: 4623 mov r3, r4
8005b58: f7fa fb92 bl 8000280 <__aeabi_uldivmod>
8005b5c: 4603 mov r3, r0
8005b5e: 460c mov r4, r1
8005b60: 461a mov r2, r3
8005b62: 4b47 ldr r3, [pc, #284] ; (8005c80 <UART_SetConfig+0x384>)
8005b64: fba3 2302 umull r2, r3, r3, r2
8005b68: 095b lsrs r3, r3, #5
8005b6a: ea4f 1803 mov.w r8, r3, lsl #4
8005b6e: 68bb ldr r3, [r7, #8]
8005b70: 461d mov r5, r3
8005b72: f04f 0600 mov.w r6, #0
8005b76: 46a9 mov r9, r5
8005b78: 46b2 mov sl, r6
8005b7a: eb19 0309 adds.w r3, r9, r9
8005b7e: eb4a 040a adc.w r4, sl, sl
8005b82: 4699 mov r9, r3
8005b84: 46a2 mov sl, r4
8005b86: eb19 0905 adds.w r9, r9, r5
8005b8a: eb4a 0a06 adc.w sl, sl, r6
8005b8e: f04f 0100 mov.w r1, #0
8005b92: f04f 0200 mov.w r2, #0
8005b96: ea4f 02ca mov.w r2, sl, lsl #3
8005b9a: ea42 7259 orr.w r2, r2, r9, lsr #29
8005b9e: ea4f 01c9 mov.w r1, r9, lsl #3
8005ba2: 4689 mov r9, r1
8005ba4: 4692 mov sl, r2
8005ba6: eb19 0005 adds.w r0, r9, r5
8005baa: eb4a 0106 adc.w r1, sl, r6
8005bae: 687b ldr r3, [r7, #4]
8005bb0: 685b ldr r3, [r3, #4]
8005bb2: 461d mov r5, r3
8005bb4: f04f 0600 mov.w r6, #0
8005bb8: 196b adds r3, r5, r5
8005bba: eb46 0406 adc.w r4, r6, r6
8005bbe: 461a mov r2, r3
8005bc0: 4623 mov r3, r4
8005bc2: f7fa fb5d bl 8000280 <__aeabi_uldivmod>
8005bc6: 4603 mov r3, r0
8005bc8: 460c mov r4, r1
8005bca: 461a mov r2, r3
8005bcc: 4b2c ldr r3, [pc, #176] ; (8005c80 <UART_SetConfig+0x384>)
8005bce: fba3 1302 umull r1, r3, r3, r2
8005bd2: 095b lsrs r3, r3, #5
8005bd4: 2164 movs r1, #100 ; 0x64
8005bd6: fb01 f303 mul.w r3, r1, r3
8005bda: 1ad3 subs r3, r2, r3
8005bdc: 00db lsls r3, r3, #3
8005bde: 3332 adds r3, #50 ; 0x32
8005be0: 4a27 ldr r2, [pc, #156] ; (8005c80 <UART_SetConfig+0x384>)
8005be2: fba2 2303 umull r2, r3, r2, r3
8005be6: 095b lsrs r3, r3, #5
8005be8: 005b lsls r3, r3, #1
8005bea: f403 73f8 and.w r3, r3, #496 ; 0x1f0
8005bee: 4498 add r8, r3
8005bf0: 68bb ldr r3, [r7, #8]
8005bf2: 461d mov r5, r3
8005bf4: f04f 0600 mov.w r6, #0
8005bf8: 46a9 mov r9, r5
8005bfa: 46b2 mov sl, r6
8005bfc: eb19 0309 adds.w r3, r9, r9
8005c00: eb4a 040a adc.w r4, sl, sl
8005c04: 4699 mov r9, r3
8005c06: 46a2 mov sl, r4
8005c08: eb19 0905 adds.w r9, r9, r5
8005c0c: eb4a 0a06 adc.w sl, sl, r6
8005c10: f04f 0100 mov.w r1, #0
8005c14: f04f 0200 mov.w r2, #0
8005c18: ea4f 02ca mov.w r2, sl, lsl #3
8005c1c: ea42 7259 orr.w r2, r2, r9, lsr #29
8005c20: ea4f 01c9 mov.w r1, r9, lsl #3
8005c24: 4689 mov r9, r1
8005c26: 4692 mov sl, r2
8005c28: eb19 0005 adds.w r0, r9, r5
8005c2c: eb4a 0106 adc.w r1, sl, r6
8005c30: 687b ldr r3, [r7, #4]
8005c32: 685b ldr r3, [r3, #4]
8005c34: 461d mov r5, r3
8005c36: f04f 0600 mov.w r6, #0
8005c3a: 196b adds r3, r5, r5
8005c3c: eb46 0406 adc.w r4, r6, r6
8005c40: 461a mov r2, r3
8005c42: 4623 mov r3, r4
8005c44: f7fa fb1c bl 8000280 <__aeabi_uldivmod>
8005c48: 4603 mov r3, r0
8005c4a: 460c mov r4, r1
8005c4c: 461a mov r2, r3
8005c4e: 4b0c ldr r3, [pc, #48] ; (8005c80 <UART_SetConfig+0x384>)
8005c50: fba3 1302 umull r1, r3, r3, r2
8005c54: 095b lsrs r3, r3, #5
8005c56: 2164 movs r1, #100 ; 0x64
8005c58: fb01 f303 mul.w r3, r1, r3
8005c5c: 1ad3 subs r3, r2, r3
8005c5e: 00db lsls r3, r3, #3
8005c60: 3332 adds r3, #50 ; 0x32
8005c62: 4a07 ldr r2, [pc, #28] ; (8005c80 <UART_SetConfig+0x384>)
8005c64: fba2 2303 umull r2, r3, r2, r3
8005c68: 095b lsrs r3, r3, #5
8005c6a: f003 0207 and.w r2, r3, #7
8005c6e: 687b ldr r3, [r7, #4]
8005c70: 681b ldr r3, [r3, #0]
8005c72: 4442 add r2, r8
8005c74: 609a str r2, [r3, #8]
{
pclk = HAL_RCC_GetPCLK1Freq();
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
}
}
}
8005c76: e1b2 b.n 8005fde <UART_SetConfig+0x6e2>
8005c78: 40011000 .word 0x40011000
8005c7c: 40011400 .word 0x40011400
8005c80: 51eb851f .word 0x51eb851f
if ((huart->Instance == USART1) || (huart->Instance == USART6))
8005c84: 687b ldr r3, [r7, #4]
8005c86: 681b ldr r3, [r3, #0]
8005c88: 4ad7 ldr r2, [pc, #860] ; (8005fe8 <UART_SetConfig+0x6ec>)
8005c8a: 4293 cmp r3, r2
8005c8c: d005 beq.n 8005c9a <UART_SetConfig+0x39e>
8005c8e: 687b ldr r3, [r7, #4]
8005c90: 681b ldr r3, [r3, #0]
8005c92: 4ad6 ldr r2, [pc, #856] ; (8005fec <UART_SetConfig+0x6f0>)
8005c94: 4293 cmp r3, r2
8005c96: f040 80d1 bne.w 8005e3c <UART_SetConfig+0x540>
pclk = HAL_RCC_GetPCLK2Freq();
8005c9a: f7ff fb3d bl 8005318 <HAL_RCC_GetPCLK2Freq>
8005c9e: 60b8 str r0, [r7, #8]
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
8005ca0: 68bb ldr r3, [r7, #8]
8005ca2: 469a mov sl, r3
8005ca4: f04f 0b00 mov.w fp, #0
8005ca8: 46d0 mov r8, sl
8005caa: 46d9 mov r9, fp
8005cac: eb18 0308 adds.w r3, r8, r8
8005cb0: eb49 0409 adc.w r4, r9, r9
8005cb4: 4698 mov r8, r3
8005cb6: 46a1 mov r9, r4
8005cb8: eb18 080a adds.w r8, r8, sl
8005cbc: eb49 090b adc.w r9, r9, fp
8005cc0: f04f 0100 mov.w r1, #0
8005cc4: f04f 0200 mov.w r2, #0
8005cc8: ea4f 02c9 mov.w r2, r9, lsl #3
8005ccc: ea42 7258 orr.w r2, r2, r8, lsr #29
8005cd0: ea4f 01c8 mov.w r1, r8, lsl #3
8005cd4: 4688 mov r8, r1
8005cd6: 4691 mov r9, r2
8005cd8: eb1a 0508 adds.w r5, sl, r8
8005cdc: eb4b 0609 adc.w r6, fp, r9
8005ce0: 687b ldr r3, [r7, #4]
8005ce2: 685b ldr r3, [r3, #4]
8005ce4: 4619 mov r1, r3
8005ce6: f04f 0200 mov.w r2, #0
8005cea: f04f 0300 mov.w r3, #0
8005cee: f04f 0400 mov.w r4, #0
8005cf2: 0094 lsls r4, r2, #2
8005cf4: ea44 7491 orr.w r4, r4, r1, lsr #30
8005cf8: 008b lsls r3, r1, #2
8005cfa: 461a mov r2, r3
8005cfc: 4623 mov r3, r4
8005cfe: 4628 mov r0, r5
8005d00: 4631 mov r1, r6
8005d02: f7fa fabd bl 8000280 <__aeabi_uldivmod>
8005d06: 4603 mov r3, r0
8005d08: 460c mov r4, r1
8005d0a: 461a mov r2, r3
8005d0c: 4bb8 ldr r3, [pc, #736] ; (8005ff0 <UART_SetConfig+0x6f4>)
8005d0e: fba3 2302 umull r2, r3, r3, r2
8005d12: 095b lsrs r3, r3, #5
8005d14: ea4f 1803 mov.w r8, r3, lsl #4
8005d18: 68bb ldr r3, [r7, #8]
8005d1a: 469b mov fp, r3
8005d1c: f04f 0c00 mov.w ip, #0
8005d20: 46d9 mov r9, fp
8005d22: 46e2 mov sl, ip
8005d24: eb19 0309 adds.w r3, r9, r9
8005d28: eb4a 040a adc.w r4, sl, sl
8005d2c: 4699 mov r9, r3
8005d2e: 46a2 mov sl, r4
8005d30: eb19 090b adds.w r9, r9, fp
8005d34: eb4a 0a0c adc.w sl, sl, ip
8005d38: f04f 0100 mov.w r1, #0
8005d3c: f04f 0200 mov.w r2, #0
8005d40: ea4f 02ca mov.w r2, sl, lsl #3
8005d44: ea42 7259 orr.w r2, r2, r9, lsr #29
8005d48: ea4f 01c9 mov.w r1, r9, lsl #3
8005d4c: 4689 mov r9, r1
8005d4e: 4692 mov sl, r2
8005d50: eb1b 0509 adds.w r5, fp, r9
8005d54: eb4c 060a adc.w r6, ip, sl
8005d58: 687b ldr r3, [r7, #4]
8005d5a: 685b ldr r3, [r3, #4]
8005d5c: 4619 mov r1, r3
8005d5e: f04f 0200 mov.w r2, #0
8005d62: f04f 0300 mov.w r3, #0
8005d66: f04f 0400 mov.w r4, #0
8005d6a: 0094 lsls r4, r2, #2
8005d6c: ea44 7491 orr.w r4, r4, r1, lsr #30
8005d70: 008b lsls r3, r1, #2
8005d72: 461a mov r2, r3
8005d74: 4623 mov r3, r4
8005d76: 4628 mov r0, r5
8005d78: 4631 mov r1, r6
8005d7a: f7fa fa81 bl 8000280 <__aeabi_uldivmod>
8005d7e: 4603 mov r3, r0
8005d80: 460c mov r4, r1
8005d82: 461a mov r2, r3
8005d84: 4b9a ldr r3, [pc, #616] ; (8005ff0 <UART_SetConfig+0x6f4>)
8005d86: fba3 1302 umull r1, r3, r3, r2
8005d8a: 095b lsrs r3, r3, #5
8005d8c: 2164 movs r1, #100 ; 0x64
8005d8e: fb01 f303 mul.w r3, r1, r3
8005d92: 1ad3 subs r3, r2, r3
8005d94: 011b lsls r3, r3, #4
8005d96: 3332 adds r3, #50 ; 0x32
8005d98: 4a95 ldr r2, [pc, #596] ; (8005ff0 <UART_SetConfig+0x6f4>)
8005d9a: fba2 2303 umull r2, r3, r2, r3
8005d9e: 095b lsrs r3, r3, #5
8005da0: f003 03f0 and.w r3, r3, #240 ; 0xf0
8005da4: 4498 add r8, r3
8005da6: 68bb ldr r3, [r7, #8]
8005da8: 469b mov fp, r3
8005daa: f04f 0c00 mov.w ip, #0
8005dae: 46d9 mov r9, fp
8005db0: 46e2 mov sl, ip
8005db2: eb19 0309 adds.w r3, r9, r9
8005db6: eb4a 040a adc.w r4, sl, sl
8005dba: 4699 mov r9, r3
8005dbc: 46a2 mov sl, r4
8005dbe: eb19 090b adds.w r9, r9, fp
8005dc2: eb4a 0a0c adc.w sl, sl, ip
8005dc6: f04f 0100 mov.w r1, #0
8005dca: f04f 0200 mov.w r2, #0
8005dce: ea4f 02ca mov.w r2, sl, lsl #3
8005dd2: ea42 7259 orr.w r2, r2, r9, lsr #29
8005dd6: ea4f 01c9 mov.w r1, r9, lsl #3
8005dda: 4689 mov r9, r1
8005ddc: 4692 mov sl, r2
8005dde: eb1b 0509 adds.w r5, fp, r9
8005de2: eb4c 060a adc.w r6, ip, sl
8005de6: 687b ldr r3, [r7, #4]
8005de8: 685b ldr r3, [r3, #4]
8005dea: 4619 mov r1, r3
8005dec: f04f 0200 mov.w r2, #0
8005df0: f04f 0300 mov.w r3, #0
8005df4: f04f 0400 mov.w r4, #0
8005df8: 0094 lsls r4, r2, #2
8005dfa: ea44 7491 orr.w r4, r4, r1, lsr #30
8005dfe: 008b lsls r3, r1, #2
8005e00: 461a mov r2, r3
8005e02: 4623 mov r3, r4
8005e04: 4628 mov r0, r5
8005e06: 4631 mov r1, r6
8005e08: f7fa fa3a bl 8000280 <__aeabi_uldivmod>
8005e0c: 4603 mov r3, r0
8005e0e: 460c mov r4, r1
8005e10: 461a mov r2, r3
8005e12: 4b77 ldr r3, [pc, #476] ; (8005ff0 <UART_SetConfig+0x6f4>)
8005e14: fba3 1302 umull r1, r3, r3, r2
8005e18: 095b lsrs r3, r3, #5
8005e1a: 2164 movs r1, #100 ; 0x64
8005e1c: fb01 f303 mul.w r3, r1, r3
8005e20: 1ad3 subs r3, r2, r3
8005e22: 011b lsls r3, r3, #4
8005e24: 3332 adds r3, #50 ; 0x32
8005e26: 4a72 ldr r2, [pc, #456] ; (8005ff0 <UART_SetConfig+0x6f4>)
8005e28: fba2 2303 umull r2, r3, r2, r3
8005e2c: 095b lsrs r3, r3, #5
8005e2e: f003 020f and.w r2, r3, #15
8005e32: 687b ldr r3, [r7, #4]
8005e34: 681b ldr r3, [r3, #0]
8005e36: 4442 add r2, r8
8005e38: 609a str r2, [r3, #8]
8005e3a: e0d0 b.n 8005fde <UART_SetConfig+0x6e2>
pclk = HAL_RCC_GetPCLK1Freq();
8005e3c: f7ff fa58 bl 80052f0 <HAL_RCC_GetPCLK1Freq>
8005e40: 60b8 str r0, [r7, #8]
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
8005e42: 68bb ldr r3, [r7, #8]
8005e44: 469a mov sl, r3
8005e46: f04f 0b00 mov.w fp, #0
8005e4a: 46d0 mov r8, sl
8005e4c: 46d9 mov r9, fp
8005e4e: eb18 0308 adds.w r3, r8, r8
8005e52: eb49 0409 adc.w r4, r9, r9
8005e56: 4698 mov r8, r3
8005e58: 46a1 mov r9, r4
8005e5a: eb18 080a adds.w r8, r8, sl
8005e5e: eb49 090b adc.w r9, r9, fp
8005e62: f04f 0100 mov.w r1, #0
8005e66: f04f 0200 mov.w r2, #0
8005e6a: ea4f 02c9 mov.w r2, r9, lsl #3
8005e6e: ea42 7258 orr.w r2, r2, r8, lsr #29
8005e72: ea4f 01c8 mov.w r1, r8, lsl #3
8005e76: 4688 mov r8, r1
8005e78: 4691 mov r9, r2
8005e7a: eb1a 0508 adds.w r5, sl, r8
8005e7e: eb4b 0609 adc.w r6, fp, r9
8005e82: 687b ldr r3, [r7, #4]
8005e84: 685b ldr r3, [r3, #4]
8005e86: 4619 mov r1, r3
8005e88: f04f 0200 mov.w r2, #0
8005e8c: f04f 0300 mov.w r3, #0
8005e90: f04f 0400 mov.w r4, #0
8005e94: 0094 lsls r4, r2, #2
8005e96: ea44 7491 orr.w r4, r4, r1, lsr #30
8005e9a: 008b lsls r3, r1, #2
8005e9c: 461a mov r2, r3
8005e9e: 4623 mov r3, r4
8005ea0: 4628 mov r0, r5
8005ea2: 4631 mov r1, r6
8005ea4: f7fa f9ec bl 8000280 <__aeabi_uldivmod>
8005ea8: 4603 mov r3, r0
8005eaa: 460c mov r4, r1
8005eac: 461a mov r2, r3
8005eae: 4b50 ldr r3, [pc, #320] ; (8005ff0 <UART_SetConfig+0x6f4>)
8005eb0: fba3 2302 umull r2, r3, r3, r2
8005eb4: 095b lsrs r3, r3, #5
8005eb6: ea4f 1803 mov.w r8, r3, lsl #4
8005eba: 68bb ldr r3, [r7, #8]
8005ebc: 469b mov fp, r3
8005ebe: f04f 0c00 mov.w ip, #0
8005ec2: 46d9 mov r9, fp
8005ec4: 46e2 mov sl, ip
8005ec6: eb19 0309 adds.w r3, r9, r9
8005eca: eb4a 040a adc.w r4, sl, sl
8005ece: 4699 mov r9, r3
8005ed0: 46a2 mov sl, r4
8005ed2: eb19 090b adds.w r9, r9, fp
8005ed6: eb4a 0a0c adc.w sl, sl, ip
8005eda: f04f 0100 mov.w r1, #0
8005ede: f04f 0200 mov.w r2, #0
8005ee2: ea4f 02ca mov.w r2, sl, lsl #3
8005ee6: ea42 7259 orr.w r2, r2, r9, lsr #29
8005eea: ea4f 01c9 mov.w r1, r9, lsl #3
8005eee: 4689 mov r9, r1
8005ef0: 4692 mov sl, r2
8005ef2: eb1b 0509 adds.w r5, fp, r9
8005ef6: eb4c 060a adc.w r6, ip, sl
8005efa: 687b ldr r3, [r7, #4]
8005efc: 685b ldr r3, [r3, #4]
8005efe: 4619 mov r1, r3
8005f00: f04f 0200 mov.w r2, #0
8005f04: f04f 0300 mov.w r3, #0
8005f08: f04f 0400 mov.w r4, #0
8005f0c: 0094 lsls r4, r2, #2
8005f0e: ea44 7491 orr.w r4, r4, r1, lsr #30
8005f12: 008b lsls r3, r1, #2
8005f14: 461a mov r2, r3
8005f16: 4623 mov r3, r4
8005f18: 4628 mov r0, r5
8005f1a: 4631 mov r1, r6
8005f1c: f7fa f9b0 bl 8000280 <__aeabi_uldivmod>
8005f20: 4603 mov r3, r0
8005f22: 460c mov r4, r1
8005f24: 461a mov r2, r3
8005f26: 4b32 ldr r3, [pc, #200] ; (8005ff0 <UART_SetConfig+0x6f4>)
8005f28: fba3 1302 umull r1, r3, r3, r2
8005f2c: 095b lsrs r3, r3, #5
8005f2e: 2164 movs r1, #100 ; 0x64
8005f30: fb01 f303 mul.w r3, r1, r3
8005f34: 1ad3 subs r3, r2, r3
8005f36: 011b lsls r3, r3, #4
8005f38: 3332 adds r3, #50 ; 0x32
8005f3a: 4a2d ldr r2, [pc, #180] ; (8005ff0 <UART_SetConfig+0x6f4>)
8005f3c: fba2 2303 umull r2, r3, r2, r3
8005f40: 095b lsrs r3, r3, #5
8005f42: f003 03f0 and.w r3, r3, #240 ; 0xf0
8005f46: 4498 add r8, r3
8005f48: 68bb ldr r3, [r7, #8]
8005f4a: 469b mov fp, r3
8005f4c: f04f 0c00 mov.w ip, #0
8005f50: 46d9 mov r9, fp
8005f52: 46e2 mov sl, ip
8005f54: eb19 0309 adds.w r3, r9, r9
8005f58: eb4a 040a adc.w r4, sl, sl
8005f5c: 4699 mov r9, r3
8005f5e: 46a2 mov sl, r4
8005f60: eb19 090b adds.w r9, r9, fp
8005f64: eb4a 0a0c adc.w sl, sl, ip
8005f68: f04f 0100 mov.w r1, #0
8005f6c: f04f 0200 mov.w r2, #0
8005f70: ea4f 02ca mov.w r2, sl, lsl #3
8005f74: ea42 7259 orr.w r2, r2, r9, lsr #29
8005f78: ea4f 01c9 mov.w r1, r9, lsl #3
8005f7c: 4689 mov r9, r1
8005f7e: 4692 mov sl, r2
8005f80: eb1b 0509 adds.w r5, fp, r9
8005f84: eb4c 060a adc.w r6, ip, sl
8005f88: 687b ldr r3, [r7, #4]
8005f8a: 685b ldr r3, [r3, #4]
8005f8c: 4619 mov r1, r3
8005f8e: f04f 0200 mov.w r2, #0
8005f92: f04f 0300 mov.w r3, #0
8005f96: f04f 0400 mov.w r4, #0
8005f9a: 0094 lsls r4, r2, #2
8005f9c: ea44 7491 orr.w r4, r4, r1, lsr #30
8005fa0: 008b lsls r3, r1, #2
8005fa2: 461a mov r2, r3
8005fa4: 4623 mov r3, r4
8005fa6: 4628 mov r0, r5
8005fa8: 4631 mov r1, r6
8005faa: f7fa f969 bl 8000280 <__aeabi_uldivmod>
8005fae: 4603 mov r3, r0
8005fb0: 460c mov r4, r1
8005fb2: 461a mov r2, r3
8005fb4: 4b0e ldr r3, [pc, #56] ; (8005ff0 <UART_SetConfig+0x6f4>)
8005fb6: fba3 1302 umull r1, r3, r3, r2
8005fba: 095b lsrs r3, r3, #5
8005fbc: 2164 movs r1, #100 ; 0x64
8005fbe: fb01 f303 mul.w r3, r1, r3
8005fc2: 1ad3 subs r3, r2, r3
8005fc4: 011b lsls r3, r3, #4
8005fc6: 3332 adds r3, #50 ; 0x32
8005fc8: 4a09 ldr r2, [pc, #36] ; (8005ff0 <UART_SetConfig+0x6f4>)
8005fca: fba2 2303 umull r2, r3, r2, r3
8005fce: 095b lsrs r3, r3, #5
8005fd0: f003 020f and.w r2, r3, #15
8005fd4: 687b ldr r3, [r7, #4]
8005fd6: 681b ldr r3, [r3, #0]
8005fd8: 4442 add r2, r8
8005fda: 609a str r2, [r3, #8]
}
8005fdc: e7ff b.n 8005fde <UART_SetConfig+0x6e2>
8005fde: bf00 nop
8005fe0: 3714 adds r7, #20
8005fe2: 46bd mov sp, r7
8005fe4: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
8005fe8: 40011000 .word 0x40011000
8005fec: 40011400 .word 0x40011400
8005ff0: 51eb851f .word 0x51eb851f
08005ff4 <USB_CoreInit>:
* @param cfg pointer to a USB_OTG_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef USB_CoreInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg)
{
8005ff4: b084 sub sp, #16
8005ff6: b580 push {r7, lr}
8005ff8: b084 sub sp, #16
8005ffa: af00 add r7, sp, #0
8005ffc: 6078 str r0, [r7, #4]
8005ffe: f107 001c add.w r0, r7, #28
8006002: e880 000e stmia.w r0, {r1, r2, r3}
HAL_StatusTypeDef ret;
if (cfg.phy_itface == USB_OTG_ULPI_PHY)
8006006: 6b3b ldr r3, [r7, #48] ; 0x30
8006008: 2b01 cmp r3, #1
800600a: d122 bne.n 8006052 <USB_CoreInit+0x5e>
{
USBx->GCCFG &= ~(USB_OTG_GCCFG_PWRDWN);
800600c: 687b ldr r3, [r7, #4]
800600e: 6b9b ldr r3, [r3, #56] ; 0x38
8006010: f423 3280 bic.w r2, r3, #65536 ; 0x10000
8006014: 687b ldr r3, [r7, #4]
8006016: 639a str r2, [r3, #56] ; 0x38
/* Init The ULPI Interface */
USBx->GUSBCFG &= ~(USB_OTG_GUSBCFG_TSDPS | USB_OTG_GUSBCFG_ULPIFSLS | USB_OTG_GUSBCFG_PHYSEL);
8006018: 687b ldr r3, [r7, #4]
800601a: 68db ldr r3, [r3, #12]
800601c: f423 0384 bic.w r3, r3, #4325376 ; 0x420000
8006020: f023 0340 bic.w r3, r3, #64 ; 0x40
8006024: 687a ldr r2, [r7, #4]
8006026: 60d3 str r3, [r2, #12]
/* Select vbus source */
USBx->GUSBCFG &= ~(USB_OTG_GUSBCFG_ULPIEVBUSD | USB_OTG_GUSBCFG_ULPIEVBUSI);
8006028: 687b ldr r3, [r7, #4]
800602a: 68db ldr r3, [r3, #12]
800602c: f423 1240 bic.w r2, r3, #3145728 ; 0x300000
8006030: 687b ldr r3, [r7, #4]
8006032: 60da str r2, [r3, #12]
if (cfg.use_external_vbus == 1U)
8006034: 6cfb ldr r3, [r7, #76] ; 0x4c
8006036: 2b01 cmp r3, #1
8006038: d105 bne.n 8006046 <USB_CoreInit+0x52>
{
USBx->GUSBCFG |= USB_OTG_GUSBCFG_ULPIEVBUSD;
800603a: 687b ldr r3, [r7, #4]
800603c: 68db ldr r3, [r3, #12]
800603e: f443 1280 orr.w r2, r3, #1048576 ; 0x100000
8006042: 687b ldr r3, [r7, #4]
8006044: 60da str r2, [r3, #12]
}
/* Reset after a PHY select */
ret = USB_CoreReset(USBx);
8006046: 6878 ldr r0, [r7, #4]
8006048: f000 f94a bl 80062e0 <USB_CoreReset>
800604c: 4603 mov r3, r0
800604e: 73fb strb r3, [r7, #15]
8006050: e01a b.n 8006088 <USB_CoreInit+0x94>
}
else /* FS interface (embedded Phy) */
{
/* Select FS Embedded PHY */
USBx->GUSBCFG |= USB_OTG_GUSBCFG_PHYSEL;
8006052: 687b ldr r3, [r7, #4]
8006054: 68db ldr r3, [r3, #12]
8006056: f043 0240 orr.w r2, r3, #64 ; 0x40
800605a: 687b ldr r3, [r7, #4]
800605c: 60da str r2, [r3, #12]
/* Reset after a PHY select */
ret = USB_CoreReset(USBx);
800605e: 6878 ldr r0, [r7, #4]
8006060: f000 f93e bl 80062e0 <USB_CoreReset>
8006064: 4603 mov r3, r0
8006066: 73fb strb r3, [r7, #15]
if (cfg.battery_charging_enable == 0U)
8006068: 6c3b ldr r3, [r7, #64] ; 0x40
800606a: 2b00 cmp r3, #0
800606c: d106 bne.n 800607c <USB_CoreInit+0x88>
{
/* Activate the USB Transceiver */
USBx->GCCFG |= USB_OTG_GCCFG_PWRDWN;
800606e: 687b ldr r3, [r7, #4]
8006070: 6b9b ldr r3, [r3, #56] ; 0x38
8006072: f443 3280 orr.w r2, r3, #65536 ; 0x10000
8006076: 687b ldr r3, [r7, #4]
8006078: 639a str r2, [r3, #56] ; 0x38
800607a: e005 b.n 8006088 <USB_CoreInit+0x94>
}
else
{
/* Deactivate the USB Transceiver */
USBx->GCCFG &= ~(USB_OTG_GCCFG_PWRDWN);
800607c: 687b ldr r3, [r7, #4]
800607e: 6b9b ldr r3, [r3, #56] ; 0x38
8006080: f423 3280 bic.w r2, r3, #65536 ; 0x10000
8006084: 687b ldr r3, [r7, #4]
8006086: 639a str r2, [r3, #56] ; 0x38
}
}
if (cfg.dma_enable == 1U)
8006088: 6abb ldr r3, [r7, #40] ; 0x28
800608a: 2b01 cmp r3, #1
800608c: d10b bne.n 80060a6 <USB_CoreInit+0xb2>
{
USBx->GAHBCFG |= USB_OTG_GAHBCFG_HBSTLEN_2;
800608e: 687b ldr r3, [r7, #4]
8006090: 689b ldr r3, [r3, #8]
8006092: f043 0206 orr.w r2, r3, #6
8006096: 687b ldr r3, [r7, #4]
8006098: 609a str r2, [r3, #8]
USBx->GAHBCFG |= USB_OTG_GAHBCFG_DMAEN;
800609a: 687b ldr r3, [r7, #4]
800609c: 689b ldr r3, [r3, #8]
800609e: f043 0220 orr.w r2, r3, #32
80060a2: 687b ldr r3, [r7, #4]
80060a4: 609a str r2, [r3, #8]
}
return ret;
80060a6: 7bfb ldrb r3, [r7, #15]
}
80060a8: 4618 mov r0, r3
80060aa: 3710 adds r7, #16
80060ac: 46bd mov sp, r7
80060ae: e8bd 4080 ldmia.w sp!, {r7, lr}
80060b2: b004 add sp, #16
80060b4: 4770 bx lr
080060b6 <USB_EnableGlobalInt>:
* Enables the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_EnableGlobalInt(USB_OTG_GlobalTypeDef *USBx)
{
80060b6: b480 push {r7}
80060b8: b083 sub sp, #12
80060ba: af00 add r7, sp, #0
80060bc: 6078 str r0, [r7, #4]
USBx->GAHBCFG |= USB_OTG_GAHBCFG_GINT;
80060be: 687b ldr r3, [r7, #4]
80060c0: 689b ldr r3, [r3, #8]
80060c2: f043 0201 orr.w r2, r3, #1
80060c6: 687b ldr r3, [r7, #4]
80060c8: 609a str r2, [r3, #8]
return HAL_OK;
80060ca: 2300 movs r3, #0
}
80060cc: 4618 mov r0, r3
80060ce: 370c adds r7, #12
80060d0: 46bd mov sp, r7
80060d2: f85d 7b04 ldr.w r7, [sp], #4
80060d6: 4770 bx lr
080060d8 <USB_DisableGlobalInt>:
* Disable the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx)
{
80060d8: b480 push {r7}
80060da: b083 sub sp, #12
80060dc: af00 add r7, sp, #0
80060de: 6078 str r0, [r7, #4]
USBx->GAHBCFG &= ~USB_OTG_GAHBCFG_GINT;
80060e0: 687b ldr r3, [r7, #4]
80060e2: 689b ldr r3, [r3, #8]
80060e4: f023 0201 bic.w r2, r3, #1
80060e8: 687b ldr r3, [r7, #4]
80060ea: 609a str r2, [r3, #8]
return HAL_OK;
80060ec: 2300 movs r3, #0
}
80060ee: 4618 mov r0, r3
80060f0: 370c adds r7, #12
80060f2: 46bd mov sp, r7
80060f4: f85d 7b04 ldr.w r7, [sp], #4
80060f8: 4770 bx lr
080060fa <USB_SetCurrentMode>:
* @arg USB_DEVICE_MODE Peripheral mode
* @arg USB_HOST_MODE Host mode
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx, USB_OTG_ModeTypeDef mode)
{
80060fa: b580 push {r7, lr}
80060fc: b082 sub sp, #8
80060fe: af00 add r7, sp, #0
8006100: 6078 str r0, [r7, #4]
8006102: 460b mov r3, r1
8006104: 70fb strb r3, [r7, #3]
USBx->GUSBCFG &= ~(USB_OTG_GUSBCFG_FHMOD | USB_OTG_GUSBCFG_FDMOD);
8006106: 687b ldr r3, [r7, #4]
8006108: 68db ldr r3, [r3, #12]
800610a: f023 42c0 bic.w r2, r3, #1610612736 ; 0x60000000
800610e: 687b ldr r3, [r7, #4]
8006110: 60da str r2, [r3, #12]
if (mode == USB_HOST_MODE)
8006112: 78fb ldrb r3, [r7, #3]
8006114: 2b01 cmp r3, #1
8006116: d106 bne.n 8006126 <USB_SetCurrentMode+0x2c>
{
USBx->GUSBCFG |= USB_OTG_GUSBCFG_FHMOD;
8006118: 687b ldr r3, [r7, #4]
800611a: 68db ldr r3, [r3, #12]
800611c: f043 5200 orr.w r2, r3, #536870912 ; 0x20000000
8006120: 687b ldr r3, [r7, #4]
8006122: 60da str r2, [r3, #12]
8006124: e00b b.n 800613e <USB_SetCurrentMode+0x44>
}
else if (mode == USB_DEVICE_MODE)
8006126: 78fb ldrb r3, [r7, #3]
8006128: 2b00 cmp r3, #0
800612a: d106 bne.n 800613a <USB_SetCurrentMode+0x40>
{
USBx->GUSBCFG |= USB_OTG_GUSBCFG_FDMOD;
800612c: 687b ldr r3, [r7, #4]
800612e: 68db ldr r3, [r3, #12]
8006130: f043 4280 orr.w r2, r3, #1073741824 ; 0x40000000
8006134: 687b ldr r3, [r7, #4]
8006136: 60da str r2, [r3, #12]
8006138: e001 b.n 800613e <USB_SetCurrentMode+0x44>
}
else
{
return HAL_ERROR;
800613a: 2301 movs r3, #1
800613c: e003 b.n 8006146 <USB_SetCurrentMode+0x4c>
}
HAL_Delay(50U);
800613e: 2032 movs r0, #50 ; 0x32
8006140: f7fb f896 bl 8001270 <HAL_Delay>
return HAL_OK;
8006144: 2300 movs r3, #0
}
8006146: 4618 mov r0, r3
8006148: 3708 adds r7, #8
800614a: 46bd mov sp, r7
800614c: bd80 pop {r7, pc}
...
08006150 <USB_FlushTxFifo>:
* This parameter can be a value from 1 to 15
15 means Flush all Tx FIFOs
* @retval HAL status
*/
HAL_StatusTypeDef USB_FlushTxFifo(USB_OTG_GlobalTypeDef *USBx, uint32_t num)
{
8006150: b480 push {r7}
8006152: b085 sub sp, #20
8006154: af00 add r7, sp, #0
8006156: 6078 str r0, [r7, #4]
8006158: 6039 str r1, [r7, #0]
uint32_t count = 0U;
800615a: 2300 movs r3, #0
800615c: 60fb str r3, [r7, #12]
USBx->GRSTCTL = (USB_OTG_GRSTCTL_TXFFLSH | (num << 6));
800615e: 683b ldr r3, [r7, #0]
8006160: 019b lsls r3, r3, #6
8006162: f043 0220 orr.w r2, r3, #32
8006166: 687b ldr r3, [r7, #4]
8006168: 611a str r2, [r3, #16]
do
{
if (++count > 200000U)
800616a: 68fb ldr r3, [r7, #12]
800616c: 3301 adds r3, #1
800616e: 60fb str r3, [r7, #12]
8006170: 68fb ldr r3, [r7, #12]
8006172: 4a09 ldr r2, [pc, #36] ; (8006198 <USB_FlushTxFifo+0x48>)
8006174: 4293 cmp r3, r2
8006176: d901 bls.n 800617c <USB_FlushTxFifo+0x2c>
{
return HAL_TIMEOUT;
8006178: 2303 movs r3, #3
800617a: e006 b.n 800618a <USB_FlushTxFifo+0x3a>
}
} while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_TXFFLSH) == USB_OTG_GRSTCTL_TXFFLSH);
800617c: 687b ldr r3, [r7, #4]
800617e: 691b ldr r3, [r3, #16]
8006180: f003 0320 and.w r3, r3, #32
8006184: 2b20 cmp r3, #32
8006186: d0f0 beq.n 800616a <USB_FlushTxFifo+0x1a>
return HAL_OK;
8006188: 2300 movs r3, #0
}
800618a: 4618 mov r0, r3
800618c: 3714 adds r7, #20
800618e: 46bd mov sp, r7
8006190: f85d 7b04 ldr.w r7, [sp], #4
8006194: 4770 bx lr
8006196: bf00 nop
8006198: 00030d40 .word 0x00030d40
0800619c <USB_FlushRxFifo>:
* @brief USB_FlushRxFifo : Flush Rx FIFO
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_FlushRxFifo(USB_OTG_GlobalTypeDef *USBx)
{
800619c: b480 push {r7}
800619e: b085 sub sp, #20
80061a0: af00 add r7, sp, #0
80061a2: 6078 str r0, [r7, #4]
uint32_t count = 0;
80061a4: 2300 movs r3, #0
80061a6: 60fb str r3, [r7, #12]
USBx->GRSTCTL = USB_OTG_GRSTCTL_RXFFLSH;
80061a8: 687b ldr r3, [r7, #4]
80061aa: 2210 movs r2, #16
80061ac: 611a str r2, [r3, #16]
do
{
if (++count > 200000U)
80061ae: 68fb ldr r3, [r7, #12]
80061b0: 3301 adds r3, #1
80061b2: 60fb str r3, [r7, #12]
80061b4: 68fb ldr r3, [r7, #12]
80061b6: 4a09 ldr r2, [pc, #36] ; (80061dc <USB_FlushRxFifo+0x40>)
80061b8: 4293 cmp r3, r2
80061ba: d901 bls.n 80061c0 <USB_FlushRxFifo+0x24>
{
return HAL_TIMEOUT;
80061bc: 2303 movs r3, #3
80061be: e006 b.n 80061ce <USB_FlushRxFifo+0x32>
}
} while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_RXFFLSH) == USB_OTG_GRSTCTL_RXFFLSH);
80061c0: 687b ldr r3, [r7, #4]
80061c2: 691b ldr r3, [r3, #16]
80061c4: f003 0310 and.w r3, r3, #16
80061c8: 2b10 cmp r3, #16
80061ca: d0f0 beq.n 80061ae <USB_FlushRxFifo+0x12>
return HAL_OK;
80061cc: 2300 movs r3, #0
}
80061ce: 4618 mov r0, r3
80061d0: 3714 adds r7, #20
80061d2: 46bd mov sp, r7
80061d4: f85d 7b04 ldr.w r7, [sp], #4
80061d8: 4770 bx lr
80061da: bf00 nop
80061dc: 00030d40 .word 0x00030d40
080061e0 <USB_WritePacket>:
* 1 : DMA feature used
* @retval HAL status
*/
HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src,
uint8_t ch_ep_num, uint16_t len, uint8_t dma)
{
80061e0: b480 push {r7}
80061e2: b089 sub sp, #36 ; 0x24
80061e4: af00 add r7, sp, #0
80061e6: 60f8 str r0, [r7, #12]
80061e8: 60b9 str r1, [r7, #8]
80061ea: 4611 mov r1, r2
80061ec: 461a mov r2, r3
80061ee: 460b mov r3, r1
80061f0: 71fb strb r3, [r7, #7]
80061f2: 4613 mov r3, r2
80061f4: 80bb strh r3, [r7, #4]
uint32_t USBx_BASE = (uint32_t)USBx;
80061f6: 68fb ldr r3, [r7, #12]
80061f8: 617b str r3, [r7, #20]
uint32_t *pSrc = (uint32_t *)src;
80061fa: 68bb ldr r3, [r7, #8]
80061fc: 61fb str r3, [r7, #28]
uint32_t count32b, i;
if (dma == 0U)
80061fe: f897 3028 ldrb.w r3, [r7, #40] ; 0x28
8006202: 2b00 cmp r3, #0
8006204: d11a bne.n 800623c <USB_WritePacket+0x5c>
{
count32b = ((uint32_t)len + 3U) / 4U;
8006206: 88bb ldrh r3, [r7, #4]
8006208: 3303 adds r3, #3
800620a: 089b lsrs r3, r3, #2
800620c: 613b str r3, [r7, #16]
for (i = 0U; i < count32b; i++)
800620e: 2300 movs r3, #0
8006210: 61bb str r3, [r7, #24]
8006212: e00f b.n 8006234 <USB_WritePacket+0x54>
{
USBx_DFIFO((uint32_t)ch_ep_num) = __UNALIGNED_UINT32_READ(pSrc);
8006214: 79fb ldrb r3, [r7, #7]
8006216: 031a lsls r2, r3, #12
8006218: 697b ldr r3, [r7, #20]
800621a: 4413 add r3, r2
800621c: f503 5380 add.w r3, r3, #4096 ; 0x1000
8006220: 461a mov r2, r3
8006222: 69fb ldr r3, [r7, #28]
8006224: 681b ldr r3, [r3, #0]
8006226: 6013 str r3, [r2, #0]
pSrc++;
8006228: 69fb ldr r3, [r7, #28]
800622a: 3304 adds r3, #4
800622c: 61fb str r3, [r7, #28]
for (i = 0U; i < count32b; i++)
800622e: 69bb ldr r3, [r7, #24]
8006230: 3301 adds r3, #1
8006232: 61bb str r3, [r7, #24]
8006234: 69ba ldr r2, [r7, #24]
8006236: 693b ldr r3, [r7, #16]
8006238: 429a cmp r2, r3
800623a: d3eb bcc.n 8006214 <USB_WritePacket+0x34>
}
}
return HAL_OK;
800623c: 2300 movs r3, #0
}
800623e: 4618 mov r0, r3
8006240: 3724 adds r7, #36 ; 0x24
8006242: 46bd mov sp, r7
8006244: f85d 7b04 ldr.w r7, [sp], #4
8006248: 4770 bx lr
0800624a <USB_ReadPacket>:
* @param dest source pointer
* @param len Number of bytes to read
* @retval pointer to destination buffer
*/
void *USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len)
{
800624a: b480 push {r7}
800624c: b089 sub sp, #36 ; 0x24
800624e: af00 add r7, sp, #0
8006250: 60f8 str r0, [r7, #12]
8006252: 60b9 str r1, [r7, #8]
8006254: 4613 mov r3, r2
8006256: 80fb strh r3, [r7, #6]
uint32_t USBx_BASE = (uint32_t)USBx;
8006258: 68fb ldr r3, [r7, #12]
800625a: 617b str r3, [r7, #20]
uint32_t *pDest = (uint32_t *)dest;
800625c: 68bb ldr r3, [r7, #8]
800625e: 61fb str r3, [r7, #28]
uint32_t i;
uint32_t count32b = ((uint32_t)len + 3U) / 4U;
8006260: 88fb ldrh r3, [r7, #6]
8006262: 3303 adds r3, #3
8006264: 089b lsrs r3, r3, #2
8006266: 613b str r3, [r7, #16]
for (i = 0U; i < count32b; i++)
8006268: 2300 movs r3, #0
800626a: 61bb str r3, [r7, #24]
800626c: e00b b.n 8006286 <USB_ReadPacket+0x3c>
{
__UNALIGNED_UINT32_WRITE(pDest, USBx_DFIFO(0U));
800626e: 697b ldr r3, [r7, #20]
8006270: f503 5380 add.w r3, r3, #4096 ; 0x1000
8006274: 681a ldr r2, [r3, #0]
8006276: 69fb ldr r3, [r7, #28]
8006278: 601a str r2, [r3, #0]
pDest++;
800627a: 69fb ldr r3, [r7, #28]
800627c: 3304 adds r3, #4
800627e: 61fb str r3, [r7, #28]
for (i = 0U; i < count32b; i++)
8006280: 69bb ldr r3, [r7, #24]
8006282: 3301 adds r3, #1
8006284: 61bb str r3, [r7, #24]
8006286: 69ba ldr r2, [r7, #24]
8006288: 693b ldr r3, [r7, #16]
800628a: 429a cmp r2, r3
800628c: d3ef bcc.n 800626e <USB_ReadPacket+0x24>
}
return ((void *)pDest);
800628e: 69fb ldr r3, [r7, #28]
}
8006290: 4618 mov r0, r3
8006292: 3724 adds r7, #36 ; 0x24
8006294: 46bd mov sp, r7
8006296: f85d 7b04 ldr.w r7, [sp], #4
800629a: 4770 bx lr
0800629c <USB_ReadInterrupts>:
* @brief USB_ReadInterrupts: return the global USB interrupt status
* @param USBx Selected device
* @retval HAL status
*/
uint32_t USB_ReadInterrupts(USB_OTG_GlobalTypeDef *USBx)
{
800629c: b480 push {r7}
800629e: b085 sub sp, #20
80062a0: af00 add r7, sp, #0
80062a2: 6078 str r0, [r7, #4]
uint32_t tmpreg;
tmpreg = USBx->GINTSTS;
80062a4: 687b ldr r3, [r7, #4]
80062a6: 695b ldr r3, [r3, #20]
80062a8: 60fb str r3, [r7, #12]
tmpreg &= USBx->GINTMSK;
80062aa: 687b ldr r3, [r7, #4]
80062ac: 699b ldr r3, [r3, #24]
80062ae: 68fa ldr r2, [r7, #12]
80062b0: 4013 ands r3, r2
80062b2: 60fb str r3, [r7, #12]
return tmpreg;
80062b4: 68fb ldr r3, [r7, #12]
}
80062b6: 4618 mov r0, r3
80062b8: 3714 adds r7, #20
80062ba: 46bd mov sp, r7
80062bc: f85d 7b04 ldr.w r7, [sp], #4
80062c0: 4770 bx lr
080062c2 <USB_GetMode>:
* This parameter can be one of these values:
* 0 : Host
* 1 : Device
*/
uint32_t USB_GetMode(USB_OTG_GlobalTypeDef *USBx)
{
80062c2: b480 push {r7}
80062c4: b083 sub sp, #12
80062c6: af00 add r7, sp, #0
80062c8: 6078 str r0, [r7, #4]
return ((USBx->GINTSTS) & 0x1U);
80062ca: 687b ldr r3, [r7, #4]
80062cc: 695b ldr r3, [r3, #20]
80062ce: f003 0301 and.w r3, r3, #1
}
80062d2: 4618 mov r0, r3
80062d4: 370c adds r7, #12
80062d6: 46bd mov sp, r7
80062d8: f85d 7b04 ldr.w r7, [sp], #4
80062dc: 4770 bx lr
...
080062e0 <USB_CoreReset>:
* @brief Reset the USB Core (needed after USB clock settings change)
* @param USBx Selected device
* @retval HAL status
*/
static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx)
{
80062e0: b480 push {r7}
80062e2: b085 sub sp, #20
80062e4: af00 add r7, sp, #0
80062e6: 6078 str r0, [r7, #4]
uint32_t count = 0U;
80062e8: 2300 movs r3, #0
80062ea: 60fb str r3, [r7, #12]
/* Wait for AHB master IDLE state. */
do
{
if (++count > 200000U)
80062ec: 68fb ldr r3, [r7, #12]
80062ee: 3301 adds r3, #1
80062f0: 60fb str r3, [r7, #12]
80062f2: 68fb ldr r3, [r7, #12]
80062f4: 4a13 ldr r2, [pc, #76] ; (8006344 <USB_CoreReset+0x64>)
80062f6: 4293 cmp r3, r2
80062f8: d901 bls.n 80062fe <USB_CoreReset+0x1e>
{
return HAL_TIMEOUT;
80062fa: 2303 movs r3, #3
80062fc: e01b b.n 8006336 <USB_CoreReset+0x56>
}
} while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0U);
80062fe: 687b ldr r3, [r7, #4]
8006300: 691b ldr r3, [r3, #16]
8006302: 2b00 cmp r3, #0
8006304: daf2 bge.n 80062ec <USB_CoreReset+0xc>
/* Core Soft Reset */
count = 0U;
8006306: 2300 movs r3, #0
8006308: 60fb str r3, [r7, #12]
USBx->GRSTCTL |= USB_OTG_GRSTCTL_CSRST;
800630a: 687b ldr r3, [r7, #4]
800630c: 691b ldr r3, [r3, #16]
800630e: f043 0201 orr.w r2, r3, #1
8006312: 687b ldr r3, [r7, #4]
8006314: 611a str r2, [r3, #16]
do
{
if (++count > 200000U)
8006316: 68fb ldr r3, [r7, #12]
8006318: 3301 adds r3, #1
800631a: 60fb str r3, [r7, #12]
800631c: 68fb ldr r3, [r7, #12]
800631e: 4a09 ldr r2, [pc, #36] ; (8006344 <USB_CoreReset+0x64>)
8006320: 4293 cmp r3, r2
8006322: d901 bls.n 8006328 <USB_CoreReset+0x48>
{
return HAL_TIMEOUT;
8006324: 2303 movs r3, #3
8006326: e006 b.n 8006336 <USB_CoreReset+0x56>
}
} while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_CSRST) == USB_OTG_GRSTCTL_CSRST);
8006328: 687b ldr r3, [r7, #4]
800632a: 691b ldr r3, [r3, #16]
800632c: f003 0301 and.w r3, r3, #1
8006330: 2b01 cmp r3, #1
8006332: d0f0 beq.n 8006316 <USB_CoreReset+0x36>
return HAL_OK;
8006334: 2300 movs r3, #0
}
8006336: 4618 mov r0, r3
8006338: 3714 adds r7, #20
800633a: 46bd mov sp, r7
800633c: f85d 7b04 ldr.w r7, [sp], #4
8006340: 4770 bx lr
8006342: bf00 nop
8006344: 00030d40 .word 0x00030d40
08006348 <USB_HostInit>:
* @param cfg pointer to a USB_OTG_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef USB_HostInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg)
{
8006348: b084 sub sp, #16
800634a: b580 push {r7, lr}
800634c: b084 sub sp, #16
800634e: af00 add r7, sp, #0
8006350: 6078 str r0, [r7, #4]
8006352: f107 001c add.w r0, r7, #28
8006356: e880 000e stmia.w r0, {r1, r2, r3}
uint32_t USBx_BASE = (uint32_t)USBx;
800635a: 687b ldr r3, [r7, #4]
800635c: 60bb str r3, [r7, #8]
uint32_t i;
/* Restart the Phy Clock */
USBx_PCGCCTL = 0U;
800635e: 68bb ldr r3, [r7, #8]
8006360: f503 6360 add.w r3, r3, #3584 ; 0xe00
8006364: 461a mov r2, r3
8006366: 2300 movs r3, #0
8006368: 6013 str r3, [r2, #0]
#else
/*
* Disable HW VBUS sensing. VBUS is internally considered to be always
* at VBUS-Valid level (5V).
*/
USBx->GCCFG |= USB_OTG_GCCFG_NOVBUSSENS;
800636a: 687b ldr r3, [r7, #4]
800636c: 6b9b ldr r3, [r3, #56] ; 0x38
800636e: f443 1200 orr.w r2, r3, #2097152 ; 0x200000
8006372: 687b ldr r3, [r7, #4]
8006374: 639a str r2, [r3, #56] ; 0x38
USBx->GCCFG &= ~USB_OTG_GCCFG_VBUSBSEN;
8006376: 687b ldr r3, [r7, #4]
8006378: 6b9b ldr r3, [r3, #56] ; 0x38
800637a: f423 2200 bic.w r2, r3, #524288 ; 0x80000
800637e: 687b ldr r3, [r7, #4]
8006380: 639a str r2, [r3, #56] ; 0x38
USBx->GCCFG &= ~USB_OTG_GCCFG_VBUSASEN;
8006382: 687b ldr r3, [r7, #4]
8006384: 6b9b ldr r3, [r3, #56] ; 0x38
8006386: f423 2280 bic.w r2, r3, #262144 ; 0x40000
800638a: 687b ldr r3, [r7, #4]
800638c: 639a str r2, [r3, #56] ; 0x38
#if defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
/* Disable Battery chargin detector */
USBx->GCCFG &= ~(USB_OTG_GCCFG_BCDEN);
#endif /* defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) */
if ((USBx->CID & (0x1U << 8)) != 0U)
800638e: 687b ldr r3, [r7, #4]
8006390: 6bdb ldr r3, [r3, #60] ; 0x3c
8006392: f403 7380 and.w r3, r3, #256 ; 0x100
8006396: 2b00 cmp r3, #0
8006398: d018 beq.n 80063cc <USB_HostInit+0x84>
{
if (cfg.speed == USBH_FSLS_SPEED)
800639a: 6a7b ldr r3, [r7, #36] ; 0x24
800639c: 2b01 cmp r3, #1
800639e: d10a bne.n 80063b6 <USB_HostInit+0x6e>
{
/* Force Device Enumeration to FS/LS mode only */
USBx_HOST->HCFG |= USB_OTG_HCFG_FSLSS;
80063a0: 68bb ldr r3, [r7, #8]
80063a2: f503 6380 add.w r3, r3, #1024 ; 0x400
80063a6: 681b ldr r3, [r3, #0]
80063a8: 68ba ldr r2, [r7, #8]
80063aa: f502 6280 add.w r2, r2, #1024 ; 0x400
80063ae: f043 0304 orr.w r3, r3, #4
80063b2: 6013 str r3, [r2, #0]
80063b4: e014 b.n 80063e0 <USB_HostInit+0x98>
}
else
{
/* Set default Max speed support */
USBx_HOST->HCFG &= ~(USB_OTG_HCFG_FSLSS);
80063b6: 68bb ldr r3, [r7, #8]
80063b8: f503 6380 add.w r3, r3, #1024 ; 0x400
80063bc: 681b ldr r3, [r3, #0]
80063be: 68ba ldr r2, [r7, #8]
80063c0: f502 6280 add.w r2, r2, #1024 ; 0x400
80063c4: f023 0304 bic.w r3, r3, #4
80063c8: 6013 str r3, [r2, #0]
80063ca: e009 b.n 80063e0 <USB_HostInit+0x98>
}
}
else
{
/* Set default Max speed support */
USBx_HOST->HCFG &= ~(USB_OTG_HCFG_FSLSS);
80063cc: 68bb ldr r3, [r7, #8]
80063ce: f503 6380 add.w r3, r3, #1024 ; 0x400
80063d2: 681b ldr r3, [r3, #0]
80063d4: 68ba ldr r2, [r7, #8]
80063d6: f502 6280 add.w r2, r2, #1024 ; 0x400
80063da: f023 0304 bic.w r3, r3, #4
80063de: 6013 str r3, [r2, #0]
}
/* Make sure the FIFOs are flushed. */
(void)USB_FlushTxFifo(USBx, 0x10U); /* all Tx FIFOs */
80063e0: 2110 movs r1, #16
80063e2: 6878 ldr r0, [r7, #4]
80063e4: f7ff feb4 bl 8006150 <USB_FlushTxFifo>
(void)USB_FlushRxFifo(USBx);
80063e8: 6878 ldr r0, [r7, #4]
80063ea: f7ff fed7 bl 800619c <USB_FlushRxFifo>
/* Clear all pending HC Interrupts */
for (i = 0U; i < cfg.Host_channels; i++)
80063ee: 2300 movs r3, #0
80063f0: 60fb str r3, [r7, #12]
80063f2: e015 b.n 8006420 <USB_HostInit+0xd8>
{
USBx_HC(i)->HCINT = 0xFFFFFFFFU;
80063f4: 68fb ldr r3, [r7, #12]
80063f6: 015a lsls r2, r3, #5
80063f8: 68bb ldr r3, [r7, #8]
80063fa: 4413 add r3, r2
80063fc: f503 63a0 add.w r3, r3, #1280 ; 0x500
8006400: 461a mov r2, r3
8006402: f04f 33ff mov.w r3, #4294967295
8006406: 6093 str r3, [r2, #8]
USBx_HC(i)->HCINTMSK = 0U;
8006408: 68fb ldr r3, [r7, #12]
800640a: 015a lsls r2, r3, #5
800640c: 68bb ldr r3, [r7, #8]
800640e: 4413 add r3, r2
8006410: f503 63a0 add.w r3, r3, #1280 ; 0x500
8006414: 461a mov r2, r3
8006416: 2300 movs r3, #0
8006418: 60d3 str r3, [r2, #12]
for (i = 0U; i < cfg.Host_channels; i++)
800641a: 68fb ldr r3, [r7, #12]
800641c: 3301 adds r3, #1
800641e: 60fb str r3, [r7, #12]
8006420: 6a3b ldr r3, [r7, #32]
8006422: 68fa ldr r2, [r7, #12]
8006424: 429a cmp r2, r3
8006426: d3e5 bcc.n 80063f4 <USB_HostInit+0xac>
}
/* Enable VBUS driving */
(void)USB_DriveVbus(USBx, 1U);
8006428: 2101 movs r1, #1
800642a: 6878 ldr r0, [r7, #4]
800642c: f000 f8ac bl 8006588 <USB_DriveVbus>
HAL_Delay(200U);
8006430: 20c8 movs r0, #200 ; 0xc8
8006432: f7fa ff1d bl 8001270 <HAL_Delay>
/* Disable all interrupts. */
USBx->GINTMSK = 0U;
8006436: 687b ldr r3, [r7, #4]
8006438: 2200 movs r2, #0
800643a: 619a str r2, [r3, #24]
/* Clear any pending interrupts */
USBx->GINTSTS = 0xFFFFFFFFU;
800643c: 687b ldr r3, [r7, #4]
800643e: f04f 32ff mov.w r2, #4294967295
8006442: 615a str r2, [r3, #20]
if ((USBx->CID & (0x1U << 8)) != 0U)
8006444: 687b ldr r3, [r7, #4]
8006446: 6bdb ldr r3, [r3, #60] ; 0x3c
8006448: f403 7380 and.w r3, r3, #256 ; 0x100
800644c: 2b00 cmp r3, #0
800644e: d00b beq.n 8006468 <USB_HostInit+0x120>
{
/* set Rx FIFO size */
USBx->GRXFSIZ = 0x200U;
8006450: 687b ldr r3, [r7, #4]
8006452: f44f 7200 mov.w r2, #512 ; 0x200
8006456: 625a str r2, [r3, #36] ; 0x24
USBx->DIEPTXF0_HNPTXFSIZ = (uint32_t)(((0x100U << 16) & USB_OTG_NPTXFD) | 0x200U);
8006458: 687b ldr r3, [r7, #4]
800645a: 4a14 ldr r2, [pc, #80] ; (80064ac <USB_HostInit+0x164>)
800645c: 629a str r2, [r3, #40] ; 0x28
USBx->HPTXFSIZ = (uint32_t)(((0xE0U << 16) & USB_OTG_HPTXFSIZ_PTXFD) | 0x300U);
800645e: 687b ldr r3, [r7, #4]
8006460: 4a13 ldr r2, [pc, #76] ; (80064b0 <USB_HostInit+0x168>)
8006462: f8c3 2100 str.w r2, [r3, #256] ; 0x100
8006466: e009 b.n 800647c <USB_HostInit+0x134>
}
else
{
/* set Rx FIFO size */
USBx->GRXFSIZ = 0x80U;
8006468: 687b ldr r3, [r7, #4]
800646a: 2280 movs r2, #128 ; 0x80
800646c: 625a str r2, [r3, #36] ; 0x24
USBx->DIEPTXF0_HNPTXFSIZ = (uint32_t)(((0x60U << 16) & USB_OTG_NPTXFD) | 0x80U);
800646e: 687b ldr r3, [r7, #4]
8006470: 4a10 ldr r2, [pc, #64] ; (80064b4 <USB_HostInit+0x16c>)
8006472: 629a str r2, [r3, #40] ; 0x28
USBx->HPTXFSIZ = (uint32_t)(((0x40U << 16)& USB_OTG_HPTXFSIZ_PTXFD) | 0xE0U);
8006474: 687b ldr r3, [r7, #4]
8006476: 4a10 ldr r2, [pc, #64] ; (80064b8 <USB_HostInit+0x170>)
8006478: f8c3 2100 str.w r2, [r3, #256] ; 0x100
}
/* Enable the common interrupts */
if (cfg.dma_enable == 0U)
800647c: 6abb ldr r3, [r7, #40] ; 0x28
800647e: 2b00 cmp r3, #0
8006480: d105 bne.n 800648e <USB_HostInit+0x146>
{
USBx->GINTMSK |= USB_OTG_GINTMSK_RXFLVLM;
8006482: 687b ldr r3, [r7, #4]
8006484: 699b ldr r3, [r3, #24]
8006486: f043 0210 orr.w r2, r3, #16
800648a: 687b ldr r3, [r7, #4]
800648c: 619a str r2, [r3, #24]
}
/* Enable interrupts matching to the Host mode ONLY */
USBx->GINTMSK |= (USB_OTG_GINTMSK_PRTIM | USB_OTG_GINTMSK_HCIM | \
800648e: 687b ldr r3, [r7, #4]
8006490: 699a ldr r2, [r3, #24]
8006492: 4b0a ldr r3, [pc, #40] ; (80064bc <USB_HostInit+0x174>)
8006494: 4313 orrs r3, r2
8006496: 687a ldr r2, [r7, #4]
8006498: 6193 str r3, [r2, #24]
USB_OTG_GINTMSK_SOFM | USB_OTG_GINTSTS_DISCINT | \
USB_OTG_GINTMSK_PXFRM_IISOOXFRM | USB_OTG_GINTMSK_WUIM);
return HAL_OK;
800649a: 2300 movs r3, #0
}
800649c: 4618 mov r0, r3
800649e: 3710 adds r7, #16
80064a0: 46bd mov sp, r7
80064a2: e8bd 4080 ldmia.w sp!, {r7, lr}
80064a6: b004 add sp, #16
80064a8: 4770 bx lr
80064aa: bf00 nop
80064ac: 01000200 .word 0x01000200
80064b0: 00e00300 .word 0x00e00300
80064b4: 00600080 .word 0x00600080
80064b8: 004000e0 .word 0x004000e0
80064bc: a3200008 .word 0xa3200008
080064c0 <USB_InitFSLSPClkSel>:
* HCFG_48_MHZ : Full Speed 48 MHz Clock
* HCFG_6_MHZ : Low Speed 6 MHz Clock
* @retval HAL status
*/
HAL_StatusTypeDef USB_InitFSLSPClkSel(USB_OTG_GlobalTypeDef *USBx, uint8_t freq)
{
80064c0: b480 push {r7}
80064c2: b085 sub sp, #20
80064c4: af00 add r7, sp, #0
80064c6: 6078 str r0, [r7, #4]
80064c8: 460b mov r3, r1
80064ca: 70fb strb r3, [r7, #3]
uint32_t USBx_BASE = (uint32_t)USBx;
80064cc: 687b ldr r3, [r7, #4]
80064ce: 60fb str r3, [r7, #12]
USBx_HOST->HCFG &= ~(USB_OTG_HCFG_FSLSPCS);
80064d0: 68fb ldr r3, [r7, #12]
80064d2: f503 6380 add.w r3, r3, #1024 ; 0x400
80064d6: 681b ldr r3, [r3, #0]
80064d8: 68fa ldr r2, [r7, #12]
80064da: f502 6280 add.w r2, r2, #1024 ; 0x400
80064de: f023 0303 bic.w r3, r3, #3
80064e2: 6013 str r3, [r2, #0]
USBx_HOST->HCFG |= (uint32_t)freq & USB_OTG_HCFG_FSLSPCS;
80064e4: 68fb ldr r3, [r7, #12]
80064e6: f503 6380 add.w r3, r3, #1024 ; 0x400
80064ea: 681a ldr r2, [r3, #0]
80064ec: 78fb ldrb r3, [r7, #3]
80064ee: f003 0303 and.w r3, r3, #3
80064f2: 68f9 ldr r1, [r7, #12]
80064f4: f501 6180 add.w r1, r1, #1024 ; 0x400
80064f8: 4313 orrs r3, r2
80064fa: 600b str r3, [r1, #0]
if (freq == HCFG_48_MHZ)
80064fc: 78fb ldrb r3, [r7, #3]
80064fe: 2b01 cmp r3, #1
8006500: d107 bne.n 8006512 <USB_InitFSLSPClkSel+0x52>
{
USBx_HOST->HFIR = 48000U;
8006502: 68fb ldr r3, [r7, #12]
8006504: f503 6380 add.w r3, r3, #1024 ; 0x400
8006508: 461a mov r2, r3
800650a: f64b 3380 movw r3, #48000 ; 0xbb80
800650e: 6053 str r3, [r2, #4]
8006510: e009 b.n 8006526 <USB_InitFSLSPClkSel+0x66>
}
else if (freq == HCFG_6_MHZ)
8006512: 78fb ldrb r3, [r7, #3]
8006514: 2b02 cmp r3, #2
8006516: d106 bne.n 8006526 <USB_InitFSLSPClkSel+0x66>
{
USBx_HOST->HFIR = 6000U;
8006518: 68fb ldr r3, [r7, #12]
800651a: f503 6380 add.w r3, r3, #1024 ; 0x400
800651e: 461a mov r2, r3
8006520: f241 7370 movw r3, #6000 ; 0x1770
8006524: 6053 str r3, [r2, #4]
else
{
/* ... */
}
return HAL_OK;
8006526: 2300 movs r3, #0
}
8006528: 4618 mov r0, r3
800652a: 3714 adds r7, #20
800652c: 46bd mov sp, r7
800652e: f85d 7b04 ldr.w r7, [sp], #4
8006532: 4770 bx lr
08006534 <USB_ResetPort>:
* @retval HAL status
* @note (1)The application must wait at least 10 ms
* before clearing the reset bit.
*/
HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx)
{
8006534: b580 push {r7, lr}
8006536: b084 sub sp, #16
8006538: af00 add r7, sp, #0
800653a: 6078 str r0, [r7, #4]
uint32_t USBx_BASE = (uint32_t)USBx;
800653c: 687b ldr r3, [r7, #4]
800653e: 60fb str r3, [r7, #12]
__IO uint32_t hprt0 = 0U;
8006540: 2300 movs r3, #0
8006542: 60bb str r3, [r7, #8]
hprt0 = USBx_HPRT0;
8006544: 68fb ldr r3, [r7, #12]
8006546: f503 6388 add.w r3, r3, #1088 ; 0x440
800654a: 681b ldr r3, [r3, #0]
800654c: 60bb str r3, [r7, #8]
hprt0 &= ~(USB_OTG_HPRT_PENA | USB_OTG_HPRT_PCDET |
800654e: 68bb ldr r3, [r7, #8]
8006550: f023 032e bic.w r3, r3, #46 ; 0x2e
8006554: 60bb str r3, [r7, #8]
USB_OTG_HPRT_PENCHNG | USB_OTG_HPRT_POCCHNG);
USBx_HPRT0 = (USB_OTG_HPRT_PRST | hprt0);
8006556: 68bb ldr r3, [r7, #8]
8006558: 68fa ldr r2, [r7, #12]
800655a: f502 6288 add.w r2, r2, #1088 ; 0x440
800655e: f443 7380 orr.w r3, r3, #256 ; 0x100
8006562: 6013 str r3, [r2, #0]
HAL_Delay(100U); /* See Note #1 */
8006564: 2064 movs r0, #100 ; 0x64
8006566: f7fa fe83 bl 8001270 <HAL_Delay>
USBx_HPRT0 = ((~USB_OTG_HPRT_PRST) & hprt0);
800656a: 68bb ldr r3, [r7, #8]
800656c: 68fa ldr r2, [r7, #12]
800656e: f502 6288 add.w r2, r2, #1088 ; 0x440
8006572: f423 7380 bic.w r3, r3, #256 ; 0x100
8006576: 6013 str r3, [r2, #0]
HAL_Delay(10U);
8006578: 200a movs r0, #10
800657a: f7fa fe79 bl 8001270 <HAL_Delay>
return HAL_OK;
800657e: 2300 movs r3, #0
}
8006580: 4618 mov r0, r3
8006582: 3710 adds r7, #16
8006584: 46bd mov sp, r7
8006586: bd80 pop {r7, pc}
08006588 <USB_DriveVbus>:
* 0 : Deactivate VBUS
* 1 : Activate VBUS
* @retval HAL status
*/
HAL_StatusTypeDef USB_DriveVbus(USB_OTG_GlobalTypeDef *USBx, uint8_t state)
{
8006588: b480 push {r7}
800658a: b085 sub sp, #20
800658c: af00 add r7, sp, #0
800658e: 6078 str r0, [r7, #4]
8006590: 460b mov r3, r1
8006592: 70fb strb r3, [r7, #3]
uint32_t USBx_BASE = (uint32_t)USBx;
8006594: 687b ldr r3, [r7, #4]
8006596: 60fb str r3, [r7, #12]
__IO uint32_t hprt0 = 0U;
8006598: 2300 movs r3, #0
800659a: 60bb str r3, [r7, #8]
hprt0 = USBx_HPRT0;
800659c: 68fb ldr r3, [r7, #12]
800659e: f503 6388 add.w r3, r3, #1088 ; 0x440
80065a2: 681b ldr r3, [r3, #0]
80065a4: 60bb str r3, [r7, #8]
hprt0 &= ~(USB_OTG_HPRT_PENA | USB_OTG_HPRT_PCDET |
80065a6: 68bb ldr r3, [r7, #8]
80065a8: f023 032e bic.w r3, r3, #46 ; 0x2e
80065ac: 60bb str r3, [r7, #8]
USB_OTG_HPRT_PENCHNG | USB_OTG_HPRT_POCCHNG);
if (((hprt0 & USB_OTG_HPRT_PPWR) == 0U) && (state == 1U))
80065ae: 68bb ldr r3, [r7, #8]
80065b0: f403 5380 and.w r3, r3, #4096 ; 0x1000
80065b4: 2b00 cmp r3, #0
80065b6: d109 bne.n 80065cc <USB_DriveVbus+0x44>
80065b8: 78fb ldrb r3, [r7, #3]
80065ba: 2b01 cmp r3, #1
80065bc: d106 bne.n 80065cc <USB_DriveVbus+0x44>
{
USBx_HPRT0 = (USB_OTG_HPRT_PPWR | hprt0);
80065be: 68bb ldr r3, [r7, #8]
80065c0: 68fa ldr r2, [r7, #12]
80065c2: f502 6288 add.w r2, r2, #1088 ; 0x440
80065c6: f443 5380 orr.w r3, r3, #4096 ; 0x1000
80065ca: 6013 str r3, [r2, #0]
}
if (((hprt0 & USB_OTG_HPRT_PPWR) == USB_OTG_HPRT_PPWR) && (state == 0U))
80065cc: 68bb ldr r3, [r7, #8]
80065ce: f403 5380 and.w r3, r3, #4096 ; 0x1000
80065d2: f5b3 5f80 cmp.w r3, #4096 ; 0x1000
80065d6: d109 bne.n 80065ec <USB_DriveVbus+0x64>
80065d8: 78fb ldrb r3, [r7, #3]
80065da: 2b00 cmp r3, #0
80065dc: d106 bne.n 80065ec <USB_DriveVbus+0x64>
{
USBx_HPRT0 = ((~USB_OTG_HPRT_PPWR) & hprt0);
80065de: 68bb ldr r3, [r7, #8]
80065e0: 68fa ldr r2, [r7, #12]
80065e2: f502 6288 add.w r2, r2, #1088 ; 0x440
80065e6: f423 5380 bic.w r3, r3, #4096 ; 0x1000
80065ea: 6013 str r3, [r2, #0]
}
return HAL_OK;
80065ec: 2300 movs r3, #0
}
80065ee: 4618 mov r0, r3
80065f0: 3714 adds r7, #20
80065f2: 46bd mov sp, r7
80065f4: f85d 7b04 ldr.w r7, [sp], #4
80065f8: 4770 bx lr
080065fa <USB_GetHostSpeed>:
* @arg HCD_SPEED_HIGH: High speed mode
* @arg HCD_SPEED_FULL: Full speed mode
* @arg HCD_SPEED_LOW: Low speed mode
*/
uint32_t USB_GetHostSpeed(USB_OTG_GlobalTypeDef *USBx)
{
80065fa: b480 push {r7}
80065fc: b085 sub sp, #20
80065fe: af00 add r7, sp, #0
8006600: 6078 str r0, [r7, #4]
uint32_t USBx_BASE = (uint32_t)USBx;
8006602: 687b ldr r3, [r7, #4]
8006604: 60fb str r3, [r7, #12]
__IO uint32_t hprt0 = 0U;
8006606: 2300 movs r3, #0
8006608: 60bb str r3, [r7, #8]
hprt0 = USBx_HPRT0;
800660a: 68fb ldr r3, [r7, #12]
800660c: f503 6388 add.w r3, r3, #1088 ; 0x440
8006610: 681b ldr r3, [r3, #0]
8006612: 60bb str r3, [r7, #8]
return ((hprt0 & USB_OTG_HPRT_PSPD) >> 17);
8006614: 68bb ldr r3, [r7, #8]
8006616: 0c5b lsrs r3, r3, #17
8006618: f003 0303 and.w r3, r3, #3
}
800661c: 4618 mov r0, r3
800661e: 3714 adds r7, #20
8006620: 46bd mov sp, r7
8006622: f85d 7b04 ldr.w r7, [sp], #4
8006626: 4770 bx lr
08006628 <USB_GetCurrentFrame>:
* @brief Return Host Current Frame number
* @param USBx Selected device
* @retval current frame number
*/
uint32_t USB_GetCurrentFrame(USB_OTG_GlobalTypeDef *USBx)
{
8006628: b480 push {r7}
800662a: b085 sub sp, #20
800662c: af00 add r7, sp, #0
800662e: 6078 str r0, [r7, #4]
uint32_t USBx_BASE = (uint32_t)USBx;
8006630: 687b ldr r3, [r7, #4]
8006632: 60fb str r3, [r7, #12]
return (USBx_HOST->HFNUM & USB_OTG_HFNUM_FRNUM);
8006634: 68fb ldr r3, [r7, #12]
8006636: f503 6380 add.w r3, r3, #1024 ; 0x400
800663a: 689b ldr r3, [r3, #8]
800663c: b29b uxth r3, r3
}
800663e: 4618 mov r0, r3
8006640: 3714 adds r7, #20
8006642: 46bd mov sp, r7
8006644: f85d 7b04 ldr.w r7, [sp], #4
8006648: 4770 bx lr
...
0800664c <USB_HC_Init>:
* @retval HAL state
*/
HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx, uint8_t ch_num,
uint8_t epnum, uint8_t dev_address, uint8_t speed,
uint8_t ep_type, uint16_t mps)
{
800664c: b480 push {r7}
800664e: b087 sub sp, #28
8006650: af00 add r7, sp, #0
8006652: 6078 str r0, [r7, #4]
8006654: 4608 mov r0, r1
8006656: 4611 mov r1, r2
8006658: 461a mov r2, r3
800665a: 4603 mov r3, r0
800665c: 70fb strb r3, [r7, #3]
800665e: 460b mov r3, r1
8006660: 70bb strb r3, [r7, #2]
8006662: 4613 mov r3, r2
8006664: 707b strb r3, [r7, #1]
HAL_StatusTypeDef ret = HAL_OK;
8006666: 2300 movs r3, #0
8006668: 75fb strb r3, [r7, #23]
uint32_t USBx_BASE = (uint32_t)USBx;
800666a: 687b ldr r3, [r7, #4]
800666c: 60bb str r3, [r7, #8]
uint32_t HCcharEpDir, HCcharLowSpeed;
/* Clear old interrupt conditions for this host channel. */
USBx_HC((uint32_t)ch_num)->HCINT = 0xFFFFFFFFU;
800666e: 78fb ldrb r3, [r7, #3]
8006670: 015a lsls r2, r3, #5
8006672: 68bb ldr r3, [r7, #8]
8006674: 4413 add r3, r2
8006676: f503 63a0 add.w r3, r3, #1280 ; 0x500
800667a: 461a mov r2, r3
800667c: f04f 33ff mov.w r3, #4294967295
8006680: 6093 str r3, [r2, #8]
/* Enable channel interrupts required for this transfer. */
switch (ep_type)
8006682: f897 3024 ldrb.w r3, [r7, #36] ; 0x24
8006686: 2b03 cmp r3, #3
8006688: d87e bhi.n 8006788 <USB_HC_Init+0x13c>
800668a: a201 add r2, pc, #4 ; (adr r2, 8006690 <USB_HC_Init+0x44>)
800668c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8006690: 080066a1 .word 0x080066a1
8006694: 0800674b .word 0x0800674b
8006698: 080066a1 .word 0x080066a1
800669c: 0800670d .word 0x0800670d
{
case EP_TYPE_CTRL:
case EP_TYPE_BULK:
USBx_HC((uint32_t)ch_num)->HCINTMSK = USB_OTG_HCINTMSK_XFRCM |
80066a0: 78fb ldrb r3, [r7, #3]
80066a2: 015a lsls r2, r3, #5
80066a4: 68bb ldr r3, [r7, #8]
80066a6: 4413 add r3, r2
80066a8: f503 63a0 add.w r3, r3, #1280 ; 0x500
80066ac: 461a mov r2, r3
80066ae: f240 439d movw r3, #1181 ; 0x49d
80066b2: 60d3 str r3, [r2, #12]
USB_OTG_HCINTMSK_TXERRM |
USB_OTG_HCINTMSK_DTERRM |
USB_OTG_HCINTMSK_AHBERR |
USB_OTG_HCINTMSK_NAKM;
if ((epnum & 0x80U) == 0x80U)
80066b4: f997 3002 ldrsb.w r3, [r7, #2]
80066b8: 2b00 cmp r3, #0
80066ba: da10 bge.n 80066de <USB_HC_Init+0x92>
{
USBx_HC((uint32_t)ch_num)->HCINTMSK |= USB_OTG_HCINTMSK_BBERRM;
80066bc: 78fb ldrb r3, [r7, #3]
80066be: 015a lsls r2, r3, #5
80066c0: 68bb ldr r3, [r7, #8]
80066c2: 4413 add r3, r2
80066c4: f503 63a0 add.w r3, r3, #1280 ; 0x500
80066c8: 68db ldr r3, [r3, #12]
80066ca: 78fa ldrb r2, [r7, #3]
80066cc: 0151 lsls r1, r2, #5
80066ce: 68ba ldr r2, [r7, #8]
80066d0: 440a add r2, r1
80066d2: f502 62a0 add.w r2, r2, #1280 ; 0x500
80066d6: f443 7380 orr.w r3, r3, #256 ; 0x100
80066da: 60d3 str r3, [r2, #12]
if ((USBx->CID & (0x1U << 8)) != 0U)
{
USBx_HC((uint32_t)ch_num)->HCINTMSK |= (USB_OTG_HCINTMSK_NYET | USB_OTG_HCINTMSK_ACKM);
}
}
break;
80066dc: e057 b.n 800678e <USB_HC_Init+0x142>
if ((USBx->CID & (0x1U << 8)) != 0U)
80066de: 687b ldr r3, [r7, #4]
80066e0: 6bdb ldr r3, [r3, #60] ; 0x3c
80066e2: f403 7380 and.w r3, r3, #256 ; 0x100
80066e6: 2b00 cmp r3, #0
80066e8: d051 beq.n 800678e <USB_HC_Init+0x142>
USBx_HC((uint32_t)ch_num)->HCINTMSK |= (USB_OTG_HCINTMSK_NYET | USB_OTG_HCINTMSK_ACKM);
80066ea: 78fb ldrb r3, [r7, #3]
80066ec: 015a lsls r2, r3, #5
80066ee: 68bb ldr r3, [r7, #8]
80066f0: 4413 add r3, r2
80066f2: f503 63a0 add.w r3, r3, #1280 ; 0x500
80066f6: 68db ldr r3, [r3, #12]
80066f8: 78fa ldrb r2, [r7, #3]
80066fa: 0151 lsls r1, r2, #5
80066fc: 68ba ldr r2, [r7, #8]
80066fe: 440a add r2, r1
8006700: f502 62a0 add.w r2, r2, #1280 ; 0x500
8006704: f043 0360 orr.w r3, r3, #96 ; 0x60
8006708: 60d3 str r3, [r2, #12]
break;
800670a: e040 b.n 800678e <USB_HC_Init+0x142>
case EP_TYPE_INTR:
USBx_HC((uint32_t)ch_num)->HCINTMSK = USB_OTG_HCINTMSK_XFRCM |
800670c: 78fb ldrb r3, [r7, #3]
800670e: 015a lsls r2, r3, #5
8006710: 68bb ldr r3, [r7, #8]
8006712: 4413 add r3, r2
8006714: f503 63a0 add.w r3, r3, #1280 ; 0x500
8006718: 461a mov r2, r3
800671a: f240 639d movw r3, #1693 ; 0x69d
800671e: 60d3 str r3, [r2, #12]
USB_OTG_HCINTMSK_DTERRM |
USB_OTG_HCINTMSK_NAKM |
USB_OTG_HCINTMSK_AHBERR |
USB_OTG_HCINTMSK_FRMORM;
if ((epnum & 0x80U) == 0x80U)
8006720: f997 3002 ldrsb.w r3, [r7, #2]
8006724: 2b00 cmp r3, #0
8006726: da34 bge.n 8006792 <USB_HC_Init+0x146>
{
USBx_HC((uint32_t)ch_num)->HCINTMSK |= USB_OTG_HCINTMSK_BBERRM;
8006728: 78fb ldrb r3, [r7, #3]
800672a: 015a lsls r2, r3, #5
800672c: 68bb ldr r3, [r7, #8]
800672e: 4413 add r3, r2
8006730: f503 63a0 add.w r3, r3, #1280 ; 0x500
8006734: 68db ldr r3, [r3, #12]
8006736: 78fa ldrb r2, [r7, #3]
8006738: 0151 lsls r1, r2, #5
800673a: 68ba ldr r2, [r7, #8]
800673c: 440a add r2, r1
800673e: f502 62a0 add.w r2, r2, #1280 ; 0x500
8006742: f443 7380 orr.w r3, r3, #256 ; 0x100
8006746: 60d3 str r3, [r2, #12]
}
break;
8006748: e023 b.n 8006792 <USB_HC_Init+0x146>
case EP_TYPE_ISOC:
USBx_HC((uint32_t)ch_num)->HCINTMSK = USB_OTG_HCINTMSK_XFRCM |
800674a: 78fb ldrb r3, [r7, #3]
800674c: 015a lsls r2, r3, #5
800674e: 68bb ldr r3, [r7, #8]
8006750: 4413 add r3, r2
8006752: f503 63a0 add.w r3, r3, #1280 ; 0x500
8006756: 461a mov r2, r3
8006758: f240 2325 movw r3, #549 ; 0x225
800675c: 60d3 str r3, [r2, #12]
USB_OTG_HCINTMSK_ACKM |
USB_OTG_HCINTMSK_AHBERR |
USB_OTG_HCINTMSK_FRMORM;
if ((epnum & 0x80U) == 0x80U)
800675e: f997 3002 ldrsb.w r3, [r7, #2]
8006762: 2b00 cmp r3, #0
8006764: da17 bge.n 8006796 <USB_HC_Init+0x14a>
{
USBx_HC((uint32_t)ch_num)->HCINTMSK |= (USB_OTG_HCINTMSK_TXERRM | USB_OTG_HCINTMSK_BBERRM);
8006766: 78fb ldrb r3, [r7, #3]
8006768: 015a lsls r2, r3, #5
800676a: 68bb ldr r3, [r7, #8]
800676c: 4413 add r3, r2
800676e: f503 63a0 add.w r3, r3, #1280 ; 0x500
8006772: 68db ldr r3, [r3, #12]
8006774: 78fa ldrb r2, [r7, #3]
8006776: 0151 lsls r1, r2, #5
8006778: 68ba ldr r2, [r7, #8]
800677a: 440a add r2, r1
800677c: f502 62a0 add.w r2, r2, #1280 ; 0x500
8006780: f443 73c0 orr.w r3, r3, #384 ; 0x180
8006784: 60d3 str r3, [r2, #12]
}
break;
8006786: e006 b.n 8006796 <USB_HC_Init+0x14a>
default:
ret = HAL_ERROR;
8006788: 2301 movs r3, #1
800678a: 75fb strb r3, [r7, #23]
break;
800678c: e004 b.n 8006798 <USB_HC_Init+0x14c>
break;
800678e: bf00 nop
8006790: e002 b.n 8006798 <USB_HC_Init+0x14c>
break;
8006792: bf00 nop
8006794: e000 b.n 8006798 <USB_HC_Init+0x14c>
break;
8006796: bf00 nop
}
/* Enable the top level host channel interrupt. */
USBx_HOST->HAINTMSK |= 1UL << (ch_num & 0xFU);
8006798: 68bb ldr r3, [r7, #8]
800679a: f503 6380 add.w r3, r3, #1024 ; 0x400
800679e: 699a ldr r2, [r3, #24]
80067a0: 78fb ldrb r3, [r7, #3]
80067a2: f003 030f and.w r3, r3, #15
80067a6: 2101 movs r1, #1
80067a8: fa01 f303 lsl.w r3, r1, r3
80067ac: 68b9 ldr r1, [r7, #8]
80067ae: f501 6180 add.w r1, r1, #1024 ; 0x400
80067b2: 4313 orrs r3, r2
80067b4: 618b str r3, [r1, #24]
/* Make sure host channel interrupts are enabled. */
USBx->GINTMSK |= USB_OTG_GINTMSK_HCIM;
80067b6: 687b ldr r3, [r7, #4]
80067b8: 699b ldr r3, [r3, #24]
80067ba: f043 7200 orr.w r2, r3, #33554432 ; 0x2000000
80067be: 687b ldr r3, [r7, #4]
80067c0: 619a str r2, [r3, #24]
/* Program the HCCHAR register */
if ((epnum & 0x80U) == 0x80U)
80067c2: f997 3002 ldrsb.w r3, [r7, #2]
80067c6: 2b00 cmp r3, #0
80067c8: da03 bge.n 80067d2 <USB_HC_Init+0x186>
{
HCcharEpDir = (0x1U << 15) & USB_OTG_HCCHAR_EPDIR;
80067ca: f44f 4300 mov.w r3, #32768 ; 0x8000
80067ce: 613b str r3, [r7, #16]
80067d0: e001 b.n 80067d6 <USB_HC_Init+0x18a>
}
else
{
HCcharEpDir = 0U;
80067d2: 2300 movs r3, #0
80067d4: 613b str r3, [r7, #16]
}
if (speed == HPRT0_PRTSPD_LOW_SPEED)
80067d6: f897 3020 ldrb.w r3, [r7, #32]
80067da: 2b02 cmp r3, #2
80067dc: d103 bne.n 80067e6 <USB_HC_Init+0x19a>
{
HCcharLowSpeed = (0x1U << 17) & USB_OTG_HCCHAR_LSDEV;
80067de: f44f 3300 mov.w r3, #131072 ; 0x20000
80067e2: 60fb str r3, [r7, #12]
80067e4: e001 b.n 80067ea <USB_HC_Init+0x19e>
}
else
{
HCcharLowSpeed = 0U;
80067e6: 2300 movs r3, #0
80067e8: 60fb str r3, [r7, #12]
}
USBx_HC((uint32_t)ch_num)->HCCHAR = (((uint32_t)dev_address << 22) & USB_OTG_HCCHAR_DAD) |
80067ea: 787b ldrb r3, [r7, #1]
80067ec: 059b lsls r3, r3, #22
80067ee: f003 52fe and.w r2, r3, #532676608 ; 0x1fc00000
((((uint32_t)epnum & 0x7FU) << 11) & USB_OTG_HCCHAR_EPNUM) |
80067f2: 78bb ldrb r3, [r7, #2]
80067f4: 02db lsls r3, r3, #11
80067f6: f403 43f0 and.w r3, r3, #30720 ; 0x7800
USBx_HC((uint32_t)ch_num)->HCCHAR = (((uint32_t)dev_address << 22) & USB_OTG_HCCHAR_DAD) |
80067fa: 431a orrs r2, r3
(((uint32_t)ep_type << 18) & USB_OTG_HCCHAR_EPTYP) |
80067fc: f897 3024 ldrb.w r3, [r7, #36] ; 0x24
8006800: 049b lsls r3, r3, #18
8006802: f403 2340 and.w r3, r3, #786432 ; 0xc0000
((((uint32_t)epnum & 0x7FU) << 11) & USB_OTG_HCCHAR_EPNUM) |
8006806: 431a orrs r2, r3
((uint32_t)mps & USB_OTG_HCCHAR_MPSIZ) | HCcharEpDir | HCcharLowSpeed;
8006808: 8d3b ldrh r3, [r7, #40] ; 0x28
800680a: f3c3 030a ubfx r3, r3, #0, #11
(((uint32_t)ep_type << 18) & USB_OTG_HCCHAR_EPTYP) |
800680e: 431a orrs r2, r3
((uint32_t)mps & USB_OTG_HCCHAR_MPSIZ) | HCcharEpDir | HCcharLowSpeed;
8006810: 693b ldr r3, [r7, #16]
8006812: 431a orrs r2, r3
USBx_HC((uint32_t)ch_num)->HCCHAR = (((uint32_t)dev_address << 22) & USB_OTG_HCCHAR_DAD) |
8006814: 78fb ldrb r3, [r7, #3]
8006816: 0159 lsls r1, r3, #5
8006818: 68bb ldr r3, [r7, #8]
800681a: 440b add r3, r1
800681c: f503 63a0 add.w r3, r3, #1280 ; 0x500
8006820: 4619 mov r1, r3
((uint32_t)mps & USB_OTG_HCCHAR_MPSIZ) | HCcharEpDir | HCcharLowSpeed;
8006822: 68fb ldr r3, [r7, #12]
8006824: 4313 orrs r3, r2
USBx_HC((uint32_t)ch_num)->HCCHAR = (((uint32_t)dev_address << 22) & USB_OTG_HCCHAR_DAD) |
8006826: 600b str r3, [r1, #0]
if (ep_type == EP_TYPE_INTR)
8006828: f897 3024 ldrb.w r3, [r7, #36] ; 0x24
800682c: 2b03 cmp r3, #3
800682e: d10f bne.n 8006850 <USB_HC_Init+0x204>
{
USBx_HC((uint32_t)ch_num)->HCCHAR |= USB_OTG_HCCHAR_ODDFRM ;
8006830: 78fb ldrb r3, [r7, #3]
8006832: 015a lsls r2, r3, #5
8006834: 68bb ldr r3, [r7, #8]
8006836: 4413 add r3, r2
8006838: f503 63a0 add.w r3, r3, #1280 ; 0x500
800683c: 681b ldr r3, [r3, #0]
800683e: 78fa ldrb r2, [r7, #3]
8006840: 0151 lsls r1, r2, #5
8006842: 68ba ldr r2, [r7, #8]
8006844: 440a add r2, r1
8006846: f502 62a0 add.w r2, r2, #1280 ; 0x500
800684a: f043 5300 orr.w r3, r3, #536870912 ; 0x20000000
800684e: 6013 str r3, [r2, #0]
}
return ret;
8006850: 7dfb ldrb r3, [r7, #23]
}
8006852: 4618 mov r0, r3
8006854: 371c adds r7, #28
8006856: 46bd mov sp, r7
8006858: f85d 7b04 ldr.w r7, [sp], #4
800685c: 4770 bx lr
800685e: bf00 nop
08006860 <USB_HC_StartXfer>:
* 0 : DMA feature not used
* 1 : DMA feature used
* @retval HAL state
*/
HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDef *hc, uint8_t dma)
{
8006860: b580 push {r7, lr}
8006862: b08c sub sp, #48 ; 0x30
8006864: af02 add r7, sp, #8
8006866: 60f8 str r0, [r7, #12]
8006868: 60b9 str r1, [r7, #8]
800686a: 4613 mov r3, r2
800686c: 71fb strb r3, [r7, #7]
uint32_t USBx_BASE = (uint32_t)USBx;
800686e: 68fb ldr r3, [r7, #12]
8006870: 623b str r3, [r7, #32]
uint32_t ch_num = (uint32_t)hc->ch_num;
8006872: 68bb ldr r3, [r7, #8]
8006874: 785b ldrb r3, [r3, #1]
8006876: 61fb str r3, [r7, #28]
static __IO uint32_t tmpreg = 0U;
uint8_t is_oddframe;
uint16_t len_words;
uint16_t num_packets;
uint16_t max_hc_pkt_count = 256U;
8006878: f44f 7380 mov.w r3, #256 ; 0x100
800687c: 837b strh r3, [r7, #26]
if (((USBx->CID & (0x1U << 8)) != 0U) && (hc->speed == USBH_HS_SPEED))
800687e: 68fb ldr r3, [r7, #12]
8006880: 6bdb ldr r3, [r3, #60] ; 0x3c
8006882: f403 7380 and.w r3, r3, #256 ; 0x100
8006886: 2b00 cmp r3, #0
8006888: d028 beq.n 80068dc <USB_HC_StartXfer+0x7c>
800688a: 68bb ldr r3, [r7, #8]
800688c: 791b ldrb r3, [r3, #4]
800688e: 2b00 cmp r3, #0
8006890: d124 bne.n 80068dc <USB_HC_StartXfer+0x7c>
{
if ((dma == 0U) && (hc->do_ping == 1U))
8006892: 79fb ldrb r3, [r7, #7]
8006894: 2b00 cmp r3, #0
8006896: d10b bne.n 80068b0 <USB_HC_StartXfer+0x50>
8006898: 68bb ldr r3, [r7, #8]
800689a: 795b ldrb r3, [r3, #5]
800689c: 2b01 cmp r3, #1
800689e: d107 bne.n 80068b0 <USB_HC_StartXfer+0x50>
{
(void)USB_DoPing(USBx, hc->ch_num);
80068a0: 68bb ldr r3, [r7, #8]
80068a2: 785b ldrb r3, [r3, #1]
80068a4: 4619 mov r1, r3
80068a6: 68f8 ldr r0, [r7, #12]
80068a8: f000 fa30 bl 8006d0c <USB_DoPing>
return HAL_OK;
80068ac: 2300 movs r3, #0
80068ae: e114 b.n 8006ada <USB_HC_StartXfer+0x27a>
}
else if (dma == 1U)
80068b0: 79fb ldrb r3, [r7, #7]
80068b2: 2b01 cmp r3, #1
80068b4: d112 bne.n 80068dc <USB_HC_StartXfer+0x7c>
{
USBx_HC(ch_num)->HCINTMSK &= ~(USB_OTG_HCINTMSK_NYET | USB_OTG_HCINTMSK_ACKM);
80068b6: 69fb ldr r3, [r7, #28]
80068b8: 015a lsls r2, r3, #5
80068ba: 6a3b ldr r3, [r7, #32]
80068bc: 4413 add r3, r2
80068be: f503 63a0 add.w r3, r3, #1280 ; 0x500
80068c2: 68db ldr r3, [r3, #12]
80068c4: 69fa ldr r2, [r7, #28]
80068c6: 0151 lsls r1, r2, #5
80068c8: 6a3a ldr r2, [r7, #32]
80068ca: 440a add r2, r1
80068cc: f502 62a0 add.w r2, r2, #1280 ; 0x500
80068d0: f023 0360 bic.w r3, r3, #96 ; 0x60
80068d4: 60d3 str r3, [r2, #12]
hc->do_ping = 0U;
80068d6: 68bb ldr r3, [r7, #8]
80068d8: 2200 movs r2, #0
80068da: 715a strb r2, [r3, #5]
/* ... */
}
}
/* Compute the expected number of packets associated to the transfer */
if (hc->xfer_len > 0U)
80068dc: 68bb ldr r3, [r7, #8]
80068de: 691b ldr r3, [r3, #16]
80068e0: 2b00 cmp r3, #0
80068e2: d018 beq.n 8006916 <USB_HC_StartXfer+0xb6>
{
num_packets = (uint16_t)((hc->xfer_len + hc->max_packet - 1U) / hc->max_packet);
80068e4: 68bb ldr r3, [r7, #8]
80068e6: 691b ldr r3, [r3, #16]
80068e8: 68ba ldr r2, [r7, #8]
80068ea: 8912 ldrh r2, [r2, #8]
80068ec: 4413 add r3, r2
80068ee: 3b01 subs r3, #1
80068f0: 68ba ldr r2, [r7, #8]
80068f2: 8912 ldrh r2, [r2, #8]
80068f4: fbb3 f3f2 udiv r3, r3, r2
80068f8: 84fb strh r3, [r7, #38] ; 0x26
if (num_packets > max_hc_pkt_count)
80068fa: 8cfa ldrh r2, [r7, #38] ; 0x26
80068fc: 8b7b ldrh r3, [r7, #26]
80068fe: 429a cmp r2, r3
8006900: d90b bls.n 800691a <USB_HC_StartXfer+0xba>
{
num_packets = max_hc_pkt_count;
8006902: 8b7b ldrh r3, [r7, #26]
8006904: 84fb strh r3, [r7, #38] ; 0x26
hc->xfer_len = (uint32_t)num_packets * hc->max_packet;
8006906: 8cfb ldrh r3, [r7, #38] ; 0x26
8006908: 68ba ldr r2, [r7, #8]
800690a: 8912 ldrh r2, [r2, #8]
800690c: fb02 f203 mul.w r2, r2, r3
8006910: 68bb ldr r3, [r7, #8]
8006912: 611a str r2, [r3, #16]
8006914: e001 b.n 800691a <USB_HC_StartXfer+0xba>
}
}
else
{
num_packets = 1U;
8006916: 2301 movs r3, #1
8006918: 84fb strh r3, [r7, #38] ; 0x26
}
if (hc->ep_is_in != 0U)
800691a: 68bb ldr r3, [r7, #8]
800691c: 78db ldrb r3, [r3, #3]
800691e: 2b00 cmp r3, #0
8006920: d006 beq.n 8006930 <USB_HC_StartXfer+0xd0>
{
hc->xfer_len = (uint32_t)num_packets * hc->max_packet;
8006922: 8cfb ldrh r3, [r7, #38] ; 0x26
8006924: 68ba ldr r2, [r7, #8]
8006926: 8912 ldrh r2, [r2, #8]
8006928: fb02 f203 mul.w r2, r2, r3
800692c: 68bb ldr r3, [r7, #8]
800692e: 611a str r2, [r3, #16]
}
/* Initialize the HCTSIZn register */
USBx_HC(ch_num)->HCTSIZ = (hc->xfer_len & USB_OTG_HCTSIZ_XFRSIZ) |
8006930: 68bb ldr r3, [r7, #8]
8006932: 691b ldr r3, [r3, #16]
8006934: f3c3 0212 ubfx r2, r3, #0, #19
(((uint32_t)num_packets << 19) & USB_OTG_HCTSIZ_PKTCNT) |
8006938: 8cfb ldrh r3, [r7, #38] ; 0x26
800693a: 04d9 lsls r1, r3, #19
800693c: 4b69 ldr r3, [pc, #420] ; (8006ae4 <USB_HC_StartXfer+0x284>)
800693e: 400b ands r3, r1
USBx_HC(ch_num)->HCTSIZ = (hc->xfer_len & USB_OTG_HCTSIZ_XFRSIZ) |
8006940: 431a orrs r2, r3
(((uint32_t)hc->data_pid << 29) & USB_OTG_HCTSIZ_DPID);
8006942: 68bb ldr r3, [r7, #8]
8006944: 7a9b ldrb r3, [r3, #10]
8006946: 075b lsls r3, r3, #29
8006948: f003 43c0 and.w r3, r3, #1610612736 ; 0x60000000
USBx_HC(ch_num)->HCTSIZ = (hc->xfer_len & USB_OTG_HCTSIZ_XFRSIZ) |
800694c: 69f9 ldr r1, [r7, #28]
800694e: 0148 lsls r0, r1, #5
8006950: 6a39 ldr r1, [r7, #32]
8006952: 4401 add r1, r0
8006954: f501 61a0 add.w r1, r1, #1280 ; 0x500
(((uint32_t)num_packets << 19) & USB_OTG_HCTSIZ_PKTCNT) |
8006958: 4313 orrs r3, r2
USBx_HC(ch_num)->HCTSIZ = (hc->xfer_len & USB_OTG_HCTSIZ_XFRSIZ) |
800695a: 610b str r3, [r1, #16]
if (dma != 0U)
800695c: 79fb ldrb r3, [r7, #7]
800695e: 2b00 cmp r3, #0
8006960: d009 beq.n 8006976 <USB_HC_StartXfer+0x116>
{
/* xfer_buff MUST be 32-bits aligned */
USBx_HC(ch_num)->HCDMA = (uint32_t)hc->xfer_buff;
8006962: 68bb ldr r3, [r7, #8]
8006964: 68d9 ldr r1, [r3, #12]
8006966: 69fb ldr r3, [r7, #28]
8006968: 015a lsls r2, r3, #5
800696a: 6a3b ldr r3, [r7, #32]
800696c: 4413 add r3, r2
800696e: f503 63a0 add.w r3, r3, #1280 ; 0x500
8006972: 460a mov r2, r1
8006974: 615a str r2, [r3, #20]
}
is_oddframe = (((uint32_t)USBx_HOST->HFNUM & 0x01U) != 0U) ? 0U : 1U;
8006976: 6a3b ldr r3, [r7, #32]
8006978: f503 6380 add.w r3, r3, #1024 ; 0x400
800697c: 689b ldr r3, [r3, #8]
800697e: f003 0301 and.w r3, r3, #1
8006982: 2b00 cmp r3, #0
8006984: bf0c ite eq
8006986: 2301 moveq r3, #1
8006988: 2300 movne r3, #0
800698a: b2db uxtb r3, r3
800698c: 767b strb r3, [r7, #25]
USBx_HC(ch_num)->HCCHAR &= ~USB_OTG_HCCHAR_ODDFRM;
800698e: 69fb ldr r3, [r7, #28]
8006990: 015a lsls r2, r3, #5
8006992: 6a3b ldr r3, [r7, #32]
8006994: 4413 add r3, r2
8006996: f503 63a0 add.w r3, r3, #1280 ; 0x500
800699a: 681b ldr r3, [r3, #0]
800699c: 69fa ldr r2, [r7, #28]
800699e: 0151 lsls r1, r2, #5
80069a0: 6a3a ldr r2, [r7, #32]
80069a2: 440a add r2, r1
80069a4: f502 62a0 add.w r2, r2, #1280 ; 0x500
80069a8: f023 5300 bic.w r3, r3, #536870912 ; 0x20000000
80069ac: 6013 str r3, [r2, #0]
USBx_HC(ch_num)->HCCHAR |= (uint32_t)is_oddframe << 29;
80069ae: 69fb ldr r3, [r7, #28]
80069b0: 015a lsls r2, r3, #5
80069b2: 6a3b ldr r3, [r7, #32]
80069b4: 4413 add r3, r2
80069b6: f503 63a0 add.w r3, r3, #1280 ; 0x500
80069ba: 681a ldr r2, [r3, #0]
80069bc: 7e7b ldrb r3, [r7, #25]
80069be: 075b lsls r3, r3, #29
80069c0: 69f9 ldr r1, [r7, #28]
80069c2: 0148 lsls r0, r1, #5
80069c4: 6a39 ldr r1, [r7, #32]
80069c6: 4401 add r1, r0
80069c8: f501 61a0 add.w r1, r1, #1280 ; 0x500
80069cc: 4313 orrs r3, r2
80069ce: 600b str r3, [r1, #0]
/* Set host channel enable */
tmpreg = USBx_HC(ch_num)->HCCHAR;
80069d0: 69fb ldr r3, [r7, #28]
80069d2: 015a lsls r2, r3, #5
80069d4: 6a3b ldr r3, [r7, #32]
80069d6: 4413 add r3, r2
80069d8: f503 63a0 add.w r3, r3, #1280 ; 0x500
80069dc: 681b ldr r3, [r3, #0]
80069de: 4a42 ldr r2, [pc, #264] ; (8006ae8 <USB_HC_StartXfer+0x288>)
80069e0: 6013 str r3, [r2, #0]
tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
80069e2: 4b41 ldr r3, [pc, #260] ; (8006ae8 <USB_HC_StartXfer+0x288>)
80069e4: 681b ldr r3, [r3, #0]
80069e6: f023 4380 bic.w r3, r3, #1073741824 ; 0x40000000
80069ea: 4a3f ldr r2, [pc, #252] ; (8006ae8 <USB_HC_StartXfer+0x288>)
80069ec: 6013 str r3, [r2, #0]
/* make sure to set the correct ep direction */
if (hc->ep_is_in != 0U)
80069ee: 68bb ldr r3, [r7, #8]
80069f0: 78db ldrb r3, [r3, #3]
80069f2: 2b00 cmp r3, #0
80069f4: d006 beq.n 8006a04 <USB_HC_StartXfer+0x1a4>
{
tmpreg |= USB_OTG_HCCHAR_EPDIR;
80069f6: 4b3c ldr r3, [pc, #240] ; (8006ae8 <USB_HC_StartXfer+0x288>)
80069f8: 681b ldr r3, [r3, #0]
80069fa: f443 4300 orr.w r3, r3, #32768 ; 0x8000
80069fe: 4a3a ldr r2, [pc, #232] ; (8006ae8 <USB_HC_StartXfer+0x288>)
8006a00: 6013 str r3, [r2, #0]
8006a02: e005 b.n 8006a10 <USB_HC_StartXfer+0x1b0>
}
else
{
tmpreg &= ~USB_OTG_HCCHAR_EPDIR;
8006a04: 4b38 ldr r3, [pc, #224] ; (8006ae8 <USB_HC_StartXfer+0x288>)
8006a06: 681b ldr r3, [r3, #0]
8006a08: f423 4300 bic.w r3, r3, #32768 ; 0x8000
8006a0c: 4a36 ldr r2, [pc, #216] ; (8006ae8 <USB_HC_StartXfer+0x288>)
8006a0e: 6013 str r3, [r2, #0]
}
tmpreg |= USB_OTG_HCCHAR_CHENA;
8006a10: 4b35 ldr r3, [pc, #212] ; (8006ae8 <USB_HC_StartXfer+0x288>)
8006a12: 681b ldr r3, [r3, #0]
8006a14: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
8006a18: 4a33 ldr r2, [pc, #204] ; (8006ae8 <USB_HC_StartXfer+0x288>)
8006a1a: 6013 str r3, [r2, #0]
USBx_HC(ch_num)->HCCHAR = tmpreg;
8006a1c: 69fb ldr r3, [r7, #28]
8006a1e: 015a lsls r2, r3, #5
8006a20: 6a3b ldr r3, [r7, #32]
8006a22: 4413 add r3, r2
8006a24: f503 63a0 add.w r3, r3, #1280 ; 0x500
8006a28: 461a mov r2, r3
8006a2a: 4b2f ldr r3, [pc, #188] ; (8006ae8 <USB_HC_StartXfer+0x288>)
8006a2c: 681b ldr r3, [r3, #0]
8006a2e: 6013 str r3, [r2, #0]
if (dma != 0U) /* dma mode */
8006a30: 79fb ldrb r3, [r7, #7]
8006a32: 2b00 cmp r3, #0
8006a34: d001 beq.n 8006a3a <USB_HC_StartXfer+0x1da>
{
return HAL_OK;
8006a36: 2300 movs r3, #0
8006a38: e04f b.n 8006ada <USB_HC_StartXfer+0x27a>
}
if ((hc->ep_is_in == 0U) && (hc->xfer_len > 0U))
8006a3a: 68bb ldr r3, [r7, #8]
8006a3c: 78db ldrb r3, [r3, #3]
8006a3e: 2b00 cmp r3, #0
8006a40: d14a bne.n 8006ad8 <USB_HC_StartXfer+0x278>
8006a42: 68bb ldr r3, [r7, #8]
8006a44: 691b ldr r3, [r3, #16]
8006a46: 2b00 cmp r3, #0
8006a48: d046 beq.n 8006ad8 <USB_HC_StartXfer+0x278>
{
switch (hc->ep_type)
8006a4a: 68bb ldr r3, [r7, #8]
8006a4c: 79db ldrb r3, [r3, #7]
8006a4e: 2b03 cmp r3, #3
8006a50: d830 bhi.n 8006ab4 <USB_HC_StartXfer+0x254>
8006a52: a201 add r2, pc, #4 ; (adr r2, 8006a58 <USB_HC_StartXfer+0x1f8>)
8006a54: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8006a58: 08006a69 .word 0x08006a69
8006a5c: 08006a8d .word 0x08006a8d
8006a60: 08006a69 .word 0x08006a69
8006a64: 08006a8d .word 0x08006a8d
{
/* Non periodic transfer */
case EP_TYPE_CTRL:
case EP_TYPE_BULK:
len_words = (uint16_t)((hc->xfer_len + 3U) / 4U);
8006a68: 68bb ldr r3, [r7, #8]
8006a6a: 691b ldr r3, [r3, #16]
8006a6c: 3303 adds r3, #3
8006a6e: 089b lsrs r3, r3, #2
8006a70: 82fb strh r3, [r7, #22]
/* check if there is enough space in FIFO space */
if (len_words > (USBx->HNPTXSTS & 0xFFFFU))
8006a72: 8afa ldrh r2, [r7, #22]
8006a74: 68fb ldr r3, [r7, #12]
8006a76: 6adb ldr r3, [r3, #44] ; 0x2c
8006a78: b29b uxth r3, r3
8006a7a: 429a cmp r2, r3
8006a7c: d91c bls.n 8006ab8 <USB_HC_StartXfer+0x258>
{
/* need to process data in nptxfempty interrupt */
USBx->GINTMSK |= USB_OTG_GINTMSK_NPTXFEM;
8006a7e: 68fb ldr r3, [r7, #12]
8006a80: 699b ldr r3, [r3, #24]
8006a82: f043 0220 orr.w r2, r3, #32
8006a86: 68fb ldr r3, [r7, #12]
8006a88: 619a str r2, [r3, #24]
}
break;
8006a8a: e015 b.n 8006ab8 <USB_HC_StartXfer+0x258>
/* Periodic transfer */
case EP_TYPE_INTR:
case EP_TYPE_ISOC:
len_words = (uint16_t)((hc->xfer_len + 3U) / 4U);
8006a8c: 68bb ldr r3, [r7, #8]
8006a8e: 691b ldr r3, [r3, #16]
8006a90: 3303 adds r3, #3
8006a92: 089b lsrs r3, r3, #2
8006a94: 82fb strh r3, [r7, #22]
/* check if there is enough space in FIFO space */
if (len_words > (USBx_HOST->HPTXSTS & 0xFFFFU)) /* split the transfer */
8006a96: 8afa ldrh r2, [r7, #22]
8006a98: 6a3b ldr r3, [r7, #32]
8006a9a: f503 6380 add.w r3, r3, #1024 ; 0x400
8006a9e: 691b ldr r3, [r3, #16]
8006aa0: b29b uxth r3, r3
8006aa2: 429a cmp r2, r3
8006aa4: d90a bls.n 8006abc <USB_HC_StartXfer+0x25c>
{
/* need to process data in ptxfempty interrupt */
USBx->GINTMSK |= USB_OTG_GINTMSK_PTXFEM;
8006aa6: 68fb ldr r3, [r7, #12]
8006aa8: 699b ldr r3, [r3, #24]
8006aaa: f043 6280 orr.w r2, r3, #67108864 ; 0x4000000
8006aae: 68fb ldr r3, [r7, #12]
8006ab0: 619a str r2, [r3, #24]
}
break;
8006ab2: e003 b.n 8006abc <USB_HC_StartXfer+0x25c>
default:
break;
8006ab4: bf00 nop
8006ab6: e002 b.n 8006abe <USB_HC_StartXfer+0x25e>
break;
8006ab8: bf00 nop
8006aba: e000 b.n 8006abe <USB_HC_StartXfer+0x25e>
break;
8006abc: bf00 nop
}
/* Write packet into the Tx FIFO. */
(void)USB_WritePacket(USBx, hc->xfer_buff, hc->ch_num, (uint16_t)hc->xfer_len, 0);
8006abe: 68bb ldr r3, [r7, #8]
8006ac0: 68d9 ldr r1, [r3, #12]
8006ac2: 68bb ldr r3, [r7, #8]
8006ac4: 785a ldrb r2, [r3, #1]
8006ac6: 68bb ldr r3, [r7, #8]
8006ac8: 691b ldr r3, [r3, #16]
8006aca: b298 uxth r0, r3
8006acc: 2300 movs r3, #0
8006ace: 9300 str r3, [sp, #0]
8006ad0: 4603 mov r3, r0
8006ad2: 68f8 ldr r0, [r7, #12]
8006ad4: f7ff fb84 bl 80061e0 <USB_WritePacket>
}
return HAL_OK;
8006ad8: 2300 movs r3, #0
}
8006ada: 4618 mov r0, r3
8006adc: 3728 adds r7, #40 ; 0x28
8006ade: 46bd mov sp, r7
8006ae0: bd80 pop {r7, pc}
8006ae2: bf00 nop
8006ae4: 1ff80000 .word 0x1ff80000
8006ae8: 200000cc .word 0x200000cc
08006aec <USB_HC_ReadInterrupt>:
* @brief Read all host channel interrupts status
* @param USBx Selected device
* @retval HAL state
*/
uint32_t USB_HC_ReadInterrupt(USB_OTG_GlobalTypeDef *USBx)
{
8006aec: b480 push {r7}
8006aee: b085 sub sp, #20
8006af0: af00 add r7, sp, #0
8006af2: 6078 str r0, [r7, #4]
uint32_t USBx_BASE = (uint32_t)USBx;
8006af4: 687b ldr r3, [r7, #4]
8006af6: 60fb str r3, [r7, #12]
return ((USBx_HOST->HAINT) & 0xFFFFU);
8006af8: 68fb ldr r3, [r7, #12]
8006afa: f503 6380 add.w r3, r3, #1024 ; 0x400
8006afe: 695b ldr r3, [r3, #20]
8006b00: b29b uxth r3, r3
}
8006b02: 4618 mov r0, r3
8006b04: 3714 adds r7, #20
8006b06: 46bd mov sp, r7
8006b08: f85d 7b04 ldr.w r7, [sp], #4
8006b0c: 4770 bx lr
08006b0e <USB_HC_Halt>:
* @param hc_num Host Channel number
* This parameter can be a value from 1 to 15
* @retval HAL state
*/
HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx, uint8_t hc_num)
{
8006b0e: b480 push {r7}
8006b10: b087 sub sp, #28
8006b12: af00 add r7, sp, #0
8006b14: 6078 str r0, [r7, #4]
8006b16: 460b mov r3, r1
8006b18: 70fb strb r3, [r7, #3]
uint32_t USBx_BASE = (uint32_t)USBx;
8006b1a: 687b ldr r3, [r7, #4]
8006b1c: 613b str r3, [r7, #16]
uint32_t hcnum = (uint32_t)hc_num;
8006b1e: 78fb ldrb r3, [r7, #3]
8006b20: 60fb str r3, [r7, #12]
uint32_t count = 0U;
8006b22: 2300 movs r3, #0
8006b24: 617b str r3, [r7, #20]
uint32_t HcEpType = (USBx_HC(hcnum)->HCCHAR & USB_OTG_HCCHAR_EPTYP) >> 18;
8006b26: 68fb ldr r3, [r7, #12]
8006b28: 015a lsls r2, r3, #5
8006b2a: 693b ldr r3, [r7, #16]
8006b2c: 4413 add r3, r2
8006b2e: f503 63a0 add.w r3, r3, #1280 ; 0x500
8006b32: 681b ldr r3, [r3, #0]
8006b34: 0c9b lsrs r3, r3, #18
8006b36: f003 0303 and.w r3, r3, #3
8006b3a: 60bb str r3, [r7, #8]
/* Check for space in the request queue to issue the halt. */
if ((HcEpType == HCCHAR_CTRL) || (HcEpType == HCCHAR_BULK))
8006b3c: 68bb ldr r3, [r7, #8]
8006b3e: 2b00 cmp r3, #0
8006b40: d002 beq.n 8006b48 <USB_HC_Halt+0x3a>
8006b42: 68bb ldr r3, [r7, #8]
8006b44: 2b02 cmp r3, #2
8006b46: d16c bne.n 8006c22 <USB_HC_Halt+0x114>
{
USBx_HC(hcnum)->HCCHAR |= USB_OTG_HCCHAR_CHDIS;
8006b48: 68fb ldr r3, [r7, #12]
8006b4a: 015a lsls r2, r3, #5
8006b4c: 693b ldr r3, [r7, #16]
8006b4e: 4413 add r3, r2
8006b50: f503 63a0 add.w r3, r3, #1280 ; 0x500
8006b54: 681b ldr r3, [r3, #0]
8006b56: 68fa ldr r2, [r7, #12]
8006b58: 0151 lsls r1, r2, #5
8006b5a: 693a ldr r2, [r7, #16]
8006b5c: 440a add r2, r1
8006b5e: f502 62a0 add.w r2, r2, #1280 ; 0x500
8006b62: f043 4380 orr.w r3, r3, #1073741824 ; 0x40000000
8006b66: 6013 str r3, [r2, #0]
if ((USBx->HNPTXSTS & (0xFFU << 16)) == 0U)
8006b68: 687b ldr r3, [r7, #4]
8006b6a: 6adb ldr r3, [r3, #44] ; 0x2c
8006b6c: f403 037f and.w r3, r3, #16711680 ; 0xff0000
8006b70: 2b00 cmp r3, #0
8006b72: d143 bne.n 8006bfc <USB_HC_Halt+0xee>
{
USBx_HC(hcnum)->HCCHAR &= ~USB_OTG_HCCHAR_CHENA;
8006b74: 68fb ldr r3, [r7, #12]
8006b76: 015a lsls r2, r3, #5
8006b78: 693b ldr r3, [r7, #16]
8006b7a: 4413 add r3, r2
8006b7c: f503 63a0 add.w r3, r3, #1280 ; 0x500
8006b80: 681b ldr r3, [r3, #0]
8006b82: 68fa ldr r2, [r7, #12]
8006b84: 0151 lsls r1, r2, #5
8006b86: 693a ldr r2, [r7, #16]
8006b88: 440a add r2, r1
8006b8a: f502 62a0 add.w r2, r2, #1280 ; 0x500
8006b8e: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000
8006b92: 6013 str r3, [r2, #0]
USBx_HC(hcnum)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
8006b94: 68fb ldr r3, [r7, #12]
8006b96: 015a lsls r2, r3, #5
8006b98: 693b ldr r3, [r7, #16]
8006b9a: 4413 add r3, r2
8006b9c: f503 63a0 add.w r3, r3, #1280 ; 0x500
8006ba0: 681b ldr r3, [r3, #0]
8006ba2: 68fa ldr r2, [r7, #12]
8006ba4: 0151 lsls r1, r2, #5
8006ba6: 693a ldr r2, [r7, #16]
8006ba8: 440a add r2, r1
8006baa: f502 62a0 add.w r2, r2, #1280 ; 0x500
8006bae: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
8006bb2: 6013 str r3, [r2, #0]
USBx_HC(hcnum)->HCCHAR &= ~USB_OTG_HCCHAR_EPDIR;
8006bb4: 68fb ldr r3, [r7, #12]
8006bb6: 015a lsls r2, r3, #5
8006bb8: 693b ldr r3, [r7, #16]
8006bba: 4413 add r3, r2
8006bbc: f503 63a0 add.w r3, r3, #1280 ; 0x500
8006bc0: 681b ldr r3, [r3, #0]
8006bc2: 68fa ldr r2, [r7, #12]
8006bc4: 0151 lsls r1, r2, #5
8006bc6: 693a ldr r2, [r7, #16]
8006bc8: 440a add r2, r1
8006bca: f502 62a0 add.w r2, r2, #1280 ; 0x500
8006bce: f423 4300 bic.w r3, r3, #32768 ; 0x8000
8006bd2: 6013 str r3, [r2, #0]
do
{
if (++count > 1000U)
8006bd4: 697b ldr r3, [r7, #20]
8006bd6: 3301 adds r3, #1
8006bd8: 617b str r3, [r7, #20]
8006bda: 697b ldr r3, [r7, #20]
8006bdc: f5b3 7f7a cmp.w r3, #1000 ; 0x3e8
8006be0: d81d bhi.n 8006c1e <USB_HC_Halt+0x110>
{
break;
}
} while ((USBx_HC(hcnum)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
8006be2: 68fb ldr r3, [r7, #12]
8006be4: 015a lsls r2, r3, #5
8006be6: 693b ldr r3, [r7, #16]
8006be8: 4413 add r3, r2
8006bea: f503 63a0 add.w r3, r3, #1280 ; 0x500
8006bee: 681b ldr r3, [r3, #0]
8006bf0: f003 4300 and.w r3, r3, #2147483648 ; 0x80000000
8006bf4: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000
8006bf8: d0ec beq.n 8006bd4 <USB_HC_Halt+0xc6>
if ((USBx->HNPTXSTS & (0xFFU << 16)) == 0U)
8006bfa: e080 b.n 8006cfe <USB_HC_Halt+0x1f0>
}
else
{
USBx_HC(hcnum)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
8006bfc: 68fb ldr r3, [r7, #12]
8006bfe: 015a lsls r2, r3, #5
8006c00: 693b ldr r3, [r7, #16]
8006c02: 4413 add r3, r2
8006c04: f503 63a0 add.w r3, r3, #1280 ; 0x500
8006c08: 681b ldr r3, [r3, #0]
8006c0a: 68fa ldr r2, [r7, #12]
8006c0c: 0151 lsls r1, r2, #5
8006c0e: 693a ldr r2, [r7, #16]
8006c10: 440a add r2, r1
8006c12: f502 62a0 add.w r2, r2, #1280 ; 0x500
8006c16: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
8006c1a: 6013 str r3, [r2, #0]
if ((USBx->HNPTXSTS & (0xFFU << 16)) == 0U)
8006c1c: e06f b.n 8006cfe <USB_HC_Halt+0x1f0>
break;
8006c1e: bf00 nop
if ((USBx->HNPTXSTS & (0xFFU << 16)) == 0U)
8006c20: e06d b.n 8006cfe <USB_HC_Halt+0x1f0>
}
}
else
{
USBx_HC(hcnum)->HCCHAR |= USB_OTG_HCCHAR_CHDIS;
8006c22: 68fb ldr r3, [r7, #12]
8006c24: 015a lsls r2, r3, #5
8006c26: 693b ldr r3, [r7, #16]
8006c28: 4413 add r3, r2
8006c2a: f503 63a0 add.w r3, r3, #1280 ; 0x500
8006c2e: 681b ldr r3, [r3, #0]
8006c30: 68fa ldr r2, [r7, #12]
8006c32: 0151 lsls r1, r2, #5
8006c34: 693a ldr r2, [r7, #16]
8006c36: 440a add r2, r1
8006c38: f502 62a0 add.w r2, r2, #1280 ; 0x500
8006c3c: f043 4380 orr.w r3, r3, #1073741824 ; 0x40000000
8006c40: 6013 str r3, [r2, #0]
if ((USBx_HOST->HPTXSTS & (0xFFU << 16)) == 0U)
8006c42: 693b ldr r3, [r7, #16]
8006c44: f503 6380 add.w r3, r3, #1024 ; 0x400
8006c48: 691b ldr r3, [r3, #16]
8006c4a: f403 037f and.w r3, r3, #16711680 ; 0xff0000
8006c4e: 2b00 cmp r3, #0
8006c50: d143 bne.n 8006cda <USB_HC_Halt+0x1cc>
{
USBx_HC(hcnum)->HCCHAR &= ~USB_OTG_HCCHAR_CHENA;
8006c52: 68fb ldr r3, [r7, #12]
8006c54: 015a lsls r2, r3, #5
8006c56: 693b ldr r3, [r7, #16]
8006c58: 4413 add r3, r2
8006c5a: f503 63a0 add.w r3, r3, #1280 ; 0x500
8006c5e: 681b ldr r3, [r3, #0]
8006c60: 68fa ldr r2, [r7, #12]
8006c62: 0151 lsls r1, r2, #5
8006c64: 693a ldr r2, [r7, #16]
8006c66: 440a add r2, r1
8006c68: f502 62a0 add.w r2, r2, #1280 ; 0x500
8006c6c: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000
8006c70: 6013 str r3, [r2, #0]
USBx_HC(hcnum)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
8006c72: 68fb ldr r3, [r7, #12]
8006c74: 015a lsls r2, r3, #5
8006c76: 693b ldr r3, [r7, #16]
8006c78: 4413 add r3, r2
8006c7a: f503 63a0 add.w r3, r3, #1280 ; 0x500
8006c7e: 681b ldr r3, [r3, #0]
8006c80: 68fa ldr r2, [r7, #12]
8006c82: 0151 lsls r1, r2, #5
8006c84: 693a ldr r2, [r7, #16]
8006c86: 440a add r2, r1
8006c88: f502 62a0 add.w r2, r2, #1280 ; 0x500
8006c8c: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
8006c90: 6013 str r3, [r2, #0]
USBx_HC(hcnum)->HCCHAR &= ~USB_OTG_HCCHAR_EPDIR;
8006c92: 68fb ldr r3, [r7, #12]
8006c94: 015a lsls r2, r3, #5
8006c96: 693b ldr r3, [r7, #16]
8006c98: 4413 add r3, r2
8006c9a: f503 63a0 add.w r3, r3, #1280 ; 0x500
8006c9e: 681b ldr r3, [r3, #0]
8006ca0: 68fa ldr r2, [r7, #12]
8006ca2: 0151 lsls r1, r2, #5
8006ca4: 693a ldr r2, [r7, #16]
8006ca6: 440a add r2, r1
8006ca8: f502 62a0 add.w r2, r2, #1280 ; 0x500
8006cac: f423 4300 bic.w r3, r3, #32768 ; 0x8000
8006cb0: 6013 str r3, [r2, #0]
do
{
if (++count > 1000U)
8006cb2: 697b ldr r3, [r7, #20]
8006cb4: 3301 adds r3, #1
8006cb6: 617b str r3, [r7, #20]
8006cb8: 697b ldr r3, [r7, #20]
8006cba: f5b3 7f7a cmp.w r3, #1000 ; 0x3e8
8006cbe: d81d bhi.n 8006cfc <USB_HC_Halt+0x1ee>
{
break;
}
} while ((USBx_HC(hcnum)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
8006cc0: 68fb ldr r3, [r7, #12]
8006cc2: 015a lsls r2, r3, #5
8006cc4: 693b ldr r3, [r7, #16]
8006cc6: 4413 add r3, r2
8006cc8: f503 63a0 add.w r3, r3, #1280 ; 0x500
8006ccc: 681b ldr r3, [r3, #0]
8006cce: f003 4300 and.w r3, r3, #2147483648 ; 0x80000000
8006cd2: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000
8006cd6: d0ec beq.n 8006cb2 <USB_HC_Halt+0x1a4>
8006cd8: e011 b.n 8006cfe <USB_HC_Halt+0x1f0>
}
else
{
USBx_HC(hcnum)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
8006cda: 68fb ldr r3, [r7, #12]
8006cdc: 015a lsls r2, r3, #5
8006cde: 693b ldr r3, [r7, #16]
8006ce0: 4413 add r3, r2
8006ce2: f503 63a0 add.w r3, r3, #1280 ; 0x500
8006ce6: 681b ldr r3, [r3, #0]
8006ce8: 68fa ldr r2, [r7, #12]
8006cea: 0151 lsls r1, r2, #5
8006cec: 693a ldr r2, [r7, #16]
8006cee: 440a add r2, r1
8006cf0: f502 62a0 add.w r2, r2, #1280 ; 0x500
8006cf4: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
8006cf8: 6013 str r3, [r2, #0]
8006cfa: e000 b.n 8006cfe <USB_HC_Halt+0x1f0>
break;
8006cfc: bf00 nop
}
}
return HAL_OK;
8006cfe: 2300 movs r3, #0
}
8006d00: 4618 mov r0, r3
8006d02: 371c adds r7, #28
8006d04: 46bd mov sp, r7
8006d06: f85d 7b04 ldr.w r7, [sp], #4
8006d0a: 4770 bx lr
08006d0c <USB_DoPing>:
* @param hc_num Host Channel number
* This parameter can be a value from 1 to 15
* @retval HAL state
*/
HAL_StatusTypeDef USB_DoPing(USB_OTG_GlobalTypeDef *USBx, uint8_t ch_num)
{
8006d0c: b480 push {r7}
8006d0e: b087 sub sp, #28
8006d10: af00 add r7, sp, #0
8006d12: 6078 str r0, [r7, #4]
8006d14: 460b mov r3, r1
8006d16: 70fb strb r3, [r7, #3]
uint32_t USBx_BASE = (uint32_t)USBx;
8006d18: 687b ldr r3, [r7, #4]
8006d1a: 617b str r3, [r7, #20]
uint32_t chnum = (uint32_t)ch_num;
8006d1c: 78fb ldrb r3, [r7, #3]
8006d1e: 613b str r3, [r7, #16]
uint32_t num_packets = 1U;
8006d20: 2301 movs r3, #1
8006d22: 60fb str r3, [r7, #12]
uint32_t tmpreg;
USBx_HC(chnum)->HCTSIZ = ((num_packets << 19) & USB_OTG_HCTSIZ_PKTCNT) |
8006d24: 68fb ldr r3, [r7, #12]
8006d26: 04da lsls r2, r3, #19
8006d28: 4b15 ldr r3, [pc, #84] ; (8006d80 <USB_DoPing+0x74>)
8006d2a: 4013 ands r3, r2
8006d2c: 693a ldr r2, [r7, #16]
8006d2e: 0151 lsls r1, r2, #5
8006d30: 697a ldr r2, [r7, #20]
8006d32: 440a add r2, r1
8006d34: f502 62a0 add.w r2, r2, #1280 ; 0x500
8006d38: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
8006d3c: 6113 str r3, [r2, #16]
USB_OTG_HCTSIZ_DOPING;
/* Set host channel enable */
tmpreg = USBx_HC(chnum)->HCCHAR;
8006d3e: 693b ldr r3, [r7, #16]
8006d40: 015a lsls r2, r3, #5
8006d42: 697b ldr r3, [r7, #20]
8006d44: 4413 add r3, r2
8006d46: f503 63a0 add.w r3, r3, #1280 ; 0x500
8006d4a: 681b ldr r3, [r3, #0]
8006d4c: 60bb str r3, [r7, #8]
tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
8006d4e: 68bb ldr r3, [r7, #8]
8006d50: f023 4380 bic.w r3, r3, #1073741824 ; 0x40000000
8006d54: 60bb str r3, [r7, #8]
tmpreg |= USB_OTG_HCCHAR_CHENA;
8006d56: 68bb ldr r3, [r7, #8]
8006d58: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
8006d5c: 60bb str r3, [r7, #8]
USBx_HC(chnum)->HCCHAR = tmpreg;
8006d5e: 693b ldr r3, [r7, #16]
8006d60: 015a lsls r2, r3, #5
8006d62: 697b ldr r3, [r7, #20]
8006d64: 4413 add r3, r2
8006d66: f503 63a0 add.w r3, r3, #1280 ; 0x500
8006d6a: 461a mov r2, r3
8006d6c: 68bb ldr r3, [r7, #8]
8006d6e: 6013 str r3, [r2, #0]
return HAL_OK;
8006d70: 2300 movs r3, #0
}
8006d72: 4618 mov r0, r3
8006d74: 371c adds r7, #28
8006d76: 46bd mov sp, r7
8006d78: f85d 7b04 ldr.w r7, [sp], #4
8006d7c: 4770 bx lr
8006d7e: bf00 nop
8006d80: 1ff80000 .word 0x1ff80000
08006d84 <USB_StopHost>:
* @brief Stop Host Core
* @param USBx Selected device
* @retval HAL state
*/
HAL_StatusTypeDef USB_StopHost(USB_OTG_GlobalTypeDef *USBx)
{
8006d84: b580 push {r7, lr}
8006d86: b086 sub sp, #24
8006d88: af00 add r7, sp, #0
8006d8a: 6078 str r0, [r7, #4]
uint32_t USBx_BASE = (uint32_t)USBx;
8006d8c: 687b ldr r3, [r7, #4]
8006d8e: 60fb str r3, [r7, #12]
uint32_t count = 0U;
8006d90: 2300 movs r3, #0
8006d92: 617b str r3, [r7, #20]
uint32_t value;
uint32_t i;
(void)USB_DisableGlobalInt(USBx);
8006d94: 6878 ldr r0, [r7, #4]
8006d96: f7ff f99f bl 80060d8 <USB_DisableGlobalInt>
/* Flush FIFO */
(void)USB_FlushTxFifo(USBx, 0x10U);
8006d9a: 2110 movs r1, #16
8006d9c: 6878 ldr r0, [r7, #4]
8006d9e: f7ff f9d7 bl 8006150 <USB_FlushTxFifo>
(void)USB_FlushRxFifo(USBx);
8006da2: 6878 ldr r0, [r7, #4]
8006da4: f7ff f9fa bl 800619c <USB_FlushRxFifo>
/* Flush out any leftover queued requests. */
for (i = 0U; i <= 15U; i++)
8006da8: 2300 movs r3, #0
8006daa: 613b str r3, [r7, #16]
8006dac: e01f b.n 8006dee <USB_StopHost+0x6a>
{
value = USBx_HC(i)->HCCHAR;
8006dae: 693b ldr r3, [r7, #16]
8006db0: 015a lsls r2, r3, #5
8006db2: 68fb ldr r3, [r7, #12]
8006db4: 4413 add r3, r2
8006db6: f503 63a0 add.w r3, r3, #1280 ; 0x500
8006dba: 681b ldr r3, [r3, #0]
8006dbc: 60bb str r3, [r7, #8]
value |= USB_OTG_HCCHAR_CHDIS;
8006dbe: 68bb ldr r3, [r7, #8]
8006dc0: f043 4380 orr.w r3, r3, #1073741824 ; 0x40000000
8006dc4: 60bb str r3, [r7, #8]
value &= ~USB_OTG_HCCHAR_CHENA;
8006dc6: 68bb ldr r3, [r7, #8]
8006dc8: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000
8006dcc: 60bb str r3, [r7, #8]
value &= ~USB_OTG_HCCHAR_EPDIR;
8006dce: 68bb ldr r3, [r7, #8]
8006dd0: f423 4300 bic.w r3, r3, #32768 ; 0x8000
8006dd4: 60bb str r3, [r7, #8]
USBx_HC(i)->HCCHAR = value;
8006dd6: 693b ldr r3, [r7, #16]
8006dd8: 015a lsls r2, r3, #5
8006dda: 68fb ldr r3, [r7, #12]
8006ddc: 4413 add r3, r2
8006dde: f503 63a0 add.w r3, r3, #1280 ; 0x500
8006de2: 461a mov r2, r3
8006de4: 68bb ldr r3, [r7, #8]
8006de6: 6013 str r3, [r2, #0]
for (i = 0U; i <= 15U; i++)
8006de8: 693b ldr r3, [r7, #16]
8006dea: 3301 adds r3, #1
8006dec: 613b str r3, [r7, #16]
8006dee: 693b ldr r3, [r7, #16]
8006df0: 2b0f cmp r3, #15
8006df2: d9dc bls.n 8006dae <USB_StopHost+0x2a>
}
/* Halt all channels to put them into a known state. */
for (i = 0U; i <= 15U; i++)
8006df4: 2300 movs r3, #0
8006df6: 613b str r3, [r7, #16]
8006df8: e034 b.n 8006e64 <USB_StopHost+0xe0>
{
value = USBx_HC(i)->HCCHAR;
8006dfa: 693b ldr r3, [r7, #16]
8006dfc: 015a lsls r2, r3, #5
8006dfe: 68fb ldr r3, [r7, #12]
8006e00: 4413 add r3, r2
8006e02: f503 63a0 add.w r3, r3, #1280 ; 0x500
8006e06: 681b ldr r3, [r3, #0]
8006e08: 60bb str r3, [r7, #8]
value |= USB_OTG_HCCHAR_CHDIS;
8006e0a: 68bb ldr r3, [r7, #8]
8006e0c: f043 4380 orr.w r3, r3, #1073741824 ; 0x40000000
8006e10: 60bb str r3, [r7, #8]
value |= USB_OTG_HCCHAR_CHENA;
8006e12: 68bb ldr r3, [r7, #8]
8006e14: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
8006e18: 60bb str r3, [r7, #8]
value &= ~USB_OTG_HCCHAR_EPDIR;
8006e1a: 68bb ldr r3, [r7, #8]
8006e1c: f423 4300 bic.w r3, r3, #32768 ; 0x8000
8006e20: 60bb str r3, [r7, #8]
USBx_HC(i)->HCCHAR = value;
8006e22: 693b ldr r3, [r7, #16]
8006e24: 015a lsls r2, r3, #5
8006e26: 68fb ldr r3, [r7, #12]
8006e28: 4413 add r3, r2
8006e2a: f503 63a0 add.w r3, r3, #1280 ; 0x500
8006e2e: 461a mov r2, r3
8006e30: 68bb ldr r3, [r7, #8]
8006e32: 6013 str r3, [r2, #0]
do
{
if (++count > 1000U)
8006e34: 697b ldr r3, [r7, #20]
8006e36: 3301 adds r3, #1
8006e38: 617b str r3, [r7, #20]
8006e3a: 697b ldr r3, [r7, #20]
8006e3c: f5b3 7f7a cmp.w r3, #1000 ; 0x3e8
8006e40: d80c bhi.n 8006e5c <USB_StopHost+0xd8>
{
break;
}
} while ((USBx_HC(i)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
8006e42: 693b ldr r3, [r7, #16]
8006e44: 015a lsls r2, r3, #5
8006e46: 68fb ldr r3, [r7, #12]
8006e48: 4413 add r3, r2
8006e4a: f503 63a0 add.w r3, r3, #1280 ; 0x500
8006e4e: 681b ldr r3, [r3, #0]
8006e50: f003 4300 and.w r3, r3, #2147483648 ; 0x80000000
8006e54: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000
8006e58: d0ec beq.n 8006e34 <USB_StopHost+0xb0>
8006e5a: e000 b.n 8006e5e <USB_StopHost+0xda>
break;
8006e5c: bf00 nop
for (i = 0U; i <= 15U; i++)
8006e5e: 693b ldr r3, [r7, #16]
8006e60: 3301 adds r3, #1
8006e62: 613b str r3, [r7, #16]
8006e64: 693b ldr r3, [r7, #16]
8006e66: 2b0f cmp r3, #15
8006e68: d9c7 bls.n 8006dfa <USB_StopHost+0x76>
}
/* Clear any pending Host interrupts */
USBx_HOST->HAINT = 0xFFFFFFFFU;
8006e6a: 68fb ldr r3, [r7, #12]
8006e6c: f503 6380 add.w r3, r3, #1024 ; 0x400
8006e70: 461a mov r2, r3
8006e72: f04f 33ff mov.w r3, #4294967295
8006e76: 6153 str r3, [r2, #20]
USBx->GINTSTS = 0xFFFFFFFFU;
8006e78: 687b ldr r3, [r7, #4]
8006e7a: f04f 32ff mov.w r2, #4294967295
8006e7e: 615a str r2, [r3, #20]
(void)USB_EnableGlobalInt(USBx);
8006e80: 6878 ldr r0, [r7, #4]
8006e82: f7ff f918 bl 80060b6 <USB_EnableGlobalInt>
return HAL_OK;
8006e86: 2300 movs r3, #0
}
8006e88: 4618 mov r0, r3
8006e8a: 3718 adds r7, #24
8006e8c: 46bd mov sp, r7
8006e8e: bd80 pop {r7, pc}
08006e90 <USBH_CDC_InterfaceInit>:
* The function init the CDC class.
* @param phost: Host handle
* @retval USBH Status
*/
static USBH_StatusTypeDef USBH_CDC_InterfaceInit(USBH_HandleTypeDef *phost)
{
8006e90: b590 push {r4, r7, lr}
8006e92: b089 sub sp, #36 ; 0x24
8006e94: af04 add r7, sp, #16
8006e96: 6078 str r0, [r7, #4]
USBH_StatusTypeDef status;
uint8_t interface;
CDC_HandleTypeDef *CDC_Handle;
interface = USBH_FindInterface(phost, COMMUNICATION_INTERFACE_CLASS_CODE,
8006e98: 2301 movs r3, #1
8006e9a: 2202 movs r2, #2
8006e9c: 2102 movs r1, #2
8006e9e: 6878 ldr r0, [r7, #4]
8006ea0: f000 fc68 bl 8007774 <USBH_FindInterface>
8006ea4: 4603 mov r3, r0
8006ea6: 73fb strb r3, [r7, #15]
ABSTRACT_CONTROL_MODEL, COMMON_AT_COMMAND);
if ((interface == 0xFFU) || (interface >= USBH_MAX_NUM_INTERFACES)) /* No Valid Interface */
8006ea8: 7bfb ldrb r3, [r7, #15]
8006eaa: 2bff cmp r3, #255 ; 0xff
8006eac: d002 beq.n 8006eb4 <USBH_CDC_InterfaceInit+0x24>
8006eae: 7bfb ldrb r3, [r7, #15]
8006eb0: 2b01 cmp r3, #1
8006eb2: d901 bls.n 8006eb8 <USBH_CDC_InterfaceInit+0x28>
{
USBH_DbgLog("Cannot Find the interface for Communication Interface Class.", phost->pActiveClass->Name);
return USBH_FAIL;
8006eb4: 2302 movs r3, #2
8006eb6: e13d b.n 8007134 <USBH_CDC_InterfaceInit+0x2a4>
}
status = USBH_SelectInterface(phost, interface);
8006eb8: 7bfb ldrb r3, [r7, #15]
8006eba: 4619 mov r1, r3
8006ebc: 6878 ldr r0, [r7, #4]
8006ebe: f000 fc3d bl 800773c <USBH_SelectInterface>
8006ec2: 4603 mov r3, r0
8006ec4: 73bb strb r3, [r7, #14]
if (status != USBH_OK)
8006ec6: 7bbb ldrb r3, [r7, #14]
8006ec8: 2b00 cmp r3, #0
8006eca: d001 beq.n 8006ed0 <USBH_CDC_InterfaceInit+0x40>
{
return USBH_FAIL;
8006ecc: 2302 movs r3, #2
8006ece: e131 b.n 8007134 <USBH_CDC_InterfaceInit+0x2a4>
}
phost->pActiveClass->pData = (CDC_HandleTypeDef *)USBH_malloc(sizeof(CDC_HandleTypeDef));
8006ed0: 687b ldr r3, [r7, #4]
8006ed2: f8d3 437c ldr.w r4, [r3, #892] ; 0x37c
8006ed6: 2050 movs r0, #80 ; 0x50
8006ed8: f002 fa04 bl 80092e4 <malloc>
8006edc: 4603 mov r3, r0
8006ede: 61e3 str r3, [r4, #28]
CDC_Handle = (CDC_HandleTypeDef *) phost->pActiveClass->pData;
8006ee0: 687b ldr r3, [r7, #4]
8006ee2: f8d3 337c ldr.w r3, [r3, #892] ; 0x37c
8006ee6: 69db ldr r3, [r3, #28]
8006ee8: 60bb str r3, [r7, #8]
if (CDC_Handle == NULL)
8006eea: 68bb ldr r3, [r7, #8]
8006eec: 2b00 cmp r3, #0
8006eee: d101 bne.n 8006ef4 <USBH_CDC_InterfaceInit+0x64>
{
USBH_DbgLog("Cannot allocate memory for CDC Handle");
return USBH_FAIL;
8006ef0: 2302 movs r3, #2
8006ef2: e11f b.n 8007134 <USBH_CDC_InterfaceInit+0x2a4>
}
/* Initialize cdc handler */
USBH_memset(CDC_Handle, 0, sizeof(CDC_HandleTypeDef));
8006ef4: 2250 movs r2, #80 ; 0x50
8006ef6: 2100 movs r1, #0
8006ef8: 68b8 ldr r0, [r7, #8]
8006efa: f002 fa03 bl 8009304 <memset>
/*Collect the notification endpoint address and length*/
if (phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].bEndpointAddress & 0x80U)
8006efe: 7bfb ldrb r3, [r7, #15]
8006f00: 687a ldr r2, [r7, #4]
8006f02: 211a movs r1, #26
8006f04: fb01 f303 mul.w r3, r1, r3
8006f08: 4413 add r3, r2
8006f0a: f203 334e addw r3, r3, #846 ; 0x34e
8006f0e: 781b ldrb r3, [r3, #0]
8006f10: b25b sxtb r3, r3
8006f12: 2b00 cmp r3, #0
8006f14: da15 bge.n 8006f42 <USBH_CDC_InterfaceInit+0xb2>
{
CDC_Handle->CommItf.NotifEp = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].bEndpointAddress;
8006f16: 7bfb ldrb r3, [r7, #15]
8006f18: 687a ldr r2, [r7, #4]
8006f1a: 211a movs r1, #26
8006f1c: fb01 f303 mul.w r3, r1, r3
8006f20: 4413 add r3, r2
8006f22: f203 334e addw r3, r3, #846 ; 0x34e
8006f26: 781a ldrb r2, [r3, #0]
8006f28: 68bb ldr r3, [r7, #8]
8006f2a: 705a strb r2, [r3, #1]
CDC_Handle->CommItf.NotifEpSize = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].wMaxPacketSize;
8006f2c: 7bfb ldrb r3, [r7, #15]
8006f2e: 687a ldr r2, [r7, #4]
8006f30: 211a movs r1, #26
8006f32: fb01 f303 mul.w r3, r1, r3
8006f36: 4413 add r3, r2
8006f38: f503 7354 add.w r3, r3, #848 ; 0x350
8006f3c: 881a ldrh r2, [r3, #0]
8006f3e: 68bb ldr r3, [r7, #8]
8006f40: 815a strh r2, [r3, #10]
}
/*Allocate the length for host channel number in*/
CDC_Handle->CommItf.NotifPipe = USBH_AllocPipe(phost, CDC_Handle->CommItf.NotifEp);
8006f42: 68bb ldr r3, [r7, #8]
8006f44: 785b ldrb r3, [r3, #1]
8006f46: 4619 mov r1, r3
8006f48: 6878 ldr r0, [r7, #4]
8006f4a: f001 fe36 bl 8008bba <USBH_AllocPipe>
8006f4e: 4603 mov r3, r0
8006f50: 461a mov r2, r3
8006f52: 68bb ldr r3, [r7, #8]
8006f54: 701a strb r2, [r3, #0]
/* Open pipe for Notification endpoint */
USBH_OpenPipe(phost, CDC_Handle->CommItf.NotifPipe, CDC_Handle->CommItf.NotifEp,
8006f56: 68bb ldr r3, [r7, #8]
8006f58: 7819 ldrb r1, [r3, #0]
8006f5a: 68bb ldr r3, [r7, #8]
8006f5c: 7858 ldrb r0, [r3, #1]
8006f5e: 687b ldr r3, [r7, #4]
8006f60: f893 431c ldrb.w r4, [r3, #796] ; 0x31c
8006f64: 687b ldr r3, [r7, #4]
8006f66: f893 331d ldrb.w r3, [r3, #797] ; 0x31d
8006f6a: 68ba ldr r2, [r7, #8]
8006f6c: 8952 ldrh r2, [r2, #10]
8006f6e: 9202 str r2, [sp, #8]
8006f70: 2203 movs r2, #3
8006f72: 9201 str r2, [sp, #4]
8006f74: 9300 str r3, [sp, #0]
8006f76: 4623 mov r3, r4
8006f78: 4602 mov r2, r0
8006f7a: 6878 ldr r0, [r7, #4]
8006f7c: f001 fdee bl 8008b5c <USBH_OpenPipe>
phost->device.address, phost->device.speed, USB_EP_TYPE_INTR,
CDC_Handle->CommItf.NotifEpSize);
USBH_LL_SetToggle(phost, CDC_Handle->CommItf.NotifPipe, 0U);
8006f80: 68bb ldr r3, [r7, #8]
8006f82: 781b ldrb r3, [r3, #0]
8006f84: 2200 movs r2, #0
8006f86: 4619 mov r1, r3
8006f88: 6878 ldr r0, [r7, #4]
8006f8a: f002 f8fb bl 8009184 <USBH_LL_SetToggle>
interface = USBH_FindInterface(phost, DATA_INTERFACE_CLASS_CODE,
8006f8e: 2300 movs r3, #0
8006f90: 2200 movs r2, #0
8006f92: 210a movs r1, #10
8006f94: 6878 ldr r0, [r7, #4]
8006f96: f000 fbed bl 8007774 <USBH_FindInterface>
8006f9a: 4603 mov r3, r0
8006f9c: 73fb strb r3, [r7, #15]
RESERVED, NO_CLASS_SPECIFIC_PROTOCOL_CODE);
if ((interface == 0xFFU) || (interface >= USBH_MAX_NUM_INTERFACES)) /* No Valid Interface */
8006f9e: 7bfb ldrb r3, [r7, #15]
8006fa0: 2bff cmp r3, #255 ; 0xff
8006fa2: d002 beq.n 8006faa <USBH_CDC_InterfaceInit+0x11a>
8006fa4: 7bfb ldrb r3, [r7, #15]
8006fa6: 2b01 cmp r3, #1
8006fa8: d901 bls.n 8006fae <USBH_CDC_InterfaceInit+0x11e>
{
USBH_DbgLog("Cannot Find the interface for Data Interface Class.", phost->pActiveClass->Name);
return USBH_FAIL;
8006faa: 2302 movs r3, #2
8006fac: e0c2 b.n 8007134 <USBH_CDC_InterfaceInit+0x2a4>
}
/*Collect the class specific endpoint address and length*/
if (phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].bEndpointAddress & 0x80U)
8006fae: 7bfb ldrb r3, [r7, #15]
8006fb0: 687a ldr r2, [r7, #4]
8006fb2: 211a movs r1, #26
8006fb4: fb01 f303 mul.w r3, r1, r3
8006fb8: 4413 add r3, r2
8006fba: f203 334e addw r3, r3, #846 ; 0x34e
8006fbe: 781b ldrb r3, [r3, #0]
8006fc0: b25b sxtb r3, r3
8006fc2: 2b00 cmp r3, #0
8006fc4: da16 bge.n 8006ff4 <USBH_CDC_InterfaceInit+0x164>
{
CDC_Handle->DataItf.InEp = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].bEndpointAddress;
8006fc6: 7bfb ldrb r3, [r7, #15]
8006fc8: 687a ldr r2, [r7, #4]
8006fca: 211a movs r1, #26
8006fcc: fb01 f303 mul.w r3, r1, r3
8006fd0: 4413 add r3, r2
8006fd2: f203 334e addw r3, r3, #846 ; 0x34e
8006fd6: 781a ldrb r2, [r3, #0]
8006fd8: 68bb ldr r3, [r7, #8]
8006fda: 73da strb r2, [r3, #15]
CDC_Handle->DataItf.InEpSize = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].wMaxPacketSize;
8006fdc: 7bfb ldrb r3, [r7, #15]
8006fde: 687a ldr r2, [r7, #4]
8006fe0: 211a movs r1, #26
8006fe2: fb01 f303 mul.w r3, r1, r3
8006fe6: 4413 add r3, r2
8006fe8: f503 7354 add.w r3, r3, #848 ; 0x350
8006fec: 881a ldrh r2, [r3, #0]
8006fee: 68bb ldr r3, [r7, #8]
8006ff0: 835a strh r2, [r3, #26]
8006ff2: e015 b.n 8007020 <USBH_CDC_InterfaceInit+0x190>
}
else
{
CDC_Handle->DataItf.OutEp = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].bEndpointAddress;
8006ff4: 7bfb ldrb r3, [r7, #15]
8006ff6: 687a ldr r2, [r7, #4]
8006ff8: 211a movs r1, #26
8006ffa: fb01 f303 mul.w r3, r1, r3
8006ffe: 4413 add r3, r2
8007000: f203 334e addw r3, r3, #846 ; 0x34e
8007004: 781a ldrb r2, [r3, #0]
8007006: 68bb ldr r3, [r7, #8]
8007008: 739a strb r2, [r3, #14]
CDC_Handle->DataItf.OutEpSize = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].wMaxPacketSize;
800700a: 7bfb ldrb r3, [r7, #15]
800700c: 687a ldr r2, [r7, #4]
800700e: 211a movs r1, #26
8007010: fb01 f303 mul.w r3, r1, r3
8007014: 4413 add r3, r2
8007016: f503 7354 add.w r3, r3, #848 ; 0x350
800701a: 881a ldrh r2, [r3, #0]
800701c: 68bb ldr r3, [r7, #8]
800701e: 831a strh r2, [r3, #24]
}
if (phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[1].bEndpointAddress & 0x80U)
8007020: 7bfb ldrb r3, [r7, #15]
8007022: 687a ldr r2, [r7, #4]
8007024: 211a movs r1, #26
8007026: fb01 f303 mul.w r3, r1, r3
800702a: 4413 add r3, r2
800702c: f203 3356 addw r3, r3, #854 ; 0x356
8007030: 781b ldrb r3, [r3, #0]
8007032: b25b sxtb r3, r3
8007034: 2b00 cmp r3, #0
8007036: da16 bge.n 8007066 <USBH_CDC_InterfaceInit+0x1d6>
{
CDC_Handle->DataItf.InEp = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[1].bEndpointAddress;
8007038: 7bfb ldrb r3, [r7, #15]
800703a: 687a ldr r2, [r7, #4]
800703c: 211a movs r1, #26
800703e: fb01 f303 mul.w r3, r1, r3
8007042: 4413 add r3, r2
8007044: f203 3356 addw r3, r3, #854 ; 0x356
8007048: 781a ldrb r2, [r3, #0]
800704a: 68bb ldr r3, [r7, #8]
800704c: 73da strb r2, [r3, #15]
CDC_Handle->DataItf.InEpSize = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[1].wMaxPacketSize;
800704e: 7bfb ldrb r3, [r7, #15]
8007050: 687a ldr r2, [r7, #4]
8007052: 211a movs r1, #26
8007054: fb01 f303 mul.w r3, r1, r3
8007058: 4413 add r3, r2
800705a: f503 7356 add.w r3, r3, #856 ; 0x358
800705e: 881a ldrh r2, [r3, #0]
8007060: 68bb ldr r3, [r7, #8]
8007062: 835a strh r2, [r3, #26]
8007064: e015 b.n 8007092 <USBH_CDC_InterfaceInit+0x202>
}
else
{
CDC_Handle->DataItf.OutEp = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[1].bEndpointAddress;
8007066: 7bfb ldrb r3, [r7, #15]
8007068: 687a ldr r2, [r7, #4]
800706a: 211a movs r1, #26
800706c: fb01 f303 mul.w r3, r1, r3
8007070: 4413 add r3, r2
8007072: f203 3356 addw r3, r3, #854 ; 0x356
8007076: 781a ldrb r2, [r3, #0]
8007078: 68bb ldr r3, [r7, #8]
800707a: 739a strb r2, [r3, #14]
CDC_Handle->DataItf.OutEpSize = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[1].wMaxPacketSize;
800707c: 7bfb ldrb r3, [r7, #15]
800707e: 687a ldr r2, [r7, #4]
8007080: 211a movs r1, #26
8007082: fb01 f303 mul.w r3, r1, r3
8007086: 4413 add r3, r2
8007088: f503 7356 add.w r3, r3, #856 ; 0x358
800708c: 881a ldrh r2, [r3, #0]
800708e: 68bb ldr r3, [r7, #8]
8007090: 831a strh r2, [r3, #24]
}
/*Allocate the length for host channel number out*/
CDC_Handle->DataItf.OutPipe = USBH_AllocPipe(phost, CDC_Handle->DataItf.OutEp);
8007092: 68bb ldr r3, [r7, #8]
8007094: 7b9b ldrb r3, [r3, #14]
8007096: 4619 mov r1, r3
8007098: 6878 ldr r0, [r7, #4]
800709a: f001 fd8e bl 8008bba <USBH_AllocPipe>
800709e: 4603 mov r3, r0
80070a0: 461a mov r2, r3
80070a2: 68bb ldr r3, [r7, #8]
80070a4: 735a strb r2, [r3, #13]
/*Allocate the length for host channel number in*/
CDC_Handle->DataItf.InPipe = USBH_AllocPipe(phost, CDC_Handle->DataItf.InEp);
80070a6: 68bb ldr r3, [r7, #8]
80070a8: 7bdb ldrb r3, [r3, #15]
80070aa: 4619 mov r1, r3
80070ac: 6878 ldr r0, [r7, #4]
80070ae: f001 fd84 bl 8008bba <USBH_AllocPipe>
80070b2: 4603 mov r3, r0
80070b4: 461a mov r2, r3
80070b6: 68bb ldr r3, [r7, #8]
80070b8: 731a strb r2, [r3, #12]
/* Open channel for OUT endpoint */
USBH_OpenPipe(phost, CDC_Handle->DataItf.OutPipe, CDC_Handle->DataItf.OutEp,
80070ba: 68bb ldr r3, [r7, #8]
80070bc: 7b59 ldrb r1, [r3, #13]
80070be: 68bb ldr r3, [r7, #8]
80070c0: 7b98 ldrb r0, [r3, #14]
80070c2: 687b ldr r3, [r7, #4]
80070c4: f893 431c ldrb.w r4, [r3, #796] ; 0x31c
80070c8: 687b ldr r3, [r7, #4]
80070ca: f893 331d ldrb.w r3, [r3, #797] ; 0x31d
80070ce: 68ba ldr r2, [r7, #8]
80070d0: 8b12 ldrh r2, [r2, #24]
80070d2: 9202 str r2, [sp, #8]
80070d4: 2202 movs r2, #2
80070d6: 9201 str r2, [sp, #4]
80070d8: 9300 str r3, [sp, #0]
80070da: 4623 mov r3, r4
80070dc: 4602 mov r2, r0
80070de: 6878 ldr r0, [r7, #4]
80070e0: f001 fd3c bl 8008b5c <USBH_OpenPipe>
phost->device.address, phost->device.speed, USB_EP_TYPE_BULK,
CDC_Handle->DataItf.OutEpSize);
/* Open channel for IN endpoint */
USBH_OpenPipe(phost, CDC_Handle->DataItf.InPipe, CDC_Handle->DataItf.InEp,
80070e4: 68bb ldr r3, [r7, #8]
80070e6: 7b19 ldrb r1, [r3, #12]
80070e8: 68bb ldr r3, [r7, #8]
80070ea: 7bd8 ldrb r0, [r3, #15]
80070ec: 687b ldr r3, [r7, #4]
80070ee: f893 431c ldrb.w r4, [r3, #796] ; 0x31c
80070f2: 687b ldr r3, [r7, #4]
80070f4: f893 331d ldrb.w r3, [r3, #797] ; 0x31d
80070f8: 68ba ldr r2, [r7, #8]
80070fa: 8b52 ldrh r2, [r2, #26]
80070fc: 9202 str r2, [sp, #8]
80070fe: 2202 movs r2, #2
8007100: 9201 str r2, [sp, #4]
8007102: 9300 str r3, [sp, #0]
8007104: 4623 mov r3, r4
8007106: 4602 mov r2, r0
8007108: 6878 ldr r0, [r7, #4]
800710a: f001 fd27 bl 8008b5c <USBH_OpenPipe>
phost->device.address, phost->device.speed, USB_EP_TYPE_BULK,
CDC_Handle->DataItf.InEpSize);
CDC_Handle->state = CDC_IDLE_STATE;
800710e: 68bb ldr r3, [r7, #8]
8007110: 2200 movs r2, #0
8007112: f883 204c strb.w r2, [r3, #76] ; 0x4c
USBH_LL_SetToggle(phost, CDC_Handle->DataItf.OutPipe, 0U);
8007116: 68bb ldr r3, [r7, #8]
8007118: 7b5b ldrb r3, [r3, #13]
800711a: 2200 movs r2, #0
800711c: 4619 mov r1, r3
800711e: 6878 ldr r0, [r7, #4]
8007120: f002 f830 bl 8009184 <USBH_LL_SetToggle>
USBH_LL_SetToggle(phost, CDC_Handle->DataItf.InPipe, 0U);
8007124: 68bb ldr r3, [r7, #8]
8007126: 7b1b ldrb r3, [r3, #12]
8007128: 2200 movs r2, #0
800712a: 4619 mov r1, r3
800712c: 6878 ldr r0, [r7, #4]
800712e: f002 f829 bl 8009184 <USBH_LL_SetToggle>
return USBH_OK;
8007132: 2300 movs r3, #0
}
8007134: 4618 mov r0, r3
8007136: 3714 adds r7, #20
8007138: 46bd mov sp, r7
800713a: bd90 pop {r4, r7, pc}
0800713c <USBH_CDC_InterfaceDeInit>:
* The function DeInit the Pipes used for the CDC class.
* @param phost: Host handle
* @retval USBH Status
*/
static USBH_StatusTypeDef USBH_CDC_InterfaceDeInit(USBH_HandleTypeDef *phost)
{
800713c: b580 push {r7, lr}
800713e: b084 sub sp, #16
8007140: af00 add r7, sp, #0
8007142: 6078 str r0, [r7, #4]
CDC_HandleTypeDef *CDC_Handle = (CDC_HandleTypeDef *) phost->pActiveClass->pData;
8007144: 687b ldr r3, [r7, #4]
8007146: f8d3 337c ldr.w r3, [r3, #892] ; 0x37c
800714a: 69db ldr r3, [r3, #28]
800714c: 60fb str r3, [r7, #12]
if (CDC_Handle->CommItf.NotifPipe)
800714e: 68fb ldr r3, [r7, #12]
8007150: 781b ldrb r3, [r3, #0]
8007152: 2b00 cmp r3, #0
8007154: d00e beq.n 8007174 <USBH_CDC_InterfaceDeInit+0x38>
{
USBH_ClosePipe(phost, CDC_Handle->CommItf.NotifPipe);
8007156: 68fb ldr r3, [r7, #12]
8007158: 781b ldrb r3, [r3, #0]
800715a: 4619 mov r1, r3
800715c: 6878 ldr r0, [r7, #4]
800715e: f001 fd1c bl 8008b9a <USBH_ClosePipe>
USBH_FreePipe(phost, CDC_Handle->CommItf.NotifPipe);
8007162: 68fb ldr r3, [r7, #12]
8007164: 781b ldrb r3, [r3, #0]
8007166: 4619 mov r1, r3
8007168: 6878 ldr r0, [r7, #4]
800716a: f001 fd47 bl 8008bfc <USBH_FreePipe>
CDC_Handle->CommItf.NotifPipe = 0U; /* Reset the Channel as Free */
800716e: 68fb ldr r3, [r7, #12]
8007170: 2200 movs r2, #0
8007172: 701a strb r2, [r3, #0]
}
if (CDC_Handle->DataItf.InPipe)
8007174: 68fb ldr r3, [r7, #12]
8007176: 7b1b ldrb r3, [r3, #12]
8007178: 2b00 cmp r3, #0
800717a: d00e beq.n 800719a <USBH_CDC_InterfaceDeInit+0x5e>
{
USBH_ClosePipe(phost, CDC_Handle->DataItf.InPipe);
800717c: 68fb ldr r3, [r7, #12]
800717e: 7b1b ldrb r3, [r3, #12]
8007180: 4619 mov r1, r3
8007182: 6878 ldr r0, [r7, #4]
8007184: f001 fd09 bl 8008b9a <USBH_ClosePipe>
USBH_FreePipe(phost, CDC_Handle->DataItf.InPipe);
8007188: 68fb ldr r3, [r7, #12]
800718a: 7b1b ldrb r3, [r3, #12]
800718c: 4619 mov r1, r3
800718e: 6878 ldr r0, [r7, #4]
8007190: f001 fd34 bl 8008bfc <USBH_FreePipe>
CDC_Handle->DataItf.InPipe = 0U; /* Reset the Channel as Free */
8007194: 68fb ldr r3, [r7, #12]
8007196: 2200 movs r2, #0
8007198: 731a strb r2, [r3, #12]
}
if (CDC_Handle->DataItf.OutPipe)
800719a: 68fb ldr r3, [r7, #12]
800719c: 7b5b ldrb r3, [r3, #13]
800719e: 2b00 cmp r3, #0
80071a0: d00e beq.n 80071c0 <USBH_CDC_InterfaceDeInit+0x84>
{
USBH_ClosePipe(phost, CDC_Handle->DataItf.OutPipe);
80071a2: 68fb ldr r3, [r7, #12]
80071a4: 7b5b ldrb r3, [r3, #13]
80071a6: 4619 mov r1, r3
80071a8: 6878 ldr r0, [r7, #4]
80071aa: f001 fcf6 bl 8008b9a <USBH_ClosePipe>
USBH_FreePipe(phost, CDC_Handle->DataItf.OutPipe);
80071ae: 68fb ldr r3, [r7, #12]
80071b0: 7b5b ldrb r3, [r3, #13]
80071b2: 4619 mov r1, r3
80071b4: 6878 ldr r0, [r7, #4]
80071b6: f001 fd21 bl 8008bfc <USBH_FreePipe>
CDC_Handle->DataItf.OutPipe = 0U; /* Reset the Channel as Free */
80071ba: 68fb ldr r3, [r7, #12]
80071bc: 2200 movs r2, #0
80071be: 735a strb r2, [r3, #13]
}
if (phost->pActiveClass->pData)
80071c0: 687b ldr r3, [r7, #4]
80071c2: f8d3 337c ldr.w r3, [r3, #892] ; 0x37c
80071c6: 69db ldr r3, [r3, #28]
80071c8: 2b00 cmp r3, #0
80071ca: d00b beq.n 80071e4 <USBH_CDC_InterfaceDeInit+0xa8>
{
USBH_free(phost->pActiveClass->pData);
80071cc: 687b ldr r3, [r7, #4]
80071ce: f8d3 337c ldr.w r3, [r3, #892] ; 0x37c
80071d2: 69db ldr r3, [r3, #28]
80071d4: 4618 mov r0, r3
80071d6: f002 f88d bl 80092f4 <free>
phost->pActiveClass->pData = 0U;
80071da: 687b ldr r3, [r7, #4]
80071dc: f8d3 337c ldr.w r3, [r3, #892] ; 0x37c
80071e0: 2200 movs r2, #0
80071e2: 61da str r2, [r3, #28]
}
return USBH_OK;
80071e4: 2300 movs r3, #0
}
80071e6: 4618 mov r0, r3
80071e8: 3710 adds r7, #16
80071ea: 46bd mov sp, r7
80071ec: bd80 pop {r7, pc}
080071ee <USBH_CDC_ClassRequest>:
* for CDC class.
* @param phost: Host handle
* @retval USBH Status
*/
static USBH_StatusTypeDef USBH_CDC_ClassRequest(USBH_HandleTypeDef *phost)
{
80071ee: b580 push {r7, lr}
80071f0: b084 sub sp, #16
80071f2: af00 add r7, sp, #0
80071f4: 6078 str r0, [r7, #4]
USBH_StatusTypeDef status;
CDC_HandleTypeDef *CDC_Handle = (CDC_HandleTypeDef *) phost->pActiveClass->pData;
80071f6: 687b ldr r3, [r7, #4]
80071f8: f8d3 337c ldr.w r3, [r3, #892] ; 0x37c
80071fc: 69db ldr r3, [r3, #28]
80071fe: 60fb str r3, [r7, #12]
/* Issue the get line coding request */
status = GetLineCoding(phost, &CDC_Handle->LineCoding);
8007200: 68fb ldr r3, [r7, #12]
8007202: 3340 adds r3, #64 ; 0x40
8007204: 4619 mov r1, r3
8007206: 6878 ldr r0, [r7, #4]
8007208: f000 f8b1 bl 800736e <GetLineCoding>
800720c: 4603 mov r3, r0
800720e: 72fb strb r3, [r7, #11]
if (status == USBH_OK)
8007210: 7afb ldrb r3, [r7, #11]
8007212: 2b00 cmp r3, #0
8007214: d105 bne.n 8007222 <USBH_CDC_ClassRequest+0x34>
{
phost->pUser(phost, HOST_USER_CLASS_ACTIVE);
8007216: 687b ldr r3, [r7, #4]
8007218: f8d3 33d4 ldr.w r3, [r3, #980] ; 0x3d4
800721c: 2102 movs r1, #2
800721e: 6878 ldr r0, [r7, #4]
8007220: 4798 blx r3
else
{
/* .. */
}
return status;
8007222: 7afb ldrb r3, [r7, #11]
}
8007224: 4618 mov r0, r3
8007226: 3710 adds r7, #16
8007228: 46bd mov sp, r7
800722a: bd80 pop {r7, pc}
0800722c <USBH_CDC_Process>:
* The function is for managing state machine for CDC data transfers
* @param phost: Host handle
* @retval USBH Status
*/
static USBH_StatusTypeDef USBH_CDC_Process(USBH_HandleTypeDef *phost)
{
800722c: b580 push {r7, lr}
800722e: b084 sub sp, #16
8007230: af00 add r7, sp, #0
8007232: 6078 str r0, [r7, #4]
USBH_StatusTypeDef status = USBH_BUSY;
8007234: 2301 movs r3, #1
8007236: 73fb strb r3, [r7, #15]
USBH_StatusTypeDef req_status = USBH_OK;
8007238: 2300 movs r3, #0
800723a: 73bb strb r3, [r7, #14]
CDC_HandleTypeDef *CDC_Handle = (CDC_HandleTypeDef *) phost->pActiveClass->pData;
800723c: 687b ldr r3, [r7, #4]
800723e: f8d3 337c ldr.w r3, [r3, #892] ; 0x37c
8007242: 69db ldr r3, [r3, #28]
8007244: 60bb str r3, [r7, #8]
switch (CDC_Handle->state)
8007246: 68bb ldr r3, [r7, #8]
8007248: f893 304c ldrb.w r3, [r3, #76] ; 0x4c
800724c: 2b04 cmp r3, #4
800724e: d877 bhi.n 8007340 <USBH_CDC_Process+0x114>
8007250: a201 add r2, pc, #4 ; (adr r2, 8007258 <USBH_CDC_Process+0x2c>)
8007252: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8007256: bf00 nop
8007258: 0800726d .word 0x0800726d
800725c: 08007273 .word 0x08007273
8007260: 080072a3 .word 0x080072a3
8007264: 08007317 .word 0x08007317
8007268: 08007325 .word 0x08007325
{
case CDC_IDLE_STATE:
status = USBH_OK;
800726c: 2300 movs r3, #0
800726e: 73fb strb r3, [r7, #15]
break;
8007270: e06d b.n 800734e <USBH_CDC_Process+0x122>
case CDC_SET_LINE_CODING_STATE:
req_status = SetLineCoding(phost, CDC_Handle->pUserLineCoding);
8007272: 68bb ldr r3, [r7, #8]
8007274: 6c9b ldr r3, [r3, #72] ; 0x48
8007276: 4619 mov r1, r3
8007278: 6878 ldr r0, [r7, #4]
800727a: f000 f897 bl 80073ac <SetLineCoding>
800727e: 4603 mov r3, r0
8007280: 73bb strb r3, [r7, #14]
if (req_status == USBH_OK)
8007282: 7bbb ldrb r3, [r7, #14]
8007284: 2b00 cmp r3, #0
8007286: d104 bne.n 8007292 <USBH_CDC_Process+0x66>
{
CDC_Handle->state = CDC_GET_LAST_LINE_CODING_STATE;
8007288: 68bb ldr r3, [r7, #8]
800728a: 2202 movs r2, #2
800728c: f883 204c strb.w r2, [r3, #76] ; 0x4c
if (req_status != USBH_BUSY)
{
CDC_Handle->state = CDC_ERROR_STATE;
}
}
break;
8007290: e058 b.n 8007344 <USBH_CDC_Process+0x118>
if (req_status != USBH_BUSY)
8007292: 7bbb ldrb r3, [r7, #14]
8007294: 2b01 cmp r3, #1
8007296: d055 beq.n 8007344 <USBH_CDC_Process+0x118>
CDC_Handle->state = CDC_ERROR_STATE;
8007298: 68bb ldr r3, [r7, #8]
800729a: 2204 movs r2, #4
800729c: f883 204c strb.w r2, [r3, #76] ; 0x4c
break;
80072a0: e050 b.n 8007344 <USBH_CDC_Process+0x118>
case CDC_GET_LAST_LINE_CODING_STATE:
req_status = GetLineCoding(phost, &(CDC_Handle->LineCoding));
80072a2: 68bb ldr r3, [r7, #8]
80072a4: 3340 adds r3, #64 ; 0x40
80072a6: 4619 mov r1, r3
80072a8: 6878 ldr r0, [r7, #4]
80072aa: f000 f860 bl 800736e <GetLineCoding>
80072ae: 4603 mov r3, r0
80072b0: 73bb strb r3, [r7, #14]
if (req_status == USBH_OK)
80072b2: 7bbb ldrb r3, [r7, #14]
80072b4: 2b00 cmp r3, #0
80072b6: d126 bne.n 8007306 <USBH_CDC_Process+0xda>
{
CDC_Handle->state = CDC_IDLE_STATE;
80072b8: 68bb ldr r3, [r7, #8]
80072ba: 2200 movs r2, #0
80072bc: f883 204c strb.w r2, [r3, #76] ; 0x4c
if ((CDC_Handle->LineCoding.b.bCharFormat == CDC_Handle->pUserLineCoding->b.bCharFormat) &&
80072c0: 68bb ldr r3, [r7, #8]
80072c2: f893 2044 ldrb.w r2, [r3, #68] ; 0x44
80072c6: 68bb ldr r3, [r7, #8]
80072c8: 6c9b ldr r3, [r3, #72] ; 0x48
80072ca: 791b ldrb r3, [r3, #4]
80072cc: 429a cmp r2, r3
80072ce: d13b bne.n 8007348 <USBH_CDC_Process+0x11c>
(CDC_Handle->LineCoding.b.bDataBits == CDC_Handle->pUserLineCoding->b.bDataBits) &&
80072d0: 68bb ldr r3, [r7, #8]
80072d2: f893 2046 ldrb.w r2, [r3, #70] ; 0x46
80072d6: 68bb ldr r3, [r7, #8]
80072d8: 6c9b ldr r3, [r3, #72] ; 0x48
80072da: 799b ldrb r3, [r3, #6]
if ((CDC_Handle->LineCoding.b.bCharFormat == CDC_Handle->pUserLineCoding->b.bCharFormat) &&
80072dc: 429a cmp r2, r3
80072de: d133 bne.n 8007348 <USBH_CDC_Process+0x11c>
(CDC_Handle->LineCoding.b.bParityType == CDC_Handle->pUserLineCoding->b.bParityType) &&
80072e0: 68bb ldr r3, [r7, #8]
80072e2: f893 2045 ldrb.w r2, [r3, #69] ; 0x45
80072e6: 68bb ldr r3, [r7, #8]
80072e8: 6c9b ldr r3, [r3, #72] ; 0x48
80072ea: 795b ldrb r3, [r3, #5]
(CDC_Handle->LineCoding.b.bDataBits == CDC_Handle->pUserLineCoding->b.bDataBits) &&
80072ec: 429a cmp r2, r3
80072ee: d12b bne.n 8007348 <USBH_CDC_Process+0x11c>
(CDC_Handle->LineCoding.b.dwDTERate == CDC_Handle->pUserLineCoding->b.dwDTERate))
80072f0: 68bb ldr r3, [r7, #8]
80072f2: 6c1a ldr r2, [r3, #64] ; 0x40
80072f4: 68bb ldr r3, [r7, #8]
80072f6: 6c9b ldr r3, [r3, #72] ; 0x48
80072f8: 681b ldr r3, [r3, #0]
(CDC_Handle->LineCoding.b.bParityType == CDC_Handle->pUserLineCoding->b.bParityType) &&
80072fa: 429a cmp r2, r3
80072fc: d124 bne.n 8007348 <USBH_CDC_Process+0x11c>
{
USBH_CDC_LineCodingChanged(phost);
80072fe: 6878 ldr r0, [r7, #4]
8007300: f000 f95a bl 80075b8 <USBH_CDC_LineCodingChanged>
if (req_status != USBH_BUSY)
{
CDC_Handle->state = CDC_ERROR_STATE;
}
}
break;
8007304: e020 b.n 8007348 <USBH_CDC_Process+0x11c>
if (req_status != USBH_BUSY)
8007306: 7bbb ldrb r3, [r7, #14]
8007308: 2b01 cmp r3, #1
800730a: d01d beq.n 8007348 <USBH_CDC_Process+0x11c>
CDC_Handle->state = CDC_ERROR_STATE;
800730c: 68bb ldr r3, [r7, #8]
800730e: 2204 movs r2, #4
8007310: f883 204c strb.w r2, [r3, #76] ; 0x4c
break;
8007314: e018 b.n 8007348 <USBH_CDC_Process+0x11c>
case CDC_TRANSFER_DATA:
CDC_ProcessTransmission(phost);
8007316: 6878 ldr r0, [r7, #4]
8007318: f000 f867 bl 80073ea <CDC_ProcessTransmission>
CDC_ProcessReception(phost);
800731c: 6878 ldr r0, [r7, #4]
800731e: f000 f8dc bl 80074da <CDC_ProcessReception>
break;
8007322: e014 b.n 800734e <USBH_CDC_Process+0x122>
case CDC_ERROR_STATE:
req_status = USBH_ClrFeature(phost, 0x00U);
8007324: 2100 movs r1, #0
8007326: 6878 ldr r0, [r7, #4]
8007328: f000 ffe5 bl 80082f6 <USBH_ClrFeature>
800732c: 4603 mov r3, r0
800732e: 73bb strb r3, [r7, #14]
if (req_status == USBH_OK)
8007330: 7bbb ldrb r3, [r7, #14]
8007332: 2b00 cmp r3, #0
8007334: d10a bne.n 800734c <USBH_CDC_Process+0x120>
{
/*Change the state to waiting*/
CDC_Handle->state = CDC_IDLE_STATE;
8007336: 68bb ldr r3, [r7, #8]
8007338: 2200 movs r2, #0
800733a: f883 204c strb.w r2, [r3, #76] ; 0x4c
}
break;
800733e: e005 b.n 800734c <USBH_CDC_Process+0x120>
default:
break;
8007340: bf00 nop
8007342: e004 b.n 800734e <USBH_CDC_Process+0x122>
break;
8007344: bf00 nop
8007346: e002 b.n 800734e <USBH_CDC_Process+0x122>
break;
8007348: bf00 nop
800734a: e000 b.n 800734e <USBH_CDC_Process+0x122>
break;
800734c: bf00 nop
}
return status;
800734e: 7bfb ldrb r3, [r7, #15]
}
8007350: 4618 mov r0, r3
8007352: 3710 adds r7, #16
8007354: 46bd mov sp, r7
8007356: bd80 pop {r7, pc}
08007358 <USBH_CDC_SOFProcess>:
* The function is for managing SOF callback
* @param phost: Host handle
* @retval USBH Status
*/
static USBH_StatusTypeDef USBH_CDC_SOFProcess(USBH_HandleTypeDef *phost)
{
8007358: b480 push {r7}
800735a: b083 sub sp, #12
800735c: af00 add r7, sp, #0
800735e: 6078 str r0, [r7, #4]
/* Prevent unused argument(s) compilation warning */
UNUSED(phost);
return USBH_OK;
8007360: 2300 movs r3, #0
}
8007362: 4618 mov r0, r3
8007364: 370c adds r7, #12
8007366: 46bd mov sp, r7
8007368: f85d 7b04 ldr.w r7, [sp], #4
800736c: 4770 bx lr
0800736e <GetLineCoding>:
* configured line coding.
* @param pdev: Selected device
* @retval USBH_StatusTypeDef : USB ctl xfer status
*/
static USBH_StatusTypeDef GetLineCoding(USBH_HandleTypeDef *phost, CDC_LineCodingTypeDef *linecoding)
{
800736e: b580 push {r7, lr}
8007370: b082 sub sp, #8
8007372: af00 add r7, sp, #0
8007374: 6078 str r0, [r7, #4]
8007376: 6039 str r1, [r7, #0]
phost->Control.setup.b.bmRequestType = USB_D2H | USB_REQ_TYPE_CLASS | \
8007378: 687b ldr r3, [r7, #4]
800737a: 22a1 movs r2, #161 ; 0xa1
800737c: 741a strb r2, [r3, #16]
USB_REQ_RECIPIENT_INTERFACE;
phost->Control.setup.b.bRequest = CDC_GET_LINE_CODING;
800737e: 687b ldr r3, [r7, #4]
8007380: 2221 movs r2, #33 ; 0x21
8007382: 745a strb r2, [r3, #17]
phost->Control.setup.b.wValue.w = 0U;
8007384: 687b ldr r3, [r7, #4]
8007386: 2200 movs r2, #0
8007388: 825a strh r2, [r3, #18]
phost->Control.setup.b.wIndex.w = 0U;
800738a: 687b ldr r3, [r7, #4]
800738c: 2200 movs r2, #0
800738e: 829a strh r2, [r3, #20]
phost->Control.setup.b.wLength.w = LINE_CODING_STRUCTURE_SIZE;
8007390: 687b ldr r3, [r7, #4]
8007392: 2207 movs r2, #7
8007394: 82da strh r2, [r3, #22]
return USBH_CtlReq(phost, linecoding->Array, LINE_CODING_STRUCTURE_SIZE);
8007396: 683b ldr r3, [r7, #0]
8007398: 2207 movs r2, #7
800739a: 4619 mov r1, r3
800739c: 6878 ldr r0, [r7, #4]
800739e: f001 f98a bl 80086b6 <USBH_CtlReq>
80073a2: 4603 mov r3, r0
}
80073a4: 4618 mov r0, r3
80073a6: 3708 adds r7, #8
80073a8: 46bd mov sp, r7
80073aa: bd80 pop {r7, pc}
080073ac <SetLineCoding>:
* @param pdev: Selected device
* @retval USBH_StatusTypeDef : USB ctl xfer status
*/
static USBH_StatusTypeDef SetLineCoding(USBH_HandleTypeDef *phost,
CDC_LineCodingTypeDef *linecoding)
{
80073ac: b580 push {r7, lr}
80073ae: b082 sub sp, #8
80073b0: af00 add r7, sp, #0
80073b2: 6078 str r0, [r7, #4]
80073b4: 6039 str r1, [r7, #0]
phost->Control.setup.b.bmRequestType = USB_H2D | USB_REQ_TYPE_CLASS |
80073b6: 687b ldr r3, [r7, #4]
80073b8: 2221 movs r2, #33 ; 0x21
80073ba: 741a strb r2, [r3, #16]
USB_REQ_RECIPIENT_INTERFACE;
phost->Control.setup.b.bRequest = CDC_SET_LINE_CODING;
80073bc: 687b ldr r3, [r7, #4]
80073be: 2220 movs r2, #32
80073c0: 745a strb r2, [r3, #17]
phost->Control.setup.b.wValue.w = 0U;
80073c2: 687b ldr r3, [r7, #4]
80073c4: 2200 movs r2, #0
80073c6: 825a strh r2, [r3, #18]
phost->Control.setup.b.wIndex.w = 0U;
80073c8: 687b ldr r3, [r7, #4]
80073ca: 2200 movs r2, #0
80073cc: 829a strh r2, [r3, #20]
phost->Control.setup.b.wLength.w = LINE_CODING_STRUCTURE_SIZE;
80073ce: 687b ldr r3, [r7, #4]
80073d0: 2207 movs r2, #7
80073d2: 82da strh r2, [r3, #22]
return USBH_CtlReq(phost, linecoding->Array, LINE_CODING_STRUCTURE_SIZE);
80073d4: 683b ldr r3, [r7, #0]
80073d6: 2207 movs r2, #7
80073d8: 4619 mov r1, r3
80073da: 6878 ldr r0, [r7, #4]
80073dc: f001 f96b bl 80086b6 <USBH_CtlReq>
80073e0: 4603 mov r3, r0
}
80073e2: 4618 mov r0, r3
80073e4: 3708 adds r7, #8
80073e6: 46bd mov sp, r7
80073e8: bd80 pop {r7, pc}
080073ea <CDC_ProcessTransmission>:
* @brief The function is responsible for sending data to the device
* @param pdev: Selected device
* @retval None
*/
static void CDC_ProcessTransmission(USBH_HandleTypeDef *phost)
{
80073ea: b580 push {r7, lr}
80073ec: b086 sub sp, #24
80073ee: af02 add r7, sp, #8
80073f0: 6078 str r0, [r7, #4]
CDC_HandleTypeDef *CDC_Handle = (CDC_HandleTypeDef *) phost->pActiveClass->pData;
80073f2: 687b ldr r3, [r7, #4]
80073f4: f8d3 337c ldr.w r3, [r3, #892] ; 0x37c
80073f8: 69db ldr r3, [r3, #28]
80073fa: 60fb str r3, [r7, #12]
USBH_URBStateTypeDef URB_Status = USBH_URB_IDLE;
80073fc: 2300 movs r3, #0
80073fe: 72fb strb r3, [r7, #11]
switch (CDC_Handle->data_tx_state)
8007400: 68fb ldr r3, [r7, #12]
8007402: f893 304d ldrb.w r3, [r3, #77] ; 0x4d
8007406: 2b01 cmp r3, #1
8007408: d002 beq.n 8007410 <CDC_ProcessTransmission+0x26>
800740a: 2b02 cmp r3, #2
800740c: d025 beq.n 800745a <CDC_ProcessTransmission+0x70>
}
}
break;
default:
break;
800740e: e060 b.n 80074d2 <CDC_ProcessTransmission+0xe8>
if (CDC_Handle->TxDataLength > CDC_Handle->DataItf.OutEpSize)
8007410: 68fb ldr r3, [r7, #12]
8007412: 6a5b ldr r3, [r3, #36] ; 0x24
8007414: 68fa ldr r2, [r7, #12]
8007416: 8b12 ldrh r2, [r2, #24]
8007418: 4293 cmp r3, r2
800741a: d90c bls.n 8007436 <CDC_ProcessTransmission+0x4c>
USBH_BulkSendData(phost,
800741c: 68fb ldr r3, [r7, #12]
800741e: 69d9 ldr r1, [r3, #28]
8007420: 68fb ldr r3, [r7, #12]
8007422: 8b1a ldrh r2, [r3, #24]
8007424: 68fb ldr r3, [r7, #12]
8007426: 7b58 ldrb r0, [r3, #13]
8007428: 2301 movs r3, #1
800742a: 9300 str r3, [sp, #0]
800742c: 4603 mov r3, r0
800742e: 6878 ldr r0, [r7, #4]
8007430: f001 fb51 bl 8008ad6 <USBH_BulkSendData>
8007434: e00c b.n 8007450 <CDC_ProcessTransmission+0x66>
USBH_BulkSendData(phost,
8007436: 68fb ldr r3, [r7, #12]
8007438: 69d9 ldr r1, [r3, #28]
(uint16_t)CDC_Handle->TxDataLength,
800743a: 68fb ldr r3, [r7, #12]
800743c: 6a5b ldr r3, [r3, #36] ; 0x24
USBH_BulkSendData(phost,
800743e: b29a uxth r2, r3
8007440: 68fb ldr r3, [r7, #12]
8007442: 7b58 ldrb r0, [r3, #13]
8007444: 2301 movs r3, #1
8007446: 9300 str r3, [sp, #0]
8007448: 4603 mov r3, r0
800744a: 6878 ldr r0, [r7, #4]
800744c: f001 fb43 bl 8008ad6 <USBH_BulkSendData>
CDC_Handle->data_tx_state = CDC_SEND_DATA_WAIT;
8007450: 68fb ldr r3, [r7, #12]
8007452: 2202 movs r2, #2
8007454: f883 204d strb.w r2, [r3, #77] ; 0x4d
break;
8007458: e03b b.n 80074d2 <CDC_ProcessTransmission+0xe8>
URB_Status = USBH_LL_GetURBState(phost, CDC_Handle->DataItf.OutPipe);
800745a: 68fb ldr r3, [r7, #12]
800745c: 7b5b ldrb r3, [r3, #13]
800745e: 4619 mov r1, r3
8007460: 6878 ldr r0, [r7, #4]
8007462: f001 fe65 bl 8009130 <USBH_LL_GetURBState>
8007466: 4603 mov r3, r0
8007468: 72fb strb r3, [r7, #11]
if (URB_Status == USBH_URB_DONE)
800746a: 7afb ldrb r3, [r7, #11]
800746c: 2b01 cmp r3, #1
800746e: d128 bne.n 80074c2 <CDC_ProcessTransmission+0xd8>
if (CDC_Handle->TxDataLength > CDC_Handle->DataItf.OutEpSize)
8007470: 68fb ldr r3, [r7, #12]
8007472: 6a5b ldr r3, [r3, #36] ; 0x24
8007474: 68fa ldr r2, [r7, #12]
8007476: 8b12 ldrh r2, [r2, #24]
8007478: 4293 cmp r3, r2
800747a: d90e bls.n 800749a <CDC_ProcessTransmission+0xb0>
CDC_Handle->TxDataLength -= CDC_Handle->DataItf.OutEpSize;
800747c: 68fb ldr r3, [r7, #12]
800747e: 6a5b ldr r3, [r3, #36] ; 0x24
8007480: 68fa ldr r2, [r7, #12]
8007482: 8b12 ldrh r2, [r2, #24]
8007484: 1a9a subs r2, r3, r2
8007486: 68fb ldr r3, [r7, #12]
8007488: 625a str r2, [r3, #36] ; 0x24
CDC_Handle->pTxData += CDC_Handle->DataItf.OutEpSize;
800748a: 68fb ldr r3, [r7, #12]
800748c: 69db ldr r3, [r3, #28]
800748e: 68fa ldr r2, [r7, #12]
8007490: 8b12 ldrh r2, [r2, #24]
8007492: 441a add r2, r3
8007494: 68fb ldr r3, [r7, #12]
8007496: 61da str r2, [r3, #28]
8007498: e002 b.n 80074a0 <CDC_ProcessTransmission+0xb6>
CDC_Handle->TxDataLength = 0U;
800749a: 68fb ldr r3, [r7, #12]
800749c: 2200 movs r2, #0
800749e: 625a str r2, [r3, #36] ; 0x24
if (CDC_Handle->TxDataLength > 0U)
80074a0: 68fb ldr r3, [r7, #12]
80074a2: 6a5b ldr r3, [r3, #36] ; 0x24
80074a4: 2b00 cmp r3, #0
80074a6: d004 beq.n 80074b2 <CDC_ProcessTransmission+0xc8>
CDC_Handle->data_tx_state = CDC_SEND_DATA;
80074a8: 68fb ldr r3, [r7, #12]
80074aa: 2201 movs r2, #1
80074ac: f883 204d strb.w r2, [r3, #77] ; 0x4d
break;
80074b0: e00e b.n 80074d0 <CDC_ProcessTransmission+0xe6>
CDC_Handle->data_tx_state = CDC_IDLE;
80074b2: 68fb ldr r3, [r7, #12]
80074b4: 2200 movs r2, #0
80074b6: f883 204d strb.w r2, [r3, #77] ; 0x4d
USBH_CDC_TransmitCallback(phost);
80074ba: 6878 ldr r0, [r7, #4]
80074bc: f000 f868 bl 8007590 <USBH_CDC_TransmitCallback>
break;
80074c0: e006 b.n 80074d0 <CDC_ProcessTransmission+0xe6>
if (URB_Status == USBH_URB_NOTREADY)
80074c2: 7afb ldrb r3, [r7, #11]
80074c4: 2b02 cmp r3, #2
80074c6: d103 bne.n 80074d0 <CDC_ProcessTransmission+0xe6>
CDC_Handle->data_tx_state = CDC_SEND_DATA;
80074c8: 68fb ldr r3, [r7, #12]
80074ca: 2201 movs r2, #1
80074cc: f883 204d strb.w r2, [r3, #77] ; 0x4d
break;
80074d0: bf00 nop
}
}
80074d2: bf00 nop
80074d4: 3710 adds r7, #16
80074d6: 46bd mov sp, r7
80074d8: bd80 pop {r7, pc}
080074da <CDC_ProcessReception>:
* @param pdev: Selected device
* @retval None
*/
static void CDC_ProcessReception(USBH_HandleTypeDef *phost)
{
80074da: b580 push {r7, lr}
80074dc: b086 sub sp, #24
80074de: af00 add r7, sp, #0
80074e0: 6078 str r0, [r7, #4]
CDC_HandleTypeDef *CDC_Handle = (CDC_HandleTypeDef *) phost->pActiveClass->pData;
80074e2: 687b ldr r3, [r7, #4]
80074e4: f8d3 337c ldr.w r3, [r3, #892] ; 0x37c
80074e8: 69db ldr r3, [r3, #28]
80074ea: 617b str r3, [r7, #20]
USBH_URBStateTypeDef URB_Status = USBH_URB_IDLE;
80074ec: 2300 movs r3, #0
80074ee: 74fb strb r3, [r7, #19]
uint32_t length;
switch (CDC_Handle->data_rx_state)
80074f0: 697b ldr r3, [r7, #20]
80074f2: f893 304e ldrb.w r3, [r3, #78] ; 0x4e
80074f6: 2b03 cmp r3, #3
80074f8: d002 beq.n 8007500 <CDC_ProcessReception+0x26>
80074fa: 2b04 cmp r3, #4
80074fc: d00e beq.n 800751c <CDC_ProcessReception+0x42>
#endif
}
break;
default:
break;
80074fe: e043 b.n 8007588 <CDC_ProcessReception+0xae>
USBH_BulkReceiveData(phost,
8007500: 697b ldr r3, [r7, #20]
8007502: 6a19 ldr r1, [r3, #32]
8007504: 697b ldr r3, [r7, #20]
8007506: 8b5a ldrh r2, [r3, #26]
8007508: 697b ldr r3, [r7, #20]
800750a: 7b1b ldrb r3, [r3, #12]
800750c: 6878 ldr r0, [r7, #4]
800750e: f001 fb07 bl 8008b20 <USBH_BulkReceiveData>
CDC_Handle->data_rx_state = CDC_RECEIVE_DATA_WAIT;
8007512: 697b ldr r3, [r7, #20]
8007514: 2204 movs r2, #4
8007516: f883 204e strb.w r2, [r3, #78] ; 0x4e
break;
800751a: e035 b.n 8007588 <CDC_ProcessReception+0xae>
URB_Status = USBH_LL_GetURBState(phost, CDC_Handle->DataItf.InPipe);
800751c: 697b ldr r3, [r7, #20]
800751e: 7b1b ldrb r3, [r3, #12]
8007520: 4619 mov r1, r3
8007522: 6878 ldr r0, [r7, #4]
8007524: f001 fe04 bl 8009130 <USBH_LL_GetURBState>
8007528: 4603 mov r3, r0
800752a: 74fb strb r3, [r7, #19]
if (URB_Status == USBH_URB_DONE)
800752c: 7cfb ldrb r3, [r7, #19]
800752e: 2b01 cmp r3, #1
8007530: d129 bne.n 8007586 <CDC_ProcessReception+0xac>
length = USBH_LL_GetLastXferSize(phost, CDC_Handle->DataItf.InPipe);
8007532: 697b ldr r3, [r7, #20]
8007534: 7b1b ldrb r3, [r3, #12]
8007536: 4619 mov r1, r3
8007538: 6878 ldr r0, [r7, #4]
800753a: f001 fd67 bl 800900c <USBH_LL_GetLastXferSize>
800753e: 60f8 str r0, [r7, #12]
if (((CDC_Handle->RxDataLength - length) > 0U) && (length > CDC_Handle->DataItf.InEpSize))
8007540: 697b ldr r3, [r7, #20]
8007542: 6a9b ldr r3, [r3, #40] ; 0x28
8007544: 68fa ldr r2, [r7, #12]
8007546: 429a cmp r2, r3
8007548: d016 beq.n 8007578 <CDC_ProcessReception+0x9e>
800754a: 697b ldr r3, [r7, #20]
800754c: 8b5b ldrh r3, [r3, #26]
800754e: 461a mov r2, r3
8007550: 68fb ldr r3, [r7, #12]
8007552: 4293 cmp r3, r2
8007554: d910 bls.n 8007578 <CDC_ProcessReception+0x9e>
CDC_Handle->RxDataLength -= length ;
8007556: 697b ldr r3, [r7, #20]
8007558: 6a9a ldr r2, [r3, #40] ; 0x28
800755a: 68fb ldr r3, [r7, #12]
800755c: 1ad2 subs r2, r2, r3
800755e: 697b ldr r3, [r7, #20]
8007560: 629a str r2, [r3, #40] ; 0x28
CDC_Handle->pRxData += length;
8007562: 697b ldr r3, [r7, #20]
8007564: 6a1a ldr r2, [r3, #32]
8007566: 68fb ldr r3, [r7, #12]
8007568: 441a add r2, r3
800756a: 697b ldr r3, [r7, #20]
800756c: 621a str r2, [r3, #32]
CDC_Handle->data_rx_state = CDC_RECEIVE_DATA;
800756e: 697b ldr r3, [r7, #20]
8007570: 2203 movs r2, #3
8007572: f883 204e strb.w r2, [r3, #78] ; 0x4e
break;
8007576: e006 b.n 8007586 <CDC_ProcessReception+0xac>
CDC_Handle->data_rx_state = CDC_IDLE;
8007578: 697b ldr r3, [r7, #20]
800757a: 2200 movs r2, #0
800757c: f883 204e strb.w r2, [r3, #78] ; 0x4e
USBH_CDC_ReceiveCallback(phost);
8007580: 6878 ldr r0, [r7, #4]
8007582: f000 f80f bl 80075a4 <USBH_CDC_ReceiveCallback>
break;
8007586: bf00 nop
}
}
8007588: bf00 nop
800758a: 3718 adds r7, #24
800758c: 46bd mov sp, r7
800758e: bd80 pop {r7, pc}
08007590 <USBH_CDC_TransmitCallback>:
* @brief The function informs user that data have been received
* @param pdev: Selected device
* @retval None
*/
__weak void USBH_CDC_TransmitCallback(USBH_HandleTypeDef *phost)
{
8007590: b480 push {r7}
8007592: b083 sub sp, #12
8007594: af00 add r7, sp, #0
8007596: 6078 str r0, [r7, #4]
/* Prevent unused argument(s) compilation warning */
UNUSED(phost);
}
8007598: bf00 nop
800759a: 370c adds r7, #12
800759c: 46bd mov sp, r7
800759e: f85d 7b04 ldr.w r7, [sp], #4
80075a2: 4770 bx lr
080075a4 <USBH_CDC_ReceiveCallback>:
* @brief The function informs user that data have been sent
* @param pdev: Selected device
* @retval None
*/
__weak void USBH_CDC_ReceiveCallback(USBH_HandleTypeDef *phost)
{
80075a4: b480 push {r7}
80075a6: b083 sub sp, #12
80075a8: af00 add r7, sp, #0
80075aa: 6078 str r0, [r7, #4]
/* Prevent unused argument(s) compilation warning */
UNUSED(phost);
}
80075ac: bf00 nop
80075ae: 370c adds r7, #12
80075b0: 46bd mov sp, r7
80075b2: f85d 7b04 ldr.w r7, [sp], #4
80075b6: 4770 bx lr
080075b8 <USBH_CDC_LineCodingChanged>:
* @brief The function informs user that Settings have been changed
* @param pdev: Selected device
* @retval None
*/
__weak void USBH_CDC_LineCodingChanged(USBH_HandleTypeDef *phost)
{
80075b8: b480 push {r7}
80075ba: b083 sub sp, #12
80075bc: af00 add r7, sp, #0
80075be: 6078 str r0, [r7, #4]
/* Prevent unused argument(s) compilation warning */
UNUSED(phost);
}
80075c0: bf00 nop
80075c2: 370c adds r7, #12
80075c4: 46bd mov sp, r7
80075c6: f85d 7b04 ldr.w r7, [sp], #4
80075ca: 4770 bx lr
080075cc <USBH_Init>:
* @retval USBH Status
*/
USBH_StatusTypeDef USBH_Init(USBH_HandleTypeDef *phost,
void (*pUsrFunc)(USBH_HandleTypeDef *phost,
uint8_t id), uint8_t id)
{
80075cc: b580 push {r7, lr}
80075ce: b084 sub sp, #16
80075d0: af00 add r7, sp, #0
80075d2: 60f8 str r0, [r7, #12]
80075d4: 60b9 str r1, [r7, #8]
80075d6: 4613 mov r3, r2
80075d8: 71fb strb r3, [r7, #7]
/* Check whether the USB Host handle is valid */
if (phost == NULL)
80075da: 68fb ldr r3, [r7, #12]
80075dc: 2b00 cmp r3, #0
80075de: d101 bne.n 80075e4 <USBH_Init+0x18>
{
USBH_ErrLog("Invalid Host handle");
return USBH_FAIL;
80075e0: 2302 movs r3, #2
80075e2: e029 b.n 8007638 <USBH_Init+0x6c>
}
/* Set DRiver ID */
phost->id = id;
80075e4: 68fb ldr r3, [r7, #12]
80075e6: 79fa ldrb r2, [r7, #7]
80075e8: f883 23cc strb.w r2, [r3, #972] ; 0x3cc
/* Unlink class*/
phost->pActiveClass = NULL;
80075ec: 68fb ldr r3, [r7, #12]
80075ee: 2200 movs r2, #0
80075f0: f8c3 237c str.w r2, [r3, #892] ; 0x37c
phost->ClassNumber = 0U;
80075f4: 68fb ldr r3, [r7, #12]
80075f6: 2200 movs r2, #0
80075f8: f8c3 2380 str.w r2, [r3, #896] ; 0x380
/* Restore default states and prepare EP0 */
DeInitStateMachine(phost);
80075fc: 68f8 ldr r0, [r7, #12]
80075fe: f000 f81f bl 8007640 <DeInitStateMachine>
/* Restore default Device connection states */
phost->device.PortEnabled = 0U;
8007602: 68fb ldr r3, [r7, #12]
8007604: 2200 movs r2, #0
8007606: f883 2323 strb.w r2, [r3, #803] ; 0x323
phost->device.is_connected = 0U;
800760a: 68fb ldr r3, [r7, #12]
800760c: 2200 movs r2, #0
800760e: f883 2320 strb.w r2, [r3, #800] ; 0x320
phost->device.is_disconnected = 0U;
8007612: 68fb ldr r3, [r7, #12]
8007614: 2200 movs r2, #0
8007616: f883 2321 strb.w r2, [r3, #801] ; 0x321
phost->device.is_ReEnumerated = 0U;
800761a: 68fb ldr r3, [r7, #12]
800761c: 2200 movs r2, #0
800761e: f883 2322 strb.w r2, [r3, #802] ; 0x322
/* Assign User process */
if (pUsrFunc != NULL)
8007622: 68bb ldr r3, [r7, #8]
8007624: 2b00 cmp r3, #0
8007626: d003 beq.n 8007630 <USBH_Init+0x64>
{
phost->pUser = pUsrFunc;
8007628: 68fb ldr r3, [r7, #12]
800762a: 68ba ldr r2, [r7, #8]
800762c: f8c3 23d4 str.w r2, [r3, #980] ; 0x3d4
#endif /* (osCMSIS < 0x20000U) */
#endif /* (USBH_USE_OS == 1U) */
/* Initialize low level driver */
USBH_LL_Init(phost);
8007630: 68f8 ldr r0, [r7, #12]
8007632: f001 fc39 bl 8008ea8 <USBH_LL_Init>
return USBH_OK;
8007636: 2300 movs r3, #0
}
8007638: 4618 mov r0, r3
800763a: 3710 adds r7, #16
800763c: 46bd mov sp, r7
800763e: bd80 pop {r7, pc}
08007640 <DeInitStateMachine>:
* De-Initialize the Host state machine.
* @param phost: Host Handle
* @retval USBH Status
*/
static USBH_StatusTypeDef DeInitStateMachine(USBH_HandleTypeDef *phost)
{
8007640: b480 push {r7}
8007642: b085 sub sp, #20
8007644: af00 add r7, sp, #0
8007646: 6078 str r0, [r7, #4]
uint32_t i = 0U;
8007648: 2300 movs r3, #0
800764a: 60fb str r3, [r7, #12]
/* Clear Pipes flags*/
for (i = 0U; i < USBH_MAX_PIPES_NBR; i++)
800764c: 2300 movs r3, #0
800764e: 60fb str r3, [r7, #12]
8007650: e009 b.n 8007666 <DeInitStateMachine+0x26>
{
phost->Pipes[i] = 0U;
8007652: 687a ldr r2, [r7, #4]
8007654: 68fb ldr r3, [r7, #12]
8007656: 33e0 adds r3, #224 ; 0xe0
8007658: 009b lsls r3, r3, #2
800765a: 4413 add r3, r2
800765c: 2200 movs r2, #0
800765e: 605a str r2, [r3, #4]
for (i = 0U; i < USBH_MAX_PIPES_NBR; i++)
8007660: 68fb ldr r3, [r7, #12]
8007662: 3301 adds r3, #1
8007664: 60fb str r3, [r7, #12]
8007666: 68fb ldr r3, [r7, #12]
8007668: 2b0e cmp r3, #14
800766a: d9f2 bls.n 8007652 <DeInitStateMachine+0x12>
}
for (i = 0U; i < USBH_MAX_DATA_BUFFER; i++)
800766c: 2300 movs r3, #0
800766e: 60fb str r3, [r7, #12]
8007670: e009 b.n 8007686 <DeInitStateMachine+0x46>
{
phost->device.Data[i] = 0U;
8007672: 687a ldr r2, [r7, #4]
8007674: 68fb ldr r3, [r7, #12]
8007676: 4413 add r3, r2
8007678: f503 738e add.w r3, r3, #284 ; 0x11c
800767c: 2200 movs r2, #0
800767e: 701a strb r2, [r3, #0]
for (i = 0U; i < USBH_MAX_DATA_BUFFER; i++)
8007680: 68fb ldr r3, [r7, #12]
8007682: 3301 adds r3, #1
8007684: 60fb str r3, [r7, #12]
8007686: 68fb ldr r3, [r7, #12]
8007688: f5b3 7f00 cmp.w r3, #512 ; 0x200
800768c: d3f1 bcc.n 8007672 <DeInitStateMachine+0x32>
}
phost->gState = HOST_IDLE;
800768e: 687b ldr r3, [r7, #4]
8007690: 2200 movs r2, #0
8007692: 701a strb r2, [r3, #0]
phost->EnumState = ENUM_IDLE;
8007694: 687b ldr r3, [r7, #4]
8007696: 2200 movs r2, #0
8007698: 705a strb r2, [r3, #1]
phost->RequestState = CMD_SEND;
800769a: 687b ldr r3, [r7, #4]
800769c: 2201 movs r2, #1
800769e: 709a strb r2, [r3, #2]
phost->Timer = 0U;
80076a0: 687b ldr r3, [r7, #4]
80076a2: 2200 movs r2, #0
80076a4: f8c3 23c4 str.w r2, [r3, #964] ; 0x3c4
phost->Control.state = CTRL_SETUP;
80076a8: 687b ldr r3, [r7, #4]
80076aa: 2201 movs r2, #1
80076ac: 761a strb r2, [r3, #24]
phost->Control.pipe_size = USBH_MPS_DEFAULT;
80076ae: 687b ldr r3, [r7, #4]
80076b0: 2240 movs r2, #64 ; 0x40
80076b2: 719a strb r2, [r3, #6]
phost->Control.errorcount = 0U;
80076b4: 687b ldr r3, [r7, #4]
80076b6: 2200 movs r2, #0
80076b8: 765a strb r2, [r3, #25]
phost->device.address = USBH_ADDRESS_DEFAULT;
80076ba: 687b ldr r3, [r7, #4]
80076bc: 2200 movs r2, #0
80076be: f883 231c strb.w r2, [r3, #796] ; 0x31c
phost->device.speed = USBH_SPEED_FULL;
80076c2: 687b ldr r3, [r7, #4]
80076c4: 2201 movs r2, #1
80076c6: f883 231d strb.w r2, [r3, #797] ; 0x31d
phost->device.RstCnt = 0U;
80076ca: 687b ldr r3, [r7, #4]
80076cc: 2200 movs r2, #0
80076ce: f883 231f strb.w r2, [r3, #799] ; 0x31f
phost->device.EnumCnt = 0U;
80076d2: 687b ldr r3, [r7, #4]
80076d4: 2200 movs r2, #0
80076d6: f883 231e strb.w r2, [r3, #798] ; 0x31e
return USBH_OK;
80076da: 2300 movs r3, #0
}
80076dc: 4618 mov r0, r3
80076de: 3714 adds r7, #20
80076e0: 46bd mov sp, r7
80076e2: f85d 7b04 ldr.w r7, [sp], #4
80076e6: 4770 bx lr
080076e8 <USBH_RegisterClass>:
* @param phost : Host Handle
* @param pclass: Class handle
* @retval USBH Status
*/
USBH_StatusTypeDef USBH_RegisterClass(USBH_HandleTypeDef *phost, USBH_ClassTypeDef *pclass)
{
80076e8: b480 push {r7}
80076ea: b085 sub sp, #20
80076ec: af00 add r7, sp, #0
80076ee: 6078 str r0, [r7, #4]
80076f0: 6039 str r1, [r7, #0]
USBH_StatusTypeDef status = USBH_OK;
80076f2: 2300 movs r3, #0
80076f4: 73fb strb r3, [r7, #15]
if (pclass != NULL)
80076f6: 683b ldr r3, [r7, #0]
80076f8: 2b00 cmp r3, #0
80076fa: d016 beq.n 800772a <USBH_RegisterClass+0x42>
{
if (phost->ClassNumber < USBH_MAX_NUM_SUPPORTED_CLASS)
80076fc: 687b ldr r3, [r7, #4]
80076fe: f8d3 3380 ldr.w r3, [r3, #896] ; 0x380
8007702: 2b00 cmp r3, #0
8007704: d10e bne.n 8007724 <USBH_RegisterClass+0x3c>
{
/* link the class to the USB Host handle */
phost->pClass[phost->ClassNumber++] = pclass;
8007706: 687b ldr r3, [r7, #4]
8007708: f8d3 3380 ldr.w r3, [r3, #896] ; 0x380
800770c: 1c59 adds r1, r3, #1
800770e: 687a ldr r2, [r7, #4]
8007710: f8c2 1380 str.w r1, [r2, #896] ; 0x380
8007714: 687a ldr r2, [r7, #4]
8007716: 33de adds r3, #222 ; 0xde
8007718: 6839 ldr r1, [r7, #0]
800771a: f842 1023 str.w r1, [r2, r3, lsl #2]
status = USBH_OK;
800771e: 2300 movs r3, #0
8007720: 73fb strb r3, [r7, #15]
8007722: e004 b.n 800772e <USBH_RegisterClass+0x46>
}
else
{
USBH_ErrLog("Max Class Number reached");
status = USBH_FAIL;
8007724: 2302 movs r3, #2
8007726: 73fb strb r3, [r7, #15]
8007728: e001 b.n 800772e <USBH_RegisterClass+0x46>
}
}
else
{
USBH_ErrLog("Invalid Class handle");
status = USBH_FAIL;
800772a: 2302 movs r3, #2
800772c: 73fb strb r3, [r7, #15]
}
return status;
800772e: 7bfb ldrb r3, [r7, #15]
}
8007730: 4618 mov r0, r3
8007732: 3714 adds r7, #20
8007734: 46bd mov sp, r7
8007736: f85d 7b04 ldr.w r7, [sp], #4
800773a: 4770 bx lr
0800773c <USBH_SelectInterface>:
* @param phost: Host Handle
* @param interface: Interface number
* @retval USBH Status
*/
USBH_StatusTypeDef USBH_SelectInterface(USBH_HandleTypeDef *phost, uint8_t interface)
{
800773c: b480 push {r7}
800773e: b085 sub sp, #20
8007740: af00 add r7, sp, #0
8007742: 6078 str r0, [r7, #4]
8007744: 460b mov r3, r1
8007746: 70fb strb r3, [r7, #3]
USBH_StatusTypeDef status = USBH_OK;
8007748: 2300 movs r3, #0
800774a: 73fb strb r3, [r7, #15]
if (interface < phost->device.CfgDesc.bNumInterfaces)
800774c: 687b ldr r3, [r7, #4]
800774e: f893 333c ldrb.w r3, [r3, #828] ; 0x33c
8007752: 78fa ldrb r2, [r7, #3]
8007754: 429a cmp r2, r3
8007756: d204 bcs.n 8007762 <USBH_SelectInterface+0x26>
{
phost->device.current_interface = interface;
8007758: 687b ldr r3, [r7, #4]
800775a: 78fa ldrb r2, [r7, #3]
800775c: f883 2324 strb.w r2, [r3, #804] ; 0x324
8007760: e001 b.n 8007766 <USBH_SelectInterface+0x2a>
USBH_UsrLog("Protocol : %xh", phost->device.CfgDesc.Itf_Desc[interface].bInterfaceProtocol);
}
else
{
USBH_ErrLog("Cannot Select This Interface.");
status = USBH_FAIL;
8007762: 2302 movs r3, #2
8007764: 73fb strb r3, [r7, #15]
}
return status;
8007766: 7bfb ldrb r3, [r7, #15]
}
8007768: 4618 mov r0, r3
800776a: 3714 adds r7, #20
800776c: 46bd mov sp, r7
800776e: f85d 7b04 ldr.w r7, [sp], #4
8007772: 4770 bx lr
08007774 <USBH_FindInterface>:
* @param Protocol: Protocol code
* @retval interface index in the configuration structure
* @note : (1)interface index 0xFF means interface index not found
*/
uint8_t USBH_FindInterface(USBH_HandleTypeDef *phost, uint8_t Class, uint8_t SubClass, uint8_t Protocol)
{
8007774: b480 push {r7}
8007776: b087 sub sp, #28
8007778: af00 add r7, sp, #0
800777a: 6078 str r0, [r7, #4]
800777c: 4608 mov r0, r1
800777e: 4611 mov r1, r2
8007780: 461a mov r2, r3
8007782: 4603 mov r3, r0
8007784: 70fb strb r3, [r7, #3]
8007786: 460b mov r3, r1
8007788: 70bb strb r3, [r7, #2]
800778a: 4613 mov r3, r2
800778c: 707b strb r3, [r7, #1]
USBH_InterfaceDescTypeDef *pif;
USBH_CfgDescTypeDef *pcfg;
uint8_t if_ix = 0U;
800778e: 2300 movs r3, #0
8007790: 75fb strb r3, [r7, #23]
pif = (USBH_InterfaceDescTypeDef *)0;
8007792: 2300 movs r3, #0
8007794: 613b str r3, [r7, #16]
pcfg = &phost->device.CfgDesc;
8007796: 687b ldr r3, [r7, #4]
8007798: f503 734e add.w r3, r3, #824 ; 0x338
800779c: 60fb str r3, [r7, #12]
while (if_ix < USBH_MAX_NUM_INTERFACES)
800779e: e025 b.n 80077ec <USBH_FindInterface+0x78>
{
pif = &pcfg->Itf_Desc[if_ix];
80077a0: 7dfb ldrb r3, [r7, #23]
80077a2: 221a movs r2, #26
80077a4: fb02 f303 mul.w r3, r2, r3
80077a8: 3308 adds r3, #8
80077aa: 68fa ldr r2, [r7, #12]
80077ac: 4413 add r3, r2
80077ae: 3302 adds r3, #2
80077b0: 613b str r3, [r7, #16]
if (((pif->bInterfaceClass == Class) || (Class == 0xFFU)) &&
80077b2: 693b ldr r3, [r7, #16]
80077b4: 795b ldrb r3, [r3, #5]
80077b6: 78fa ldrb r2, [r7, #3]
80077b8: 429a cmp r2, r3
80077ba: d002 beq.n 80077c2 <USBH_FindInterface+0x4e>
80077bc: 78fb ldrb r3, [r7, #3]
80077be: 2bff cmp r3, #255 ; 0xff
80077c0: d111 bne.n 80077e6 <USBH_FindInterface+0x72>
((pif->bInterfaceSubClass == SubClass) || (SubClass == 0xFFU)) &&
80077c2: 693b ldr r3, [r7, #16]
80077c4: 799b ldrb r3, [r3, #6]
if (((pif->bInterfaceClass == Class) || (Class == 0xFFU)) &&
80077c6: 78ba ldrb r2, [r7, #2]
80077c8: 429a cmp r2, r3
80077ca: d002 beq.n 80077d2 <USBH_FindInterface+0x5e>
((pif->bInterfaceSubClass == SubClass) || (SubClass == 0xFFU)) &&
80077cc: 78bb ldrb r3, [r7, #2]
80077ce: 2bff cmp r3, #255 ; 0xff
80077d0: d109 bne.n 80077e6 <USBH_FindInterface+0x72>
((pif->bInterfaceProtocol == Protocol) || (Protocol == 0xFFU)))
80077d2: 693b ldr r3, [r7, #16]
80077d4: 79db ldrb r3, [r3, #7]
((pif->bInterfaceSubClass == SubClass) || (SubClass == 0xFFU)) &&
80077d6: 787a ldrb r2, [r7, #1]
80077d8: 429a cmp r2, r3
80077da: d002 beq.n 80077e2 <USBH_FindInterface+0x6e>
((pif->bInterfaceProtocol == Protocol) || (Protocol == 0xFFU)))
80077dc: 787b ldrb r3, [r7, #1]
80077de: 2bff cmp r3, #255 ; 0xff
80077e0: d101 bne.n 80077e6 <USBH_FindInterface+0x72>
{
return if_ix;
80077e2: 7dfb ldrb r3, [r7, #23]
80077e4: e006 b.n 80077f4 <USBH_FindInterface+0x80>
}
if_ix++;
80077e6: 7dfb ldrb r3, [r7, #23]
80077e8: 3301 adds r3, #1
80077ea: 75fb strb r3, [r7, #23]
while (if_ix < USBH_MAX_NUM_INTERFACES)
80077ec: 7dfb ldrb r3, [r7, #23]
80077ee: 2b01 cmp r3, #1
80077f0: d9d6 bls.n 80077a0 <USBH_FindInterface+0x2c>
}
return 0xFFU;
80077f2: 23ff movs r3, #255 ; 0xff
}
80077f4: 4618 mov r0, r3
80077f6: 371c adds r7, #28
80077f8: 46bd mov sp, r7
80077fa: f85d 7b04 ldr.w r7, [sp], #4
80077fe: 4770 bx lr
08007800 <USBH_Start>:
* Start the USB Host Core.
* @param phost: Host Handle
* @retval USBH Status
*/
USBH_StatusTypeDef USBH_Start(USBH_HandleTypeDef *phost)
{
8007800: b580 push {r7, lr}
8007802: b082 sub sp, #8
8007804: af00 add r7, sp, #0
8007806: 6078 str r0, [r7, #4]
/* Start the low level driver */
USBH_LL_Start(phost);
8007808: 6878 ldr r0, [r7, #4]
800780a: f001 fb89 bl 8008f20 <USBH_LL_Start>
/* Activate VBUS on the port */
USBH_LL_DriverVBUS(phost, TRUE);
800780e: 2101 movs r1, #1
8007810: 6878 ldr r0, [r7, #4]
8007812: f001 fca0 bl 8009156 <USBH_LL_DriverVBUS>
return USBH_OK;
8007816: 2300 movs r3, #0
}
8007818: 4618 mov r0, r3
800781a: 3708 adds r7, #8
800781c: 46bd mov sp, r7
800781e: bd80 pop {r7, pc}
08007820 <USBH_Process>:
* Background process of the USB Core.
* @param phost: Host Handle
* @retval USBH Status
*/
USBH_StatusTypeDef USBH_Process(USBH_HandleTypeDef *phost)
{
8007820: b580 push {r7, lr}
8007822: b088 sub sp, #32
8007824: af04 add r7, sp, #16
8007826: 6078 str r0, [r7, #4]
__IO USBH_StatusTypeDef status = USBH_FAIL;
8007828: 2302 movs r3, #2
800782a: 73bb strb r3, [r7, #14]
uint8_t idx = 0U;
800782c: 2300 movs r3, #0
800782e: 73fb strb r3, [r7, #15]
/* check for Host pending port disconnect event */
if (phost->device.is_disconnected == 1U)
8007830: 687b ldr r3, [r7, #4]
8007832: f893 3321 ldrb.w r3, [r3, #801] ; 0x321
8007836: b2db uxtb r3, r3
8007838: 2b01 cmp r3, #1
800783a: d102 bne.n 8007842 <USBH_Process+0x22>
{
phost->gState = HOST_DEV_DISCONNECTED;
800783c: 687b ldr r3, [r7, #4]
800783e: 2203 movs r2, #3
8007840: 701a strb r2, [r3, #0]
}
switch (phost->gState)
8007842: 687b ldr r3, [r7, #4]
8007844: 781b ldrb r3, [r3, #0]
8007846: b2db uxtb r3, r3
8007848: 2b0b cmp r3, #11
800784a: f200 81b3 bhi.w 8007bb4 <USBH_Process+0x394>
800784e: a201 add r2, pc, #4 ; (adr r2, 8007854 <USBH_Process+0x34>)
8007850: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8007854: 08007885 .word 0x08007885
8007858: 080078b7 .word 0x080078b7
800785c: 0800791f .word 0x0800791f
8007860: 08007b4f .word 0x08007b4f
8007864: 08007bb5 .word 0x08007bb5
8007868: 080079c3 .word 0x080079c3
800786c: 08007af5 .word 0x08007af5
8007870: 080079f9 .word 0x080079f9
8007874: 08007a19 .word 0x08007a19
8007878: 08007a39 .word 0x08007a39
800787c: 08007a67 .word 0x08007a67
8007880: 08007b37 .word 0x08007b37
{
case HOST_IDLE :
if (phost->device.is_connected)
8007884: 687b ldr r3, [r7, #4]
8007886: f893 3320 ldrb.w r3, [r3, #800] ; 0x320
800788a: b2db uxtb r3, r3
800788c: 2b00 cmp r3, #0
800788e: f000 8193 beq.w 8007bb8 <USBH_Process+0x398>
{
USBH_UsrLog("USB Device Connected");
/* Wait for 200 ms after connection */
phost->gState = HOST_DEV_WAIT_FOR_ATTACHMENT;
8007892: 687b ldr r3, [r7, #4]
8007894: 2201 movs r2, #1
8007896: 701a strb r2, [r3, #0]
USBH_Delay(200U);
8007898: 20c8 movs r0, #200 ; 0xc8
800789a: f001 fca6 bl 80091ea <USBH_Delay>
USBH_LL_ResetPort(phost);
800789e: 6878 ldr r0, [r7, #4]
80078a0: f001 fb99 bl 8008fd6 <USBH_LL_ResetPort>
/* Make sure to start with Default address */
phost->device.address = USBH_ADDRESS_DEFAULT;
80078a4: 687b ldr r3, [r7, #4]
80078a6: 2200 movs r2, #0
80078a8: f883 231c strb.w r2, [r3, #796] ; 0x31c
phost->Timeout = 0U;
80078ac: 687b ldr r3, [r7, #4]
80078ae: 2200 movs r2, #0
80078b0: f8c3 23c8 str.w r2, [r3, #968] ; 0x3c8
#else
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
#endif
#endif
}
break;
80078b4: e180 b.n 8007bb8 <USBH_Process+0x398>
case HOST_DEV_WAIT_FOR_ATTACHMENT: /* Wait for Port Enabled */
if (phost->device.PortEnabled == 1U)
80078b6: 687b ldr r3, [r7, #4]
80078b8: f893 3323 ldrb.w r3, [r3, #803] ; 0x323
80078bc: 2b01 cmp r3, #1
80078be: d107 bne.n 80078d0 <USBH_Process+0xb0>
{
USBH_UsrLog("USB Device Reset Completed");
phost->device.RstCnt = 0U;
80078c0: 687b ldr r3, [r7, #4]
80078c2: 2200 movs r2, #0
80078c4: f883 231f strb.w r2, [r3, #799] ; 0x31f
phost->gState = HOST_DEV_ATTACHED;
80078c8: 687b ldr r3, [r7, #4]
80078ca: 2202 movs r2, #2
80078cc: 701a strb r2, [r3, #0]
(void)osMessagePut(phost->os_event, phost->os_msg, 0U);
#else
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
#endif
#endif
break;
80078ce: e182 b.n 8007bd6 <USBH_Process+0x3b6>
if (phost->Timeout > USBH_DEV_RESET_TIMEOUT)
80078d0: 687b ldr r3, [r7, #4]
80078d2: f8d3 33c8 ldr.w r3, [r3, #968] ; 0x3c8
80078d6: f5b3 7f7a cmp.w r3, #1000 ; 0x3e8
80078da: d914 bls.n 8007906 <USBH_Process+0xe6>
phost->device.RstCnt++;
80078dc: 687b ldr r3, [r7, #4]
80078de: f893 331f ldrb.w r3, [r3, #799] ; 0x31f
80078e2: 3301 adds r3, #1
80078e4: b2da uxtb r2, r3
80078e6: 687b ldr r3, [r7, #4]
80078e8: f883 231f strb.w r2, [r3, #799] ; 0x31f
if (phost->device.RstCnt > 3U)
80078ec: 687b ldr r3, [r7, #4]
80078ee: f893 331f ldrb.w r3, [r3, #799] ; 0x31f
80078f2: 2b03 cmp r3, #3
80078f4: d903 bls.n 80078fe <USBH_Process+0xde>
phost->gState = HOST_ABORT_STATE;
80078f6: 687b ldr r3, [r7, #4]
80078f8: 220d movs r2, #13
80078fa: 701a strb r2, [r3, #0]
break;
80078fc: e16b b.n 8007bd6 <USBH_Process+0x3b6>
phost->gState = HOST_IDLE;
80078fe: 687b ldr r3, [r7, #4]
8007900: 2200 movs r2, #0
8007902: 701a strb r2, [r3, #0]
break;
8007904: e167 b.n 8007bd6 <USBH_Process+0x3b6>
phost->Timeout += 10U;
8007906: 687b ldr r3, [r7, #4]
8007908: f8d3 33c8 ldr.w r3, [r3, #968] ; 0x3c8
800790c: f103 020a add.w r2, r3, #10
8007910: 687b ldr r3, [r7, #4]
8007912: f8c3 23c8 str.w r2, [r3, #968] ; 0x3c8
USBH_Delay(10U);
8007916: 200a movs r0, #10
8007918: f001 fc67 bl 80091ea <USBH_Delay>
break;
800791c: e15b b.n 8007bd6 <USBH_Process+0x3b6>
case HOST_DEV_ATTACHED :
if (phost->pUser != NULL)
800791e: 687b ldr r3, [r7, #4]
8007920: f8d3 33d4 ldr.w r3, [r3, #980] ; 0x3d4
8007924: 2b00 cmp r3, #0
8007926: d005 beq.n 8007934 <USBH_Process+0x114>
{
phost->pUser(phost, HOST_USER_CONNECTION);
8007928: 687b ldr r3, [r7, #4]
800792a: f8d3 33d4 ldr.w r3, [r3, #980] ; 0x3d4
800792e: 2104 movs r1, #4
8007930: 6878 ldr r0, [r7, #4]
8007932: 4798 blx r3
}
/* Wait for 100 ms after Reset */
USBH_Delay(100U);
8007934: 2064 movs r0, #100 ; 0x64
8007936: f001 fc58 bl 80091ea <USBH_Delay>
phost->device.speed = USBH_LL_GetSpeed(phost);
800793a: 6878 ldr r0, [r7, #4]
800793c: f001 fb26 bl 8008f8c <USBH_LL_GetSpeed>
8007940: 4603 mov r3, r0
8007942: 461a mov r2, r3
8007944: 687b ldr r3, [r7, #4]
8007946: f883 231d strb.w r2, [r3, #797] ; 0x31d
phost->gState = HOST_ENUMERATION;
800794a: 687b ldr r3, [r7, #4]
800794c: 2205 movs r2, #5
800794e: 701a strb r2, [r3, #0]
phost->Control.pipe_out = USBH_AllocPipe(phost, 0x00U);
8007950: 2100 movs r1, #0
8007952: 6878 ldr r0, [r7, #4]
8007954: f001 f931 bl 8008bba <USBH_AllocPipe>
8007958: 4603 mov r3, r0
800795a: 461a mov r2, r3
800795c: 687b ldr r3, [r7, #4]
800795e: 715a strb r2, [r3, #5]
phost->Control.pipe_in = USBH_AllocPipe(phost, 0x80U);
8007960: 2180 movs r1, #128 ; 0x80
8007962: 6878 ldr r0, [r7, #4]
8007964: f001 f929 bl 8008bba <USBH_AllocPipe>
8007968: 4603 mov r3, r0
800796a: 461a mov r2, r3
800796c: 687b ldr r3, [r7, #4]
800796e: 711a strb r2, [r3, #4]
/* Open Control pipes */
USBH_OpenPipe(phost, phost->Control.pipe_in, 0x80U,
8007970: 687b ldr r3, [r7, #4]
8007972: 7919 ldrb r1, [r3, #4]
8007974: 687b ldr r3, [r7, #4]
8007976: f893 031c ldrb.w r0, [r3, #796] ; 0x31c
800797a: 687b ldr r3, [r7, #4]
800797c: f893 331d ldrb.w r3, [r3, #797] ; 0x31d
phost->device.address, phost->device.speed,
USBH_EP_CONTROL, (uint16_t)phost->Control.pipe_size);
8007980: 687a ldr r2, [r7, #4]
8007982: 7992 ldrb r2, [r2, #6]
USBH_OpenPipe(phost, phost->Control.pipe_in, 0x80U,
8007984: b292 uxth r2, r2
8007986: 9202 str r2, [sp, #8]
8007988: 2200 movs r2, #0
800798a: 9201 str r2, [sp, #4]
800798c: 9300 str r3, [sp, #0]
800798e: 4603 mov r3, r0
8007990: 2280 movs r2, #128 ; 0x80
8007992: 6878 ldr r0, [r7, #4]
8007994: f001 f8e2 bl 8008b5c <USBH_OpenPipe>
/* Open Control pipes */
USBH_OpenPipe(phost, phost->Control.pipe_out, 0x00U,
8007998: 687b ldr r3, [r7, #4]
800799a: 7959 ldrb r1, [r3, #5]
800799c: 687b ldr r3, [r7, #4]
800799e: f893 031c ldrb.w r0, [r3, #796] ; 0x31c
80079a2: 687b ldr r3, [r7, #4]
80079a4: f893 331d ldrb.w r3, [r3, #797] ; 0x31d
phost->device.address, phost->device.speed,
USBH_EP_CONTROL, (uint16_t)phost->Control.pipe_size);
80079a8: 687a ldr r2, [r7, #4]
80079aa: 7992 ldrb r2, [r2, #6]
USBH_OpenPipe(phost, phost->Control.pipe_out, 0x00U,
80079ac: b292 uxth r2, r2
80079ae: 9202 str r2, [sp, #8]
80079b0: 2200 movs r2, #0
80079b2: 9201 str r2, [sp, #4]
80079b4: 9300 str r3, [sp, #0]
80079b6: 4603 mov r3, r0
80079b8: 2200 movs r2, #0
80079ba: 6878 ldr r0, [r7, #4]
80079bc: f001 f8ce bl 8008b5c <USBH_OpenPipe>
(void)osMessagePut(phost->os_event, phost->os_msg, 0U);
#else
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
#endif
#endif
break;
80079c0: e109 b.n 8007bd6 <USBH_Process+0x3b6>
case HOST_ENUMERATION:
/* Check for enumeration status */
status = USBH_HandleEnum(phost);
80079c2: 6878 ldr r0, [r7, #4]
80079c4: f000 f90c bl 8007be0 <USBH_HandleEnum>
80079c8: 4603 mov r3, r0
80079ca: 73bb strb r3, [r7, #14]
if (status == USBH_OK)
80079cc: 7bbb ldrb r3, [r7, #14]
80079ce: b2db uxtb r3, r3
80079d0: 2b00 cmp r3, #0
80079d2: f040 80f3 bne.w 8007bbc <USBH_Process+0x39c>
{
/* The function shall return USBH_OK when full enumeration is complete */
USBH_UsrLog("Enumeration done.");
phost->device.current_interface = 0U;
80079d6: 687b ldr r3, [r7, #4]
80079d8: 2200 movs r2, #0
80079da: f883 2324 strb.w r2, [r3, #804] ; 0x324
if (phost->device.DevDesc.bNumConfigurations == 1U)
80079de: 687b ldr r3, [r7, #4]
80079e0: f893 3337 ldrb.w r3, [r3, #823] ; 0x337
80079e4: 2b01 cmp r3, #1
80079e6: d103 bne.n 80079f0 <USBH_Process+0x1d0>
{
USBH_UsrLog("This device has only 1 configuration.");
phost->gState = HOST_SET_CONFIGURATION;
80079e8: 687b ldr r3, [r7, #4]
80079ea: 2208 movs r2, #8
80079ec: 701a strb r2, [r3, #0]
#else
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
#endif
#endif
}
break;
80079ee: e0e5 b.n 8007bbc <USBH_Process+0x39c>
phost->gState = HOST_INPUT;
80079f0: 687b ldr r3, [r7, #4]
80079f2: 2207 movs r2, #7
80079f4: 701a strb r2, [r3, #0]
break;
80079f6: e0e1 b.n 8007bbc <USBH_Process+0x39c>
case HOST_INPUT:
{
/* user callback for end of device basic enumeration */
if (phost->pUser != NULL)
80079f8: 687b ldr r3, [r7, #4]
80079fa: f8d3 33d4 ldr.w r3, [r3, #980] ; 0x3d4
80079fe: 2b00 cmp r3, #0
8007a00: f000 80de beq.w 8007bc0 <USBH_Process+0x3a0>
{
phost->pUser(phost, HOST_USER_SELECT_CONFIGURATION);
8007a04: 687b ldr r3, [r7, #4]
8007a06: f8d3 33d4 ldr.w r3, [r3, #980] ; 0x3d4
8007a0a: 2101 movs r1, #1
8007a0c: 6878 ldr r0, [r7, #4]
8007a0e: 4798 blx r3
phost->gState = HOST_SET_CONFIGURATION;
8007a10: 687b ldr r3, [r7, #4]
8007a12: 2208 movs r2, #8
8007a14: 701a strb r2, [r3, #0]
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
#endif
#endif
}
}
break;
8007a16: e0d3 b.n 8007bc0 <USBH_Process+0x3a0>
case HOST_SET_CONFIGURATION:
/* set configuration */
if (USBH_SetCfg(phost, (uint16_t)phost->device.CfgDesc.bConfigurationValue) == USBH_OK)
8007a18: 687b ldr r3, [r7, #4]
8007a1a: f893 333d ldrb.w r3, [r3, #829] ; 0x33d
8007a1e: b29b uxth r3, r3
8007a20: 4619 mov r1, r3
8007a22: 6878 ldr r0, [r7, #4]
8007a24: f000 fc20 bl 8008268 <USBH_SetCfg>
8007a28: 4603 mov r3, r0
8007a2a: 2b00 cmp r3, #0
8007a2c: f040 80ca bne.w 8007bc4 <USBH_Process+0x3a4>
{
phost->gState = HOST_SET_WAKEUP_FEATURE;
8007a30: 687b ldr r3, [r7, #4]
8007a32: 2209 movs r2, #9
8007a34: 701a strb r2, [r3, #0]
(void)osMessagePut(phost->os_event, phost->os_msg, 0U);
#else
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
#endif
#endif
break;
8007a36: e0c5 b.n 8007bc4 <USBH_Process+0x3a4>
case HOST_SET_WAKEUP_FEATURE:
if ((phost->device.CfgDesc.bmAttributes) & (1U << 5))
8007a38: 687b ldr r3, [r7, #4]
8007a3a: f893 333f ldrb.w r3, [r3, #831] ; 0x33f
8007a3e: f003 0320 and.w r3, r3, #32
8007a42: 2b00 cmp r3, #0
8007a44: d00b beq.n 8007a5e <USBH_Process+0x23e>
{
if (USBH_SetFeature(phost, FEATURE_SELECTOR_REMOTEWAKEUP) == USBH_OK)
8007a46: 2101 movs r1, #1
8007a48: 6878 ldr r0, [r7, #4]
8007a4a: f000 fc30 bl 80082ae <USBH_SetFeature>
8007a4e: 4603 mov r3, r0
8007a50: 2b00 cmp r3, #0
8007a52: f040 80b9 bne.w 8007bc8 <USBH_Process+0x3a8>
{
USBH_UsrLog("Device remote wakeup enabled");
phost->gState = HOST_CHECK_CLASS;
8007a56: 687b ldr r3, [r7, #4]
8007a58: 220a movs r2, #10
8007a5a: 701a strb r2, [r3, #0]
(void)osMessagePut(phost->os_event, phost->os_msg, 0U);
#else
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
#endif
#endif
break;
8007a5c: e0b4 b.n 8007bc8 <USBH_Process+0x3a8>
phost->gState = HOST_CHECK_CLASS;
8007a5e: 687b ldr r3, [r7, #4]
8007a60: 220a movs r2, #10
8007a62: 701a strb r2, [r3, #0]
break;
8007a64: e0b0 b.n 8007bc8 <USBH_Process+0x3a8>
case HOST_CHECK_CLASS:
if (phost->ClassNumber == 0U)
8007a66: 687b ldr r3, [r7, #4]
8007a68: f8d3 3380 ldr.w r3, [r3, #896] ; 0x380
8007a6c: 2b00 cmp r3, #0
8007a6e: f000 80ad beq.w 8007bcc <USBH_Process+0x3ac>
{
USBH_UsrLog("No Class has been registered.");
}
else
{
phost->pActiveClass = NULL;
8007a72: 687b ldr r3, [r7, #4]
8007a74: 2200 movs r2, #0
8007a76: f8c3 237c str.w r2, [r3, #892] ; 0x37c
for (idx = 0U; idx < USBH_MAX_NUM_SUPPORTED_CLASS; idx++)
8007a7a: 2300 movs r3, #0
8007a7c: 73fb strb r3, [r7, #15]
8007a7e: e016 b.n 8007aae <USBH_Process+0x28e>
{
if (phost->pClass[idx]->ClassCode == phost->device.CfgDesc.Itf_Desc[0].bInterfaceClass)
8007a80: 7bfa ldrb r2, [r7, #15]
8007a82: 687b ldr r3, [r7, #4]
8007a84: 32de adds r2, #222 ; 0xde
8007a86: f853 3022 ldr.w r3, [r3, r2, lsl #2]
8007a8a: 791a ldrb r2, [r3, #4]
8007a8c: 687b ldr r3, [r7, #4]
8007a8e: f893 3347 ldrb.w r3, [r3, #839] ; 0x347
8007a92: 429a cmp r2, r3
8007a94: d108 bne.n 8007aa8 <USBH_Process+0x288>
{
phost->pActiveClass = phost->pClass[idx];
8007a96: 7bfa ldrb r2, [r7, #15]
8007a98: 687b ldr r3, [r7, #4]
8007a9a: 32de adds r2, #222 ; 0xde
8007a9c: f853 2022 ldr.w r2, [r3, r2, lsl #2]
8007aa0: 687b ldr r3, [r7, #4]
8007aa2: f8c3 237c str.w r2, [r3, #892] ; 0x37c
break;
8007aa6: e005 b.n 8007ab4 <USBH_Process+0x294>
for (idx = 0U; idx < USBH_MAX_NUM_SUPPORTED_CLASS; idx++)
8007aa8: 7bfb ldrb r3, [r7, #15]
8007aaa: 3301 adds r3, #1
8007aac: 73fb strb r3, [r7, #15]
8007aae: 7bfb ldrb r3, [r7, #15]
8007ab0: 2b00 cmp r3, #0
8007ab2: d0e5 beq.n 8007a80 <USBH_Process+0x260>
}
}
if (phost->pActiveClass != NULL)
8007ab4: 687b ldr r3, [r7, #4]
8007ab6: f8d3 337c ldr.w r3, [r3, #892] ; 0x37c
8007aba: 2b00 cmp r3, #0
8007abc: d016 beq.n 8007aec <USBH_Process+0x2cc>
{
if (phost->pActiveClass->Init(phost) == USBH_OK)
8007abe: 687b ldr r3, [r7, #4]
8007ac0: f8d3 337c ldr.w r3, [r3, #892] ; 0x37c
8007ac4: 689b ldr r3, [r3, #8]
8007ac6: 6878 ldr r0, [r7, #4]
8007ac8: 4798 blx r3
8007aca: 4603 mov r3, r0
8007acc: 2b00 cmp r3, #0
8007ace: d109 bne.n 8007ae4 <USBH_Process+0x2c4>
{
phost->gState = HOST_CLASS_REQUEST;
8007ad0: 687b ldr r3, [r7, #4]
8007ad2: 2206 movs r2, #6
8007ad4: 701a strb r2, [r3, #0]
USBH_UsrLog("%s class started.", phost->pActiveClass->Name);
/* Inform user that a class has been activated */
phost->pUser(phost, HOST_USER_CLASS_SELECTED);
8007ad6: 687b ldr r3, [r7, #4]
8007ad8: f8d3 33d4 ldr.w r3, [r3, #980] ; 0x3d4
8007adc: 2103 movs r1, #3
8007ade: 6878 ldr r0, [r7, #4]
8007ae0: 4798 blx r3
(void)osMessagePut(phost->os_event, phost->os_msg, 0U);
#else
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
#endif
#endif
break;
8007ae2: e073 b.n 8007bcc <USBH_Process+0x3ac>
phost->gState = HOST_ABORT_STATE;
8007ae4: 687b ldr r3, [r7, #4]
8007ae6: 220d movs r2, #13
8007ae8: 701a strb r2, [r3, #0]
break;
8007aea: e06f b.n 8007bcc <USBH_Process+0x3ac>
phost->gState = HOST_ABORT_STATE;
8007aec: 687b ldr r3, [r7, #4]
8007aee: 220d movs r2, #13
8007af0: 701a strb r2, [r3, #0]
break;
8007af2: e06b b.n 8007bcc <USBH_Process+0x3ac>
case HOST_CLASS_REQUEST:
/* process class standard control requests state machine */
if (phost->pActiveClass != NULL)
8007af4: 687b ldr r3, [r7, #4]
8007af6: f8d3 337c ldr.w r3, [r3, #892] ; 0x37c
8007afa: 2b00 cmp r3, #0
8007afc: d017 beq.n 8007b2e <USBH_Process+0x30e>
{
status = phost->pActiveClass->Requests(phost);
8007afe: 687b ldr r3, [r7, #4]
8007b00: f8d3 337c ldr.w r3, [r3, #892] ; 0x37c
8007b04: 691b ldr r3, [r3, #16]
8007b06: 6878 ldr r0, [r7, #4]
8007b08: 4798 blx r3
8007b0a: 4603 mov r3, r0
8007b0c: 73bb strb r3, [r7, #14]
if (status == USBH_OK)
8007b0e: 7bbb ldrb r3, [r7, #14]
8007b10: b2db uxtb r3, r3
8007b12: 2b00 cmp r3, #0
8007b14: d103 bne.n 8007b1e <USBH_Process+0x2fe>
{
phost->gState = HOST_CLASS;
8007b16: 687b ldr r3, [r7, #4]
8007b18: 220b movs r2, #11
8007b1a: 701a strb r2, [r3, #0]
(void)osMessagePut(phost->os_event, phost->os_msg, 0U);
#else
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
#endif
#endif
break;
8007b1c: e058 b.n 8007bd0 <USBH_Process+0x3b0>
else if (status == USBH_FAIL)
8007b1e: 7bbb ldrb r3, [r7, #14]
8007b20: b2db uxtb r3, r3
8007b22: 2b02 cmp r3, #2
8007b24: d154 bne.n 8007bd0 <USBH_Process+0x3b0>
phost->gState = HOST_ABORT_STATE;
8007b26: 687b ldr r3, [r7, #4]
8007b28: 220d movs r2, #13
8007b2a: 701a strb r2, [r3, #0]
break;
8007b2c: e050 b.n 8007bd0 <USBH_Process+0x3b0>
phost->gState = HOST_ABORT_STATE;
8007b2e: 687b ldr r3, [r7, #4]
8007b30: 220d movs r2, #13
8007b32: 701a strb r2, [r3, #0]
break;
8007b34: e04c b.n 8007bd0 <USBH_Process+0x3b0>
case HOST_CLASS:
/* process class state machine */
if (phost->pActiveClass != NULL)
8007b36: 687b ldr r3, [r7, #4]
8007b38: f8d3 337c ldr.w r3, [r3, #892] ; 0x37c
8007b3c: 2b00 cmp r3, #0
8007b3e: d049 beq.n 8007bd4 <USBH_Process+0x3b4>
{
phost->pActiveClass->BgndProcess(phost);
8007b40: 687b ldr r3, [r7, #4]
8007b42: f8d3 337c ldr.w r3, [r3, #892] ; 0x37c
8007b46: 695b ldr r3, [r3, #20]
8007b48: 6878 ldr r0, [r7, #4]
8007b4a: 4798 blx r3
}
break;
8007b4c: e042 b.n 8007bd4 <USBH_Process+0x3b4>
case HOST_DEV_DISCONNECTED :
phost->device.is_disconnected = 0U;
8007b4e: 687b ldr r3, [r7, #4]
8007b50: 2200 movs r2, #0
8007b52: f883 2321 strb.w r2, [r3, #801] ; 0x321
DeInitStateMachine(phost);
8007b56: 6878 ldr r0, [r7, #4]
8007b58: f7ff fd72 bl 8007640 <DeInitStateMachine>
/* Re-Initilaize Host for new Enumeration */
if (phost->pActiveClass != NULL)
8007b5c: 687b ldr r3, [r7, #4]
8007b5e: f8d3 337c ldr.w r3, [r3, #892] ; 0x37c
8007b62: 2b00 cmp r3, #0
8007b64: d009 beq.n 8007b7a <USBH_Process+0x35a>
{
phost->pActiveClass->DeInit(phost);
8007b66: 687b ldr r3, [r7, #4]
8007b68: f8d3 337c ldr.w r3, [r3, #892] ; 0x37c
8007b6c: 68db ldr r3, [r3, #12]
8007b6e: 6878 ldr r0, [r7, #4]
8007b70: 4798 blx r3
phost->pActiveClass = NULL;
8007b72: 687b ldr r3, [r7, #4]
8007b74: 2200 movs r2, #0
8007b76: f8c3 237c str.w r2, [r3, #892] ; 0x37c
}
if (phost->pUser != NULL)
8007b7a: 687b ldr r3, [r7, #4]
8007b7c: f8d3 33d4 ldr.w r3, [r3, #980] ; 0x3d4
8007b80: 2b00 cmp r3, #0
8007b82: d005 beq.n 8007b90 <USBH_Process+0x370>
{
phost->pUser(phost, HOST_USER_DISCONNECTION);
8007b84: 687b ldr r3, [r7, #4]
8007b86: f8d3 33d4 ldr.w r3, [r3, #980] ; 0x3d4
8007b8a: 2105 movs r1, #5
8007b8c: 6878 ldr r0, [r7, #4]
8007b8e: 4798 blx r3
}
USBH_UsrLog("USB Device disconnected");
if (phost->device.is_ReEnumerated == 1U)
8007b90: 687b ldr r3, [r7, #4]
8007b92: f893 3322 ldrb.w r3, [r3, #802] ; 0x322
8007b96: b2db uxtb r3, r3
8007b98: 2b01 cmp r3, #1
8007b9a: d107 bne.n 8007bac <USBH_Process+0x38c>
{
phost->device.is_ReEnumerated = 0U;
8007b9c: 687b ldr r3, [r7, #4]
8007b9e: 2200 movs r2, #0
8007ba0: f883 2322 strb.w r2, [r3, #802] ; 0x322
/* Start the host and re-enable Vbus */
USBH_Start(phost);
8007ba4: 6878 ldr r0, [r7, #4]
8007ba6: f7ff fe2b bl 8007800 <USBH_Start>
(void)osMessagePut(phost->os_event, phost->os_msg, 0U);
#else
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
#endif
#endif
break;
8007baa: e014 b.n 8007bd6 <USBH_Process+0x3b6>
USBH_LL_Start(phost);
8007bac: 6878 ldr r0, [r7, #4]
8007bae: f001 f9b7 bl 8008f20 <USBH_LL_Start>
break;
8007bb2: e010 b.n 8007bd6 <USBH_Process+0x3b6>
case HOST_ABORT_STATE:
default :
break;
8007bb4: bf00 nop
8007bb6: e00e b.n 8007bd6 <USBH_Process+0x3b6>
break;
8007bb8: bf00 nop
8007bba: e00c b.n 8007bd6 <USBH_Process+0x3b6>
break;
8007bbc: bf00 nop
8007bbe: e00a b.n 8007bd6 <USBH_Process+0x3b6>
break;
8007bc0: bf00 nop
8007bc2: e008 b.n 8007bd6 <USBH_Process+0x3b6>
break;
8007bc4: bf00 nop
8007bc6: e006 b.n 8007bd6 <USBH_Process+0x3b6>
break;
8007bc8: bf00 nop
8007bca: e004 b.n 8007bd6 <USBH_Process+0x3b6>
break;
8007bcc: bf00 nop
8007bce: e002 b.n 8007bd6 <USBH_Process+0x3b6>
break;
8007bd0: bf00 nop
8007bd2: e000 b.n 8007bd6 <USBH_Process+0x3b6>
break;
8007bd4: bf00 nop
}
return USBH_OK;
8007bd6: 2300 movs r3, #0
}
8007bd8: 4618 mov r0, r3
8007bda: 3710 adds r7, #16
8007bdc: 46bd mov sp, r7
8007bde: bd80 pop {r7, pc}
08007be0 <USBH_HandleEnum>:
* This function includes the complete enumeration process
* @param phost: Host Handle
* @retval USBH_Status
*/
static USBH_StatusTypeDef USBH_HandleEnum(USBH_HandleTypeDef *phost)
{
8007be0: b580 push {r7, lr}
8007be2: b088 sub sp, #32
8007be4: af04 add r7, sp, #16
8007be6: 6078 str r0, [r7, #4]
USBH_StatusTypeDef Status = USBH_BUSY;
8007be8: 2301 movs r3, #1
8007bea: 73fb strb r3, [r7, #15]
USBH_StatusTypeDef ReqStatus = USBH_BUSY;
8007bec: 2301 movs r3, #1
8007bee: 73bb strb r3, [r7, #14]
switch (phost->EnumState)
8007bf0: 687b ldr r3, [r7, #4]
8007bf2: 785b ldrb r3, [r3, #1]
8007bf4: 2b07 cmp r3, #7
8007bf6: f200 81c1 bhi.w 8007f7c <USBH_HandleEnum+0x39c>
8007bfa: a201 add r2, pc, #4 ; (adr r2, 8007c00 <USBH_HandleEnum+0x20>)
8007bfc: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8007c00: 08007c21 .word 0x08007c21
8007c04: 08007cdf .word 0x08007cdf
8007c08: 08007d49 .word 0x08007d49
8007c0c: 08007dd7 .word 0x08007dd7
8007c10: 08007e41 .word 0x08007e41
8007c14: 08007eb1 .word 0x08007eb1
8007c18: 08007ef7 .word 0x08007ef7
8007c1c: 08007f3d .word 0x08007f3d
{
case ENUM_IDLE:
/* Get Device Desc for only 1st 8 bytes : To get EP0 MaxPacketSize */
ReqStatus = USBH_Get_DevDesc(phost, 8U);
8007c20: 2108 movs r1, #8
8007c22: 6878 ldr r0, [r7, #4]
8007c24: f000 fa50 bl 80080c8 <USBH_Get_DevDesc>
8007c28: 4603 mov r3, r0
8007c2a: 73bb strb r3, [r7, #14]
if (ReqStatus == USBH_OK)
8007c2c: 7bbb ldrb r3, [r7, #14]
8007c2e: 2b00 cmp r3, #0
8007c30: d130 bne.n 8007c94 <USBH_HandleEnum+0xb4>
{
phost->Control.pipe_size = phost->device.DevDesc.bMaxPacketSize;
8007c32: 687b ldr r3, [r7, #4]
8007c34: f893 232d ldrb.w r2, [r3, #813] ; 0x32d
8007c38: 687b ldr r3, [r7, #4]
8007c3a: 719a strb r2, [r3, #6]
phost->EnumState = ENUM_GET_FULL_DEV_DESC;
8007c3c: 687b ldr r3, [r7, #4]
8007c3e: 2201 movs r2, #1
8007c40: 705a strb r2, [r3, #1]
/* modify control channels configuration for MaxPacket size */
USBH_OpenPipe(phost, phost->Control.pipe_in, 0x80U, phost->device.address,
8007c42: 687b ldr r3, [r7, #4]
8007c44: 7919 ldrb r1, [r3, #4]
8007c46: 687b ldr r3, [r7, #4]
8007c48: f893 031c ldrb.w r0, [r3, #796] ; 0x31c
8007c4c: 687b ldr r3, [r7, #4]
8007c4e: f893 331d ldrb.w r3, [r3, #797] ; 0x31d
phost->device.speed, USBH_EP_CONTROL,
(uint16_t)phost->Control.pipe_size);
8007c52: 687a ldr r2, [r7, #4]
8007c54: 7992 ldrb r2, [r2, #6]
USBH_OpenPipe(phost, phost->Control.pipe_in, 0x80U, phost->device.address,
8007c56: b292 uxth r2, r2
8007c58: 9202 str r2, [sp, #8]
8007c5a: 2200 movs r2, #0
8007c5c: 9201 str r2, [sp, #4]
8007c5e: 9300 str r3, [sp, #0]
8007c60: 4603 mov r3, r0
8007c62: 2280 movs r2, #128 ; 0x80
8007c64: 6878 ldr r0, [r7, #4]
8007c66: f000 ff79 bl 8008b5c <USBH_OpenPipe>
/* Open Control pipes */
USBH_OpenPipe(phost, phost->Control.pipe_out, 0x00U, phost->device.address,
8007c6a: 687b ldr r3, [r7, #4]
8007c6c: 7959 ldrb r1, [r3, #5]
8007c6e: 687b ldr r3, [r7, #4]
8007c70: f893 031c ldrb.w r0, [r3, #796] ; 0x31c
8007c74: 687b ldr r3, [r7, #4]
8007c76: f893 331d ldrb.w r3, [r3, #797] ; 0x31d
phost->device.speed, USBH_EP_CONTROL,
(uint16_t)phost->Control.pipe_size);
8007c7a: 687a ldr r2, [r7, #4]
8007c7c: 7992 ldrb r2, [r2, #6]
USBH_OpenPipe(phost, phost->Control.pipe_out, 0x00U, phost->device.address,
8007c7e: b292 uxth r2, r2
8007c80: 9202 str r2, [sp, #8]
8007c82: 2200 movs r2, #0
8007c84: 9201 str r2, [sp, #4]
8007c86: 9300 str r3, [sp, #0]
8007c88: 4603 mov r3, r0
8007c8a: 2200 movs r2, #0
8007c8c: 6878 ldr r0, [r7, #4]
8007c8e: f000 ff65 bl 8008b5c <USBH_OpenPipe>
}
else
{
/* .. */
}
break;
8007c92: e175 b.n 8007f80 <USBH_HandleEnum+0x3a0>
else if (ReqStatus == USBH_NOT_SUPPORTED)
8007c94: 7bbb ldrb r3, [r7, #14]
8007c96: 2b03 cmp r3, #3
8007c98: f040 8172 bne.w 8007f80 <USBH_HandleEnum+0x3a0>
phost->device.EnumCnt++;
8007c9c: 687b ldr r3, [r7, #4]
8007c9e: f893 331e ldrb.w r3, [r3, #798] ; 0x31e
8007ca2: 3301 adds r3, #1
8007ca4: b2da uxtb r2, r3
8007ca6: 687b ldr r3, [r7, #4]
8007ca8: f883 231e strb.w r2, [r3, #798] ; 0x31e
if (phost->device.EnumCnt > 3U)
8007cac: 687b ldr r3, [r7, #4]
8007cae: f893 331e ldrb.w r3, [r3, #798] ; 0x31e
8007cb2: 2b03 cmp r3, #3
8007cb4: d903 bls.n 8007cbe <USBH_HandleEnum+0xde>
phost->gState = HOST_ABORT_STATE;
8007cb6: 687b ldr r3, [r7, #4]
8007cb8: 220d movs r2, #13
8007cba: 701a strb r2, [r3, #0]
break;
8007cbc: e160 b.n 8007f80 <USBH_HandleEnum+0x3a0>
USBH_FreePipe(phost, phost->Control.pipe_out);
8007cbe: 687b ldr r3, [r7, #4]
8007cc0: 795b ldrb r3, [r3, #5]
8007cc2: 4619 mov r1, r3
8007cc4: 6878 ldr r0, [r7, #4]
8007cc6: f000 ff99 bl 8008bfc <USBH_FreePipe>
USBH_FreePipe(phost, phost->Control.pipe_in);
8007cca: 687b ldr r3, [r7, #4]
8007ccc: 791b ldrb r3, [r3, #4]
8007cce: 4619 mov r1, r3
8007cd0: 6878 ldr r0, [r7, #4]
8007cd2: f000 ff93 bl 8008bfc <USBH_FreePipe>
phost->gState = HOST_IDLE;
8007cd6: 687b ldr r3, [r7, #4]
8007cd8: 2200 movs r2, #0
8007cda: 701a strb r2, [r3, #0]
break;
8007cdc: e150 b.n 8007f80 <USBH_HandleEnum+0x3a0>
case ENUM_GET_FULL_DEV_DESC:
/* Get FULL Device Desc */
ReqStatus = USBH_Get_DevDesc(phost, USB_DEVICE_DESC_SIZE);
8007cde: 2112 movs r1, #18
8007ce0: 6878 ldr r0, [r7, #4]
8007ce2: f000 f9f1 bl 80080c8 <USBH_Get_DevDesc>
8007ce6: 4603 mov r3, r0
8007ce8: 73bb strb r3, [r7, #14]
if (ReqStatus == USBH_OK)
8007cea: 7bbb ldrb r3, [r7, #14]
8007cec: 2b00 cmp r3, #0
8007cee: d103 bne.n 8007cf8 <USBH_HandleEnum+0x118>
{
USBH_UsrLog("PID: %xh", phost->device.DevDesc.idProduct);
USBH_UsrLog("VID: %xh", phost->device.DevDesc.idVendor);
phost->EnumState = ENUM_SET_ADDR;
8007cf0: 687b ldr r3, [r7, #4]
8007cf2: 2202 movs r2, #2
8007cf4: 705a strb r2, [r3, #1]
}
else
{
/* .. */
}
break;
8007cf6: e145 b.n 8007f84 <USBH_HandleEnum+0x3a4>
else if (ReqStatus == USBH_NOT_SUPPORTED)
8007cf8: 7bbb ldrb r3, [r7, #14]
8007cfa: 2b03 cmp r3, #3
8007cfc: f040 8142 bne.w 8007f84 <USBH_HandleEnum+0x3a4>
phost->device.EnumCnt++;
8007d00: 687b ldr r3, [r7, #4]
8007d02: f893 331e ldrb.w r3, [r3, #798] ; 0x31e
8007d06: 3301 adds r3, #1
8007d08: b2da uxtb r2, r3
8007d0a: 687b ldr r3, [r7, #4]
8007d0c: f883 231e strb.w r2, [r3, #798] ; 0x31e
if (phost->device.EnumCnt > 3U)
8007d10: 687b ldr r3, [r7, #4]
8007d12: f893 331e ldrb.w r3, [r3, #798] ; 0x31e
8007d16: 2b03 cmp r3, #3
8007d18: d903 bls.n 8007d22 <USBH_HandleEnum+0x142>
phost->gState = HOST_ABORT_STATE;
8007d1a: 687b ldr r3, [r7, #4]
8007d1c: 220d movs r2, #13
8007d1e: 701a strb r2, [r3, #0]
break;
8007d20: e130 b.n 8007f84 <USBH_HandleEnum+0x3a4>
USBH_FreePipe(phost, phost->Control.pipe_out);
8007d22: 687b ldr r3, [r7, #4]
8007d24: 795b ldrb r3, [r3, #5]
8007d26: 4619 mov r1, r3
8007d28: 6878 ldr r0, [r7, #4]
8007d2a: f000 ff67 bl 8008bfc <USBH_FreePipe>
USBH_FreePipe(phost, phost->Control.pipe_in);
8007d2e: 687b ldr r3, [r7, #4]
8007d30: 791b ldrb r3, [r3, #4]
8007d32: 4619 mov r1, r3
8007d34: 6878 ldr r0, [r7, #4]
8007d36: f000 ff61 bl 8008bfc <USBH_FreePipe>
phost->EnumState = ENUM_IDLE;
8007d3a: 687b ldr r3, [r7, #4]
8007d3c: 2200 movs r2, #0
8007d3e: 705a strb r2, [r3, #1]
phost->gState = HOST_IDLE;
8007d40: 687b ldr r3, [r7, #4]
8007d42: 2200 movs r2, #0
8007d44: 701a strb r2, [r3, #0]
break;
8007d46: e11d b.n 8007f84 <USBH_HandleEnum+0x3a4>
case ENUM_SET_ADDR:
/* set address */
ReqStatus = USBH_SetAddress(phost, USBH_DEVICE_ADDRESS);
8007d48: 2101 movs r1, #1
8007d4a: 6878 ldr r0, [r7, #4]
8007d4c: f000 fa68 bl 8008220 <USBH_SetAddress>
8007d50: 4603 mov r3, r0
8007d52: 73bb strb r3, [r7, #14]
if (ReqStatus == USBH_OK)
8007d54: 7bbb ldrb r3, [r7, #14]
8007d56: 2b00 cmp r3, #0
8007d58: d132 bne.n 8007dc0 <USBH_HandleEnum+0x1e0>
{
USBH_Delay(2U);
8007d5a: 2002 movs r0, #2
8007d5c: f001 fa45 bl 80091ea <USBH_Delay>
phost->device.address = USBH_DEVICE_ADDRESS;
8007d60: 687b ldr r3, [r7, #4]
8007d62: 2201 movs r2, #1
8007d64: f883 231c strb.w r2, [r3, #796] ; 0x31c
/* user callback for device address assigned */
USBH_UsrLog("Address (#%d) assigned.", phost->device.address);
phost->EnumState = ENUM_GET_CFG_DESC;
8007d68: 687b ldr r3, [r7, #4]
8007d6a: 2203 movs r2, #3
8007d6c: 705a strb r2, [r3, #1]
/* modify control channels to update device address */
USBH_OpenPipe(phost, phost->Control.pipe_in, 0x80U, phost->device.address,
8007d6e: 687b ldr r3, [r7, #4]
8007d70: 7919 ldrb r1, [r3, #4]
8007d72: 687b ldr r3, [r7, #4]
8007d74: f893 031c ldrb.w r0, [r3, #796] ; 0x31c
8007d78: 687b ldr r3, [r7, #4]
8007d7a: f893 331d ldrb.w r3, [r3, #797] ; 0x31d
phost->device.speed, USBH_EP_CONTROL,
(uint16_t)phost->Control.pipe_size);
8007d7e: 687a ldr r2, [r7, #4]
8007d80: 7992 ldrb r2, [r2, #6]
USBH_OpenPipe(phost, phost->Control.pipe_in, 0x80U, phost->device.address,
8007d82: b292 uxth r2, r2
8007d84: 9202 str r2, [sp, #8]
8007d86: 2200 movs r2, #0
8007d88: 9201 str r2, [sp, #4]
8007d8a: 9300 str r3, [sp, #0]
8007d8c: 4603 mov r3, r0
8007d8e: 2280 movs r2, #128 ; 0x80
8007d90: 6878 ldr r0, [r7, #4]
8007d92: f000 fee3 bl 8008b5c <USBH_OpenPipe>
/* Open Control pipes */
USBH_OpenPipe(phost, phost->Control.pipe_out, 0x00U, phost->device.address,
8007d96: 687b ldr r3, [r7, #4]
8007d98: 7959 ldrb r1, [r3, #5]
8007d9a: 687b ldr r3, [r7, #4]
8007d9c: f893 031c ldrb.w r0, [r3, #796] ; 0x31c
8007da0: 687b ldr r3, [r7, #4]
8007da2: f893 331d ldrb.w r3, [r3, #797] ; 0x31d
phost->device.speed, USBH_EP_CONTROL,
(uint16_t)phost->Control.pipe_size);
8007da6: 687a ldr r2, [r7, #4]
8007da8: 7992 ldrb r2, [r2, #6]
USBH_OpenPipe(phost, phost->Control.pipe_out, 0x00U, phost->device.address,
8007daa: b292 uxth r2, r2
8007dac: 9202 str r2, [sp, #8]
8007dae: 2200 movs r2, #0
8007db0: 9201 str r2, [sp, #4]
8007db2: 9300 str r3, [sp, #0]
8007db4: 4603 mov r3, r0
8007db6: 2200 movs r2, #0
8007db8: 6878 ldr r0, [r7, #4]
8007dba: f000 fecf bl 8008b5c <USBH_OpenPipe>
}
else
{
/* .. */
}
break;
8007dbe: e0e3 b.n 8007f88 <USBH_HandleEnum+0x3a8>
else if (ReqStatus == USBH_NOT_SUPPORTED)
8007dc0: 7bbb ldrb r3, [r7, #14]
8007dc2: 2b03 cmp r3, #3
8007dc4: f040 80e0 bne.w 8007f88 <USBH_HandleEnum+0x3a8>
phost->gState = HOST_ABORT_STATE;
8007dc8: 687b ldr r3, [r7, #4]
8007dca: 220d movs r2, #13
8007dcc: 701a strb r2, [r3, #0]
phost->EnumState = ENUM_IDLE;
8007dce: 687b ldr r3, [r7, #4]
8007dd0: 2200 movs r2, #0
8007dd2: 705a strb r2, [r3, #1]
break;
8007dd4: e0d8 b.n 8007f88 <USBH_HandleEnum+0x3a8>
case ENUM_GET_CFG_DESC:
/* get standard configuration descriptor */
ReqStatus = USBH_Get_CfgDesc(phost, USB_CONFIGURATION_DESC_SIZE);
8007dd6: 2109 movs r1, #9
8007dd8: 6878 ldr r0, [r7, #4]
8007dda: f000 f99d bl 8008118 <USBH_Get_CfgDesc>
8007dde: 4603 mov r3, r0
8007de0: 73bb strb r3, [r7, #14]
if (ReqStatus == USBH_OK)
8007de2: 7bbb ldrb r3, [r7, #14]
8007de4: 2b00 cmp r3, #0
8007de6: d103 bne.n 8007df0 <USBH_HandleEnum+0x210>
{
phost->EnumState = ENUM_GET_FULL_CFG_DESC;
8007de8: 687b ldr r3, [r7, #4]
8007dea: 2204 movs r2, #4
8007dec: 705a strb r2, [r3, #1]
}
else
{
/* .. */
}
break;
8007dee: e0cd b.n 8007f8c <USBH_HandleEnum+0x3ac>
else if (ReqStatus == USBH_NOT_SUPPORTED)
8007df0: 7bbb ldrb r3, [r7, #14]
8007df2: 2b03 cmp r3, #3
8007df4: f040 80ca bne.w 8007f8c <USBH_HandleEnum+0x3ac>
phost->device.EnumCnt++;
8007df8: 687b ldr r3, [r7, #4]
8007dfa: f893 331e ldrb.w r3, [r3, #798] ; 0x31e
8007dfe: 3301 adds r3, #1
8007e00: b2da uxtb r2, r3
8007e02: 687b ldr r3, [r7, #4]
8007e04: f883 231e strb.w r2, [r3, #798] ; 0x31e
if (phost->device.EnumCnt > 3U)
8007e08: 687b ldr r3, [r7, #4]
8007e0a: f893 331e ldrb.w r3, [r3, #798] ; 0x31e
8007e0e: 2b03 cmp r3, #3
8007e10: d903 bls.n 8007e1a <USBH_HandleEnum+0x23a>
phost->gState = HOST_ABORT_STATE;
8007e12: 687b ldr r3, [r7, #4]
8007e14: 220d movs r2, #13
8007e16: 701a strb r2, [r3, #0]
break;
8007e18: e0b8 b.n 8007f8c <USBH_HandleEnum+0x3ac>
USBH_FreePipe(phost, phost->Control.pipe_out);
8007e1a: 687b ldr r3, [r7, #4]
8007e1c: 795b ldrb r3, [r3, #5]
8007e1e: 4619 mov r1, r3
8007e20: 6878 ldr r0, [r7, #4]
8007e22: f000 feeb bl 8008bfc <USBH_FreePipe>
USBH_FreePipe(phost, phost->Control.pipe_in);
8007e26: 687b ldr r3, [r7, #4]
8007e28: 791b ldrb r3, [r3, #4]
8007e2a: 4619 mov r1, r3
8007e2c: 6878 ldr r0, [r7, #4]
8007e2e: f000 fee5 bl 8008bfc <USBH_FreePipe>
phost->EnumState = ENUM_IDLE;
8007e32: 687b ldr r3, [r7, #4]
8007e34: 2200 movs r2, #0
8007e36: 705a strb r2, [r3, #1]
phost->gState = HOST_IDLE;
8007e38: 687b ldr r3, [r7, #4]
8007e3a: 2200 movs r2, #0
8007e3c: 701a strb r2, [r3, #0]
break;
8007e3e: e0a5 b.n 8007f8c <USBH_HandleEnum+0x3ac>
case ENUM_GET_FULL_CFG_DESC:
/* get FULL config descriptor (config, interface, endpoints) */
ReqStatus = USBH_Get_CfgDesc(phost, phost->device.CfgDesc.wTotalLength);
8007e40: 687b ldr r3, [r7, #4]
8007e42: f8b3 333a ldrh.w r3, [r3, #826] ; 0x33a
8007e46: 4619 mov r1, r3
8007e48: 6878 ldr r0, [r7, #4]
8007e4a: f000 f965 bl 8008118 <USBH_Get_CfgDesc>
8007e4e: 4603 mov r3, r0
8007e50: 73bb strb r3, [r7, #14]
if (ReqStatus == USBH_OK)
8007e52: 7bbb ldrb r3, [r7, #14]
8007e54: 2b00 cmp r3, #0
8007e56: d103 bne.n 8007e60 <USBH_HandleEnum+0x280>
{
phost->EnumState = ENUM_GET_MFC_STRING_DESC;
8007e58: 687b ldr r3, [r7, #4]
8007e5a: 2205 movs r2, #5
8007e5c: 705a strb r2, [r3, #1]
}
else
{
/* .. */
}
break;
8007e5e: e097 b.n 8007f90 <USBH_HandleEnum+0x3b0>
else if (ReqStatus == USBH_NOT_SUPPORTED)
8007e60: 7bbb ldrb r3, [r7, #14]
8007e62: 2b03 cmp r3, #3
8007e64: f040 8094 bne.w 8007f90 <USBH_HandleEnum+0x3b0>
phost->device.EnumCnt++;
8007e68: 687b ldr r3, [r7, #4]
8007e6a: f893 331e ldrb.w r3, [r3, #798] ; 0x31e
8007e6e: 3301 adds r3, #1
8007e70: b2da uxtb r2, r3
8007e72: 687b ldr r3, [r7, #4]
8007e74: f883 231e strb.w r2, [r3, #798] ; 0x31e
if (phost->device.EnumCnt > 3U)
8007e78: 687b ldr r3, [r7, #4]
8007e7a: f893 331e ldrb.w r3, [r3, #798] ; 0x31e
8007e7e: 2b03 cmp r3, #3
8007e80: d903 bls.n 8007e8a <USBH_HandleEnum+0x2aa>
phost->gState = HOST_ABORT_STATE;
8007e82: 687b ldr r3, [r7, #4]
8007e84: 220d movs r2, #13
8007e86: 701a strb r2, [r3, #0]
break;
8007e88: e082 b.n 8007f90 <USBH_HandleEnum+0x3b0>
USBH_FreePipe(phost, phost->Control.pipe_out);
8007e8a: 687b ldr r3, [r7, #4]
8007e8c: 795b ldrb r3, [r3, #5]
8007e8e: 4619 mov r1, r3
8007e90: 6878 ldr r0, [r7, #4]
8007e92: f000 feb3 bl 8008bfc <USBH_FreePipe>
USBH_FreePipe(phost, phost->Control.pipe_in);
8007e96: 687b ldr r3, [r7, #4]
8007e98: 791b ldrb r3, [r3, #4]
8007e9a: 4619 mov r1, r3
8007e9c: 6878 ldr r0, [r7, #4]
8007e9e: f000 fead bl 8008bfc <USBH_FreePipe>
phost->EnumState = ENUM_IDLE;
8007ea2: 687b ldr r3, [r7, #4]
8007ea4: 2200 movs r2, #0
8007ea6: 705a strb r2, [r3, #1]
phost->gState = HOST_IDLE;
8007ea8: 687b ldr r3, [r7, #4]
8007eaa: 2200 movs r2, #0
8007eac: 701a strb r2, [r3, #0]
break;
8007eae: e06f b.n 8007f90 <USBH_HandleEnum+0x3b0>
case ENUM_GET_MFC_STRING_DESC:
if (phost->device.DevDesc.iManufacturer != 0U)
8007eb0: 687b ldr r3, [r7, #4]
8007eb2: f893 3334 ldrb.w r3, [r3, #820] ; 0x334
8007eb6: 2b00 cmp r3, #0
8007eb8: d019 beq.n 8007eee <USBH_HandleEnum+0x30e>
{
/* Check that Manufacturer String is available */
ReqStatus = USBH_Get_StringDesc(phost, phost->device.DevDesc.iManufacturer,
8007eba: 687b ldr r3, [r7, #4]
8007ebc: f893 1334 ldrb.w r1, [r3, #820] ; 0x334
phost->device.Data, 0xFFU);
8007ec0: 687b ldr r3, [r7, #4]
8007ec2: f503 728e add.w r2, r3, #284 ; 0x11c
ReqStatus = USBH_Get_StringDesc(phost, phost->device.DevDesc.iManufacturer,
8007ec6: 23ff movs r3, #255 ; 0xff
8007ec8: 6878 ldr r0, [r7, #4]
8007eca: f000 f949 bl 8008160 <USBH_Get_StringDesc>
8007ece: 4603 mov r3, r0
8007ed0: 73bb strb r3, [r7, #14]
if (ReqStatus == USBH_OK)
8007ed2: 7bbb ldrb r3, [r7, #14]
8007ed4: 2b00 cmp r3, #0
8007ed6: d103 bne.n 8007ee0 <USBH_HandleEnum+0x300>
{
/* User callback for Manufacturing string */
USBH_UsrLog("Manufacturer : %s", (char *)(void *)phost->device.Data);
phost->EnumState = ENUM_GET_PRODUCT_STRING_DESC;
8007ed8: 687b ldr r3, [r7, #4]
8007eda: 2206 movs r2, #6
8007edc: 705a strb r2, [r3, #1]
#else
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
#endif
#endif
}
break;
8007ede: e059 b.n 8007f94 <USBH_HandleEnum+0x3b4>
else if (ReqStatus == USBH_NOT_SUPPORTED)
8007ee0: 7bbb ldrb r3, [r7, #14]
8007ee2: 2b03 cmp r3, #3
8007ee4: d156 bne.n 8007f94 <USBH_HandleEnum+0x3b4>
phost->EnumState = ENUM_GET_PRODUCT_STRING_DESC;
8007ee6: 687b ldr r3, [r7, #4]
8007ee8: 2206 movs r2, #6
8007eea: 705a strb r2, [r3, #1]
break;
8007eec: e052 b.n 8007f94 <USBH_HandleEnum+0x3b4>
phost->EnumState = ENUM_GET_PRODUCT_STRING_DESC;
8007eee: 687b ldr r3, [r7, #4]
8007ef0: 2206 movs r2, #6
8007ef2: 705a strb r2, [r3, #1]
break;
8007ef4: e04e b.n 8007f94 <USBH_HandleEnum+0x3b4>
case ENUM_GET_PRODUCT_STRING_DESC:
if (phost->device.DevDesc.iProduct != 0U)
8007ef6: 687b ldr r3, [r7, #4]
8007ef8: f893 3335 ldrb.w r3, [r3, #821] ; 0x335
8007efc: 2b00 cmp r3, #0
8007efe: d019 beq.n 8007f34 <USBH_HandleEnum+0x354>
{
/* Check that Product string is available */
ReqStatus = USBH_Get_StringDesc(phost, phost->device.DevDesc.iProduct,
8007f00: 687b ldr r3, [r7, #4]
8007f02: f893 1335 ldrb.w r1, [r3, #821] ; 0x335
phost->device.Data, 0xFFU);
8007f06: 687b ldr r3, [r7, #4]
8007f08: f503 728e add.w r2, r3, #284 ; 0x11c
ReqStatus = USBH_Get_StringDesc(phost, phost->device.DevDesc.iProduct,
8007f0c: 23ff movs r3, #255 ; 0xff
8007f0e: 6878 ldr r0, [r7, #4]
8007f10: f000 f926 bl 8008160 <USBH_Get_StringDesc>
8007f14: 4603 mov r3, r0
8007f16: 73bb strb r3, [r7, #14]
if (ReqStatus == USBH_OK)
8007f18: 7bbb ldrb r3, [r7, #14]
8007f1a: 2b00 cmp r3, #0
8007f1c: d103 bne.n 8007f26 <USBH_HandleEnum+0x346>
{
/* User callback for Product string */
USBH_UsrLog("Product : %s", (char *)(void *)phost->device.Data);
phost->EnumState = ENUM_GET_SERIALNUM_STRING_DESC;
8007f1e: 687b ldr r3, [r7, #4]
8007f20: 2207 movs r2, #7
8007f22: 705a strb r2, [r3, #1]
#else
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
#endif
#endif
}
break;
8007f24: e038 b.n 8007f98 <USBH_HandleEnum+0x3b8>
else if (ReqStatus == USBH_NOT_SUPPORTED)
8007f26: 7bbb ldrb r3, [r7, #14]
8007f28: 2b03 cmp r3, #3
8007f2a: d135 bne.n 8007f98 <USBH_HandleEnum+0x3b8>
phost->EnumState = ENUM_GET_SERIALNUM_STRING_DESC;
8007f2c: 687b ldr r3, [r7, #4]
8007f2e: 2207 movs r2, #7
8007f30: 705a strb r2, [r3, #1]
break;
8007f32: e031 b.n 8007f98 <USBH_HandleEnum+0x3b8>
phost->EnumState = ENUM_GET_SERIALNUM_STRING_DESC;
8007f34: 687b ldr r3, [r7, #4]
8007f36: 2207 movs r2, #7
8007f38: 705a strb r2, [r3, #1]
break;
8007f3a: e02d b.n 8007f98 <USBH_HandleEnum+0x3b8>
case ENUM_GET_SERIALNUM_STRING_DESC:
if (phost->device.DevDesc.iSerialNumber != 0U)
8007f3c: 687b ldr r3, [r7, #4]
8007f3e: f893 3336 ldrb.w r3, [r3, #822] ; 0x336
8007f42: 2b00 cmp r3, #0
8007f44: d017 beq.n 8007f76 <USBH_HandleEnum+0x396>
{
/* Check that Serial number string is available */
ReqStatus = USBH_Get_StringDesc(phost, phost->device.DevDesc.iSerialNumber,
8007f46: 687b ldr r3, [r7, #4]
8007f48: f893 1336 ldrb.w r1, [r3, #822] ; 0x336
phost->device.Data, 0xFFU);
8007f4c: 687b ldr r3, [r7, #4]
8007f4e: f503 728e add.w r2, r3, #284 ; 0x11c
ReqStatus = USBH_Get_StringDesc(phost, phost->device.DevDesc.iSerialNumber,
8007f52: 23ff movs r3, #255 ; 0xff
8007f54: 6878 ldr r0, [r7, #4]
8007f56: f000 f903 bl 8008160 <USBH_Get_StringDesc>
8007f5a: 4603 mov r3, r0
8007f5c: 73bb strb r3, [r7, #14]
if (ReqStatus == USBH_OK)
8007f5e: 7bbb ldrb r3, [r7, #14]
8007f60: 2b00 cmp r3, #0
8007f62: d102 bne.n 8007f6a <USBH_HandleEnum+0x38a>
{
/* User callback for Serial number string */
USBH_UsrLog("Serial Number : %s", (char *)(void *)phost->device.Data);
Status = USBH_OK;
8007f64: 2300 movs r3, #0
8007f66: 73fb strb r3, [r7, #15]
else
{
USBH_UsrLog("Serial Number : N/A");
Status = USBH_OK;
}
break;
8007f68: e018 b.n 8007f9c <USBH_HandleEnum+0x3bc>
else if (ReqStatus == USBH_NOT_SUPPORTED)
8007f6a: 7bbb ldrb r3, [r7, #14]
8007f6c: 2b03 cmp r3, #3
8007f6e: d115 bne.n 8007f9c <USBH_HandleEnum+0x3bc>
Status = USBH_OK;
8007f70: 2300 movs r3, #0
8007f72: 73fb strb r3, [r7, #15]
break;
8007f74: e012 b.n 8007f9c <USBH_HandleEnum+0x3bc>
Status = USBH_OK;
8007f76: 2300 movs r3, #0
8007f78: 73fb strb r3, [r7, #15]
break;
8007f7a: e00f b.n 8007f9c <USBH_HandleEnum+0x3bc>
default:
break;
8007f7c: bf00 nop
8007f7e: e00e b.n 8007f9e <USBH_HandleEnum+0x3be>
break;
8007f80: bf00 nop
8007f82: e00c b.n 8007f9e <USBH_HandleEnum+0x3be>
break;
8007f84: bf00 nop
8007f86: e00a b.n 8007f9e <USBH_HandleEnum+0x3be>
break;
8007f88: bf00 nop
8007f8a: e008 b.n 8007f9e <USBH_HandleEnum+0x3be>
break;
8007f8c: bf00 nop
8007f8e: e006 b.n 8007f9e <USBH_HandleEnum+0x3be>
break;
8007f90: bf00 nop
8007f92: e004 b.n 8007f9e <USBH_HandleEnum+0x3be>
break;
8007f94: bf00 nop
8007f96: e002 b.n 8007f9e <USBH_HandleEnum+0x3be>
break;
8007f98: bf00 nop
8007f9a: e000 b.n 8007f9e <USBH_HandleEnum+0x3be>
break;
8007f9c: bf00 nop
}
return Status;
8007f9e: 7bfb ldrb r3, [r7, #15]
}
8007fa0: 4618 mov r0, r3
8007fa2: 3710 adds r7, #16
8007fa4: 46bd mov sp, r7
8007fa6: bd80 pop {r7, pc}
08007fa8 <USBH_LL_SetTimer>:
* Set the initial Host Timer tick
* @param phost: Host Handle
* @retval None
*/
void USBH_LL_SetTimer(USBH_HandleTypeDef *phost, uint32_t time)
{
8007fa8: b480 push {r7}
8007faa: b083 sub sp, #12
8007fac: af00 add r7, sp, #0
8007fae: 6078 str r0, [r7, #4]
8007fb0: 6039 str r1, [r7, #0]
phost->Timer = time;
8007fb2: 687b ldr r3, [r7, #4]
8007fb4: 683a ldr r2, [r7, #0]
8007fb6: f8c3 23c4 str.w r2, [r3, #964] ; 0x3c4
}
8007fba: bf00 nop
8007fbc: 370c adds r7, #12
8007fbe: 46bd mov sp, r7
8007fc0: f85d 7b04 ldr.w r7, [sp], #4
8007fc4: 4770 bx lr
08007fc6 <USBH_LL_IncTimer>:
* Increment Host Timer tick
* @param phost: Host Handle
* @retval None
*/
void USBH_LL_IncTimer(USBH_HandleTypeDef *phost)
{
8007fc6: b580 push {r7, lr}
8007fc8: b082 sub sp, #8
8007fca: af00 add r7, sp, #0
8007fcc: 6078 str r0, [r7, #4]
phost->Timer++;
8007fce: 687b ldr r3, [r7, #4]
8007fd0: f8d3 33c4 ldr.w r3, [r3, #964] ; 0x3c4
8007fd4: 1c5a adds r2, r3, #1
8007fd6: 687b ldr r3, [r7, #4]
8007fd8: f8c3 23c4 str.w r2, [r3, #964] ; 0x3c4
USBH_HandleSof(phost);
8007fdc: 6878 ldr r0, [r7, #4]
8007fde: f000 f804 bl 8007fea <USBH_HandleSof>
}
8007fe2: bf00 nop
8007fe4: 3708 adds r7, #8
8007fe6: 46bd mov sp, r7
8007fe8: bd80 pop {r7, pc}
08007fea <USBH_HandleSof>:
* Call SOF process
* @param phost: Host Handle
* @retval None
*/
static void USBH_HandleSof(USBH_HandleTypeDef *phost)
{
8007fea: b580 push {r7, lr}
8007fec: b082 sub sp, #8
8007fee: af00 add r7, sp, #0
8007ff0: 6078 str r0, [r7, #4]
if ((phost->gState == HOST_CLASS) && (phost->pActiveClass != NULL))
8007ff2: 687b ldr r3, [r7, #4]
8007ff4: 781b ldrb r3, [r3, #0]
8007ff6: b2db uxtb r3, r3
8007ff8: 2b0b cmp r3, #11
8007ffa: d10a bne.n 8008012 <USBH_HandleSof+0x28>
8007ffc: 687b ldr r3, [r7, #4]
8007ffe: f8d3 337c ldr.w r3, [r3, #892] ; 0x37c
8008002: 2b00 cmp r3, #0
8008004: d005 beq.n 8008012 <USBH_HandleSof+0x28>
{
phost->pActiveClass->SOFProcess(phost);
8008006: 687b ldr r3, [r7, #4]
8008008: f8d3 337c ldr.w r3, [r3, #892] ; 0x37c
800800c: 699b ldr r3, [r3, #24]
800800e: 6878 ldr r0, [r7, #4]
8008010: 4798 blx r3
}
}
8008012: bf00 nop
8008014: 3708 adds r7, #8
8008016: 46bd mov sp, r7
8008018: bd80 pop {r7, pc}
0800801a <USBH_LL_PortEnabled>:
* Port Enabled
* @param phost: Host Handle
* @retval None
*/
void USBH_LL_PortEnabled(USBH_HandleTypeDef *phost)
{
800801a: b480 push {r7}
800801c: b083 sub sp, #12
800801e: af00 add r7, sp, #0
8008020: 6078 str r0, [r7, #4]
phost->device.PortEnabled = 1U;
8008022: 687b ldr r3, [r7, #4]
8008024: 2201 movs r2, #1
8008026: f883 2323 strb.w r2, [r3, #803] ; 0x323
#else
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
#endif
#endif
return;
800802a: bf00 nop
}
800802c: 370c adds r7, #12
800802e: 46bd mov sp, r7
8008030: f85d 7b04 ldr.w r7, [sp], #4
8008034: 4770 bx lr
08008036 <USBH_LL_PortDisabled>:
* Port Disabled
* @param phost: Host Handle
* @retval None
*/
void USBH_LL_PortDisabled(USBH_HandleTypeDef *phost)
{
8008036: b480 push {r7}
8008038: b083 sub sp, #12
800803a: af00 add r7, sp, #0
800803c: 6078 str r0, [r7, #4]
phost->device.PortEnabled = 0U;
800803e: 687b ldr r3, [r7, #4]
8008040: 2200 movs r2, #0
8008042: f883 2323 strb.w r2, [r3, #803] ; 0x323
return;
8008046: bf00 nop
}
8008048: 370c adds r7, #12
800804a: 46bd mov sp, r7
800804c: f85d 7b04 ldr.w r7, [sp], #4
8008050: 4770 bx lr
08008052 <USBH_LL_Connect>:
* Handle USB Host connexion event
* @param phost: Host Handle
* @retval USBH_Status
*/
USBH_StatusTypeDef USBH_LL_Connect(USBH_HandleTypeDef *phost)
{
8008052: b480 push {r7}
8008054: b083 sub sp, #12
8008056: af00 add r7, sp, #0
8008058: 6078 str r0, [r7, #4]
phost->device.is_connected = 1U;
800805a: 687b ldr r3, [r7, #4]
800805c: 2201 movs r2, #1
800805e: f883 2320 strb.w r2, [r3, #800] ; 0x320
phost->device.is_disconnected = 0U;
8008062: 687b ldr r3, [r7, #4]
8008064: 2200 movs r2, #0
8008066: f883 2321 strb.w r2, [r3, #801] ; 0x321
phost->device.is_ReEnumerated = 0U;
800806a: 687b ldr r3, [r7, #4]
800806c: 2200 movs r2, #0
800806e: f883 2322 strb.w r2, [r3, #802] ; 0x322
#else
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
#endif
#endif
return USBH_OK;
8008072: 2300 movs r3, #0
}
8008074: 4618 mov r0, r3
8008076: 370c adds r7, #12
8008078: 46bd mov sp, r7
800807a: f85d 7b04 ldr.w r7, [sp], #4
800807e: 4770 bx lr
08008080 <USBH_LL_Disconnect>:
* Handle USB Host disconnection event
* @param phost: Host Handle
* @retval USBH_Status
*/
USBH_StatusTypeDef USBH_LL_Disconnect(USBH_HandleTypeDef *phost)
{
8008080: b580 push {r7, lr}
8008082: b082 sub sp, #8
8008084: af00 add r7, sp, #0
8008086: 6078 str r0, [r7, #4]
/* update device connection states */
phost->device.is_disconnected = 1U;
8008088: 687b ldr r3, [r7, #4]
800808a: 2201 movs r2, #1
800808c: f883 2321 strb.w r2, [r3, #801] ; 0x321
phost->device.is_connected = 0U;
8008090: 687b ldr r3, [r7, #4]
8008092: 2200 movs r2, #0
8008094: f883 2320 strb.w r2, [r3, #800] ; 0x320
phost->device.PortEnabled = 0U;
8008098: 687b ldr r3, [r7, #4]
800809a: 2200 movs r2, #0
800809c: f883 2323 strb.w r2, [r3, #803] ; 0x323
/* Stop Host */
USBH_LL_Stop(phost);
80080a0: 6878 ldr r0, [r7, #4]
80080a2: f000 ff58 bl 8008f56 <USBH_LL_Stop>
/* FRee Control Pipes */
USBH_FreePipe(phost, phost->Control.pipe_in);
80080a6: 687b ldr r3, [r7, #4]
80080a8: 791b ldrb r3, [r3, #4]
80080aa: 4619 mov r1, r3
80080ac: 6878 ldr r0, [r7, #4]
80080ae: f000 fda5 bl 8008bfc <USBH_FreePipe>
USBH_FreePipe(phost, phost->Control.pipe_out);
80080b2: 687b ldr r3, [r7, #4]
80080b4: 795b ldrb r3, [r3, #5]
80080b6: 4619 mov r1, r3
80080b8: 6878 ldr r0, [r7, #4]
80080ba: f000 fd9f bl 8008bfc <USBH_FreePipe>
#else
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
#endif
#endif
return USBH_OK;
80080be: 2300 movs r3, #0
}
80080c0: 4618 mov r0, r3
80080c2: 3708 adds r7, #8
80080c4: 46bd mov sp, r7
80080c6: bd80 pop {r7, pc}
080080c8 <USBH_Get_DevDesc>:
* @param phost: Host Handle
* @param length: Length of the descriptor
* @retval USBH Status
*/
USBH_StatusTypeDef USBH_Get_DevDesc(USBH_HandleTypeDef *phost, uint8_t length)
{
80080c8: b580 push {r7, lr}
80080ca: b086 sub sp, #24
80080cc: af02 add r7, sp, #8
80080ce: 6078 str r0, [r7, #4]
80080d0: 460b mov r3, r1
80080d2: 70fb strb r3, [r7, #3]
USBH_StatusTypeDef status;
if ((status = USBH_GetDescriptor(phost,
USB_REQ_RECIPIENT_DEVICE | USB_REQ_TYPE_STANDARD,
USB_DESC_DEVICE, phost->device.Data,
80080d4: 687b ldr r3, [r7, #4]
80080d6: f503 728e add.w r2, r3, #284 ; 0x11c
if ((status = USBH_GetDescriptor(phost,
80080da: 78fb ldrb r3, [r7, #3]
80080dc: b29b uxth r3, r3
80080de: 9300 str r3, [sp, #0]
80080e0: 4613 mov r3, r2
80080e2: f44f 7280 mov.w r2, #256 ; 0x100
80080e6: 2100 movs r1, #0
80080e8: 6878 ldr r0, [r7, #4]
80080ea: f000 f864 bl 80081b6 <USBH_GetDescriptor>
80080ee: 4603 mov r3, r0
80080f0: 73fb strb r3, [r7, #15]
80080f2: 7bfb ldrb r3, [r7, #15]
80080f4: 2b00 cmp r3, #0
80080f6: d10a bne.n 800810e <USBH_Get_DevDesc+0x46>
(uint16_t)length)) == USBH_OK)
{
/* Commands successfully sent and Response Received */
USBH_ParseDevDesc(&phost->device.DevDesc, phost->device.Data,
80080f8: 687b ldr r3, [r7, #4]
80080fa: f203 3026 addw r0, r3, #806 ; 0x326
80080fe: 687b ldr r3, [r7, #4]
8008100: f503 738e add.w r3, r3, #284 ; 0x11c
8008104: 78fa ldrb r2, [r7, #3]
8008106: b292 uxth r2, r2
8008108: 4619 mov r1, r3
800810a: f000 f918 bl 800833e <USBH_ParseDevDesc>
(uint16_t)length);
}
return status;
800810e: 7bfb ldrb r3, [r7, #15]
}
8008110: 4618 mov r0, r3
8008112: 3710 adds r7, #16
8008114: 46bd mov sp, r7
8008116: bd80 pop {r7, pc}
08008118 <USBH_Get_CfgDesc>:
* @retval USBH Status
*/
USBH_StatusTypeDef USBH_Get_CfgDesc(USBH_HandleTypeDef *phost,
uint16_t length)
{
8008118: b580 push {r7, lr}
800811a: b086 sub sp, #24
800811c: af02 add r7, sp, #8
800811e: 6078 str r0, [r7, #4]
8008120: 460b mov r3, r1
8008122: 807b strh r3, [r7, #2]
USBH_StatusTypeDef status;
uint8_t *pData = phost->device.CfgDesc_Raw;;
8008124: 687b ldr r3, [r7, #4]
8008126: 331c adds r3, #28
8008128: 60fb str r3, [r7, #12]
if ((status = USBH_GetDescriptor(phost, (USB_REQ_RECIPIENT_DEVICE | USB_REQ_TYPE_STANDARD),
800812a: 887b ldrh r3, [r7, #2]
800812c: 9300 str r3, [sp, #0]
800812e: 68fb ldr r3, [r7, #12]
8008130: f44f 7200 mov.w r2, #512 ; 0x200
8008134: 2100 movs r1, #0
8008136: 6878 ldr r0, [r7, #4]
8008138: f000 f83d bl 80081b6 <USBH_GetDescriptor>
800813c: 4603 mov r3, r0
800813e: 72fb strb r3, [r7, #11]
8008140: 7afb ldrb r3, [r7, #11]
8008142: 2b00 cmp r3, #0
8008144: d107 bne.n 8008156 <USBH_Get_CfgDesc+0x3e>
USB_DESC_CONFIGURATION, pData, length)) == USBH_OK)
{
/* Commands successfully sent and Response Received */
USBH_ParseCfgDesc(&phost->device.CfgDesc, pData, length);
8008146: 687b ldr r3, [r7, #4]
8008148: f503 734e add.w r3, r3, #824 ; 0x338
800814c: 887a ldrh r2, [r7, #2]
800814e: 68f9 ldr r1, [r7, #12]
8008150: 4618 mov r0, r3
8008152: f000 f964 bl 800841e <USBH_ParseCfgDesc>
}
return status;
8008156: 7afb ldrb r3, [r7, #11]
}
8008158: 4618 mov r0, r3
800815a: 3710 adds r7, #16
800815c: 46bd mov sp, r7
800815e: bd80 pop {r7, pc}
08008160 <USBH_Get_StringDesc>:
* @retval USBH Status
*/
USBH_StatusTypeDef USBH_Get_StringDesc(USBH_HandleTypeDef *phost,
uint8_t string_index, uint8_t *buff,
uint16_t length)
{
8008160: b580 push {r7, lr}
8008162: b088 sub sp, #32
8008164: af02 add r7, sp, #8
8008166: 60f8 str r0, [r7, #12]
8008168: 607a str r2, [r7, #4]
800816a: 461a mov r2, r3
800816c: 460b mov r3, r1
800816e: 72fb strb r3, [r7, #11]
8008170: 4613 mov r3, r2
8008172: 813b strh r3, [r7, #8]
USBH_StatusTypeDef status;
if ((status = USBH_GetDescriptor(phost,
8008174: 7afb ldrb r3, [r7, #11]
8008176: b29b uxth r3, r3
8008178: f443 7340 orr.w r3, r3, #768 ; 0x300
800817c: b29a uxth r2, r3
USB_REQ_RECIPIENT_DEVICE | USB_REQ_TYPE_STANDARD,
USB_DESC_STRING | string_index,
phost->device.Data, length)) == USBH_OK)
800817e: 68fb ldr r3, [r7, #12]
8008180: f503 718e add.w r1, r3, #284 ; 0x11c
if ((status = USBH_GetDescriptor(phost,
8008184: 893b ldrh r3, [r7, #8]
8008186: 9300 str r3, [sp, #0]
8008188: 460b mov r3, r1
800818a: 2100 movs r1, #0
800818c: 68f8 ldr r0, [r7, #12]
800818e: f000 f812 bl 80081b6 <USBH_GetDescriptor>
8008192: 4603 mov r3, r0
8008194: 75fb strb r3, [r7, #23]
8008196: 7dfb ldrb r3, [r7, #23]
8008198: 2b00 cmp r3, #0
800819a: d107 bne.n 80081ac <USBH_Get_StringDesc+0x4c>
{
/* Commands successfully sent and Response Received */
USBH_ParseStringDesc(phost->device.Data, buff, length);
800819c: 68fb ldr r3, [r7, #12]
800819e: f503 738e add.w r3, r3, #284 ; 0x11c
80081a2: 893a ldrh r2, [r7, #8]
80081a4: 6879 ldr r1, [r7, #4]
80081a6: 4618 mov r0, r3
80081a8: f000 fa37 bl 800861a <USBH_ParseStringDesc>
}
return status;
80081ac: 7dfb ldrb r3, [r7, #23]
}
80081ae: 4618 mov r0, r3
80081b0: 3718 adds r7, #24
80081b2: 46bd mov sp, r7
80081b4: bd80 pop {r7, pc}
080081b6 <USBH_GetDescriptor>:
USBH_StatusTypeDef USBH_GetDescriptor(USBH_HandleTypeDef *phost,
uint8_t req_type,
uint16_t value_idx,
uint8_t *buff,
uint16_t length)
{
80081b6: b580 push {r7, lr}
80081b8: b084 sub sp, #16
80081ba: af00 add r7, sp, #0
80081bc: 60f8 str r0, [r7, #12]
80081be: 607b str r3, [r7, #4]
80081c0: 460b mov r3, r1
80081c2: 72fb strb r3, [r7, #11]
80081c4: 4613 mov r3, r2
80081c6: 813b strh r3, [r7, #8]
if (phost->RequestState == CMD_SEND)
80081c8: 68fb ldr r3, [r7, #12]
80081ca: 789b ldrb r3, [r3, #2]
80081cc: 2b01 cmp r3, #1
80081ce: d11c bne.n 800820a <USBH_GetDescriptor+0x54>
{
phost->Control.setup.b.bmRequestType = USB_D2H | req_type;
80081d0: 7afb ldrb r3, [r7, #11]
80081d2: f063 037f orn r3, r3, #127 ; 0x7f
80081d6: b2da uxtb r2, r3
80081d8: 68fb ldr r3, [r7, #12]
80081da: 741a strb r2, [r3, #16]
phost->Control.setup.b.bRequest = USB_REQ_GET_DESCRIPTOR;
80081dc: 68fb ldr r3, [r7, #12]
80081de: 2206 movs r2, #6
80081e0: 745a strb r2, [r3, #17]
phost->Control.setup.b.wValue.w = value_idx;
80081e2: 68fb ldr r3, [r7, #12]
80081e4: 893a ldrh r2, [r7, #8]
80081e6: 825a strh r2, [r3, #18]
if ((value_idx & 0xff00U) == USB_DESC_STRING)
80081e8: 893b ldrh r3, [r7, #8]
80081ea: f403 437f and.w r3, r3, #65280 ; 0xff00
80081ee: f5b3 7f40 cmp.w r3, #768 ; 0x300
80081f2: d104 bne.n 80081fe <USBH_GetDescriptor+0x48>
{
phost->Control.setup.b.wIndex.w = 0x0409U;
80081f4: 68fb ldr r3, [r7, #12]
80081f6: f240 4209 movw r2, #1033 ; 0x409
80081fa: 829a strh r2, [r3, #20]
80081fc: e002 b.n 8008204 <USBH_GetDescriptor+0x4e>
}
else
{
phost->Control.setup.b.wIndex.w = 0U;
80081fe: 68fb ldr r3, [r7, #12]
8008200: 2200 movs r2, #0
8008202: 829a strh r2, [r3, #20]
}
phost->Control.setup.b.wLength.w = length;
8008204: 68fb ldr r3, [r7, #12]
8008206: 8b3a ldrh r2, [r7, #24]
8008208: 82da strh r2, [r3, #22]
}
return USBH_CtlReq(phost, buff, length);
800820a: 8b3b ldrh r3, [r7, #24]
800820c: 461a mov r2, r3
800820e: 6879 ldr r1, [r7, #4]
8008210: 68f8 ldr r0, [r7, #12]
8008212: f000 fa50 bl 80086b6 <USBH_CtlReq>
8008216: 4603 mov r3, r0
}
8008218: 4618 mov r0, r3
800821a: 3710 adds r7, #16
800821c: 46bd mov sp, r7
800821e: bd80 pop {r7, pc}
08008220 <USBH_SetAddress>:
* @param DeviceAddress: Device address to assign
* @retval USBH Status
*/
USBH_StatusTypeDef USBH_SetAddress(USBH_HandleTypeDef *phost,
uint8_t DeviceAddress)
{
8008220: b580 push {r7, lr}
8008222: b082 sub sp, #8
8008224: af00 add r7, sp, #0
8008226: 6078 str r0, [r7, #4]
8008228: 460b mov r3, r1
800822a: 70fb strb r3, [r7, #3]
if (phost->RequestState == CMD_SEND)
800822c: 687b ldr r3, [r7, #4]
800822e: 789b ldrb r3, [r3, #2]
8008230: 2b01 cmp r3, #1
8008232: d10f bne.n 8008254 <USBH_SetAddress+0x34>
{
phost->Control.setup.b.bmRequestType = USB_H2D | USB_REQ_RECIPIENT_DEVICE | \
8008234: 687b ldr r3, [r7, #4]
8008236: 2200 movs r2, #0
8008238: 741a strb r2, [r3, #16]
USB_REQ_TYPE_STANDARD;
phost->Control.setup.b.bRequest = USB_REQ_SET_ADDRESS;
800823a: 687b ldr r3, [r7, #4]
800823c: 2205 movs r2, #5
800823e: 745a strb r2, [r3, #17]
phost->Control.setup.b.wValue.w = (uint16_t)DeviceAddress;
8008240: 78fb ldrb r3, [r7, #3]
8008242: b29a uxth r2, r3
8008244: 687b ldr r3, [r7, #4]
8008246: 825a strh r2, [r3, #18]
phost->Control.setup.b.wIndex.w = 0U;
8008248: 687b ldr r3, [r7, #4]
800824a: 2200 movs r2, #0
800824c: 829a strh r2, [r3, #20]
phost->Control.setup.b.wLength.w = 0U;
800824e: 687b ldr r3, [r7, #4]
8008250: 2200 movs r2, #0
8008252: 82da strh r2, [r3, #22]
}
return USBH_CtlReq(phost, 0U, 0U);
8008254: 2200 movs r2, #0
8008256: 2100 movs r1, #0
8008258: 6878 ldr r0, [r7, #4]
800825a: f000 fa2c bl 80086b6 <USBH_CtlReq>
800825e: 4603 mov r3, r0
}
8008260: 4618 mov r0, r3
8008262: 3708 adds r7, #8
8008264: 46bd mov sp, r7
8008266: bd80 pop {r7, pc}
08008268 <USBH_SetCfg>:
* @param phost: Host Handle
* @param cfg_idx: Configuration value
* @retval USBH Status
*/
USBH_StatusTypeDef USBH_SetCfg(USBH_HandleTypeDef *phost, uint16_t cfg_idx)
{
8008268: b580 push {r7, lr}
800826a: b082 sub sp, #8
800826c: af00 add r7, sp, #0
800826e: 6078 str r0, [r7, #4]
8008270: 460b mov r3, r1
8008272: 807b strh r3, [r7, #2]
if (phost->RequestState == CMD_SEND)
8008274: 687b ldr r3, [r7, #4]
8008276: 789b ldrb r3, [r3, #2]
8008278: 2b01 cmp r3, #1
800827a: d10e bne.n 800829a <USBH_SetCfg+0x32>
{
phost->Control.setup.b.bmRequestType = USB_H2D | USB_REQ_RECIPIENT_DEVICE
800827c: 687b ldr r3, [r7, #4]
800827e: 2200 movs r2, #0
8008280: 741a strb r2, [r3, #16]
| USB_REQ_TYPE_STANDARD;
phost->Control.setup.b.bRequest = USB_REQ_SET_CONFIGURATION;
8008282: 687b ldr r3, [r7, #4]
8008284: 2209 movs r2, #9
8008286: 745a strb r2, [r3, #17]
phost->Control.setup.b.wValue.w = cfg_idx;
8008288: 687b ldr r3, [r7, #4]
800828a: 887a ldrh r2, [r7, #2]
800828c: 825a strh r2, [r3, #18]
phost->Control.setup.b.wIndex.w = 0U;
800828e: 687b ldr r3, [r7, #4]
8008290: 2200 movs r2, #0
8008292: 829a strh r2, [r3, #20]
phost->Control.setup.b.wLength.w = 0U;
8008294: 687b ldr r3, [r7, #4]
8008296: 2200 movs r2, #0
8008298: 82da strh r2, [r3, #22]
}
return USBH_CtlReq(phost, 0U, 0U);
800829a: 2200 movs r2, #0
800829c: 2100 movs r1, #0
800829e: 6878 ldr r0, [r7, #4]
80082a0: f000 fa09 bl 80086b6 <USBH_CtlReq>
80082a4: 4603 mov r3, r0
}
80082a6: 4618 mov r0, r3
80082a8: 3708 adds r7, #8
80082aa: 46bd mov sp, r7
80082ac: bd80 pop {r7, pc}
080082ae <USBH_SetFeature>:
* @param pdev: Selected device
* @param itf_idx
* @retval Status
*/
USBH_StatusTypeDef USBH_SetFeature(USBH_HandleTypeDef *phost, uint8_t wValue)
{
80082ae: b580 push {r7, lr}
80082b0: b082 sub sp, #8
80082b2: af00 add r7, sp, #0
80082b4: 6078 str r0, [r7, #4]
80082b6: 460b mov r3, r1
80082b8: 70fb strb r3, [r7, #3]
if (phost->RequestState == CMD_SEND)
80082ba: 687b ldr r3, [r7, #4]
80082bc: 789b ldrb r3, [r3, #2]
80082be: 2b01 cmp r3, #1
80082c0: d10f bne.n 80082e2 <USBH_SetFeature+0x34>
{
phost->Control.setup.b.bmRequestType = USB_H2D | USB_REQ_RECIPIENT_DEVICE
80082c2: 687b ldr r3, [r7, #4]
80082c4: 2200 movs r2, #0
80082c6: 741a strb r2, [r3, #16]
| USB_REQ_TYPE_STANDARD;
phost->Control.setup.b.bRequest = USB_REQ_SET_FEATURE;
80082c8: 687b ldr r3, [r7, #4]
80082ca: 2203 movs r2, #3
80082cc: 745a strb r2, [r3, #17]
phost->Control.setup.b.wValue.w = wValue;
80082ce: 78fb ldrb r3, [r7, #3]
80082d0: b29a uxth r2, r3
80082d2: 687b ldr r3, [r7, #4]
80082d4: 825a strh r2, [r3, #18]
phost->Control.setup.b.wIndex.w = 0U;
80082d6: 687b ldr r3, [r7, #4]
80082d8: 2200 movs r2, #0
80082da: 829a strh r2, [r3, #20]
phost->Control.setup.b.wLength.w = 0U;
80082dc: 687b ldr r3, [r7, #4]
80082de: 2200 movs r2, #0
80082e0: 82da strh r2, [r3, #22]
}
return USBH_CtlReq(phost, 0U, 0U);
80082e2: 2200 movs r2, #0
80082e4: 2100 movs r1, #0
80082e6: 6878 ldr r0, [r7, #4]
80082e8: f000 f9e5 bl 80086b6 <USBH_CtlReq>
80082ec: 4603 mov r3, r0
}
80082ee: 4618 mov r0, r3
80082f0: 3708 adds r7, #8
80082f2: 46bd mov sp, r7
80082f4: bd80 pop {r7, pc}
080082f6 <USBH_ClrFeature>:
* @param ep_num: endpoint number
* @param hc_num: Host channel number
* @retval USBH Status
*/
USBH_StatusTypeDef USBH_ClrFeature(USBH_HandleTypeDef *phost, uint8_t ep_num)
{
80082f6: b580 push {r7, lr}
80082f8: b082 sub sp, #8
80082fa: af00 add r7, sp, #0
80082fc: 6078 str r0, [r7, #4]
80082fe: 460b mov r3, r1
8008300: 70fb strb r3, [r7, #3]
if (phost->RequestState == CMD_SEND)
8008302: 687b ldr r3, [r7, #4]
8008304: 789b ldrb r3, [r3, #2]
8008306: 2b01 cmp r3, #1
8008308: d10f bne.n 800832a <USBH_ClrFeature+0x34>
{
phost->Control.setup.b.bmRequestType = USB_H2D | USB_REQ_RECIPIENT_ENDPOINT
800830a: 687b ldr r3, [r7, #4]
800830c: 2202 movs r2, #2
800830e: 741a strb r2, [r3, #16]
| USB_REQ_TYPE_STANDARD;
phost->Control.setup.b.bRequest = USB_REQ_CLEAR_FEATURE;
8008310: 687b ldr r3, [r7, #4]
8008312: 2201 movs r2, #1
8008314: 745a strb r2, [r3, #17]
phost->Control.setup.b.wValue.w = FEATURE_SELECTOR_ENDPOINT;
8008316: 687b ldr r3, [r7, #4]
8008318: 2200 movs r2, #0
800831a: 825a strh r2, [r3, #18]
phost->Control.setup.b.wIndex.w = ep_num;
800831c: 78fb ldrb r3, [r7, #3]
800831e: b29a uxth r2, r3
8008320: 687b ldr r3, [r7, #4]
8008322: 829a strh r2, [r3, #20]
phost->Control.setup.b.wLength.w = 0U;
8008324: 687b ldr r3, [r7, #4]
8008326: 2200 movs r2, #0
8008328: 82da strh r2, [r3, #22]
}
return USBH_CtlReq(phost, 0U, 0U);
800832a: 2200 movs r2, #0
800832c: 2100 movs r1, #0
800832e: 6878 ldr r0, [r7, #4]
8008330: f000 f9c1 bl 80086b6 <USBH_CtlReq>
8008334: 4603 mov r3, r0
}
8008336: 4618 mov r0, r3
8008338: 3708 adds r7, #8
800833a: 46bd mov sp, r7
800833c: bd80 pop {r7, pc}
0800833e <USBH_ParseDevDesc>:
* @param length: Length of the descriptor
* @retval None
*/
static void USBH_ParseDevDesc(USBH_DevDescTypeDef *dev_desc, uint8_t *buf,
uint16_t length)
{
800833e: b480 push {r7}
8008340: b085 sub sp, #20
8008342: af00 add r7, sp, #0
8008344: 60f8 str r0, [r7, #12]
8008346: 60b9 str r1, [r7, #8]
8008348: 4613 mov r3, r2
800834a: 80fb strh r3, [r7, #6]
dev_desc->bLength = *(uint8_t *)(buf + 0);
800834c: 68bb ldr r3, [r7, #8]
800834e: 781a ldrb r2, [r3, #0]
8008350: 68fb ldr r3, [r7, #12]
8008352: 701a strb r2, [r3, #0]
dev_desc->bDescriptorType = *(uint8_t *)(buf + 1);
8008354: 68bb ldr r3, [r7, #8]
8008356: 785a ldrb r2, [r3, #1]
8008358: 68fb ldr r3, [r7, #12]
800835a: 705a strb r2, [r3, #1]
dev_desc->bcdUSB = LE16(buf + 2);
800835c: 68bb ldr r3, [r7, #8]
800835e: 3302 adds r3, #2
8008360: 781b ldrb r3, [r3, #0]
8008362: b29a uxth r2, r3
8008364: 68bb ldr r3, [r7, #8]
8008366: 3303 adds r3, #3
8008368: 781b ldrb r3, [r3, #0]
800836a: b29b uxth r3, r3
800836c: 021b lsls r3, r3, #8
800836e: b29b uxth r3, r3
8008370: 4313 orrs r3, r2
8008372: b29a uxth r2, r3
8008374: 68fb ldr r3, [r7, #12]
8008376: 805a strh r2, [r3, #2]
dev_desc->bDeviceClass = *(uint8_t *)(buf + 4);
8008378: 68bb ldr r3, [r7, #8]
800837a: 791a ldrb r2, [r3, #4]
800837c: 68fb ldr r3, [r7, #12]
800837e: 711a strb r2, [r3, #4]
dev_desc->bDeviceSubClass = *(uint8_t *)(buf + 5);
8008380: 68bb ldr r3, [r7, #8]
8008382: 795a ldrb r2, [r3, #5]
8008384: 68fb ldr r3, [r7, #12]
8008386: 715a strb r2, [r3, #5]
dev_desc->bDeviceProtocol = *(uint8_t *)(buf + 6);
8008388: 68bb ldr r3, [r7, #8]
800838a: 799a ldrb r2, [r3, #6]
800838c: 68fb ldr r3, [r7, #12]
800838e: 719a strb r2, [r3, #6]
dev_desc->bMaxPacketSize = *(uint8_t *)(buf + 7);
8008390: 68bb ldr r3, [r7, #8]
8008392: 79da ldrb r2, [r3, #7]
8008394: 68fb ldr r3, [r7, #12]
8008396: 71da strb r2, [r3, #7]
if (length > 8U)
8008398: 88fb ldrh r3, [r7, #6]
800839a: 2b08 cmp r3, #8
800839c: d939 bls.n 8008412 <USBH_ParseDevDesc+0xd4>
{
/* For 1st time after device connection, Host may issue only 8 bytes for
Device Descriptor Length */
dev_desc->idVendor = LE16(buf + 8);
800839e: 68bb ldr r3, [r7, #8]
80083a0: 3308 adds r3, #8
80083a2: 781b ldrb r3, [r3, #0]
80083a4: b29a uxth r2, r3
80083a6: 68bb ldr r3, [r7, #8]
80083a8: 3309 adds r3, #9
80083aa: 781b ldrb r3, [r3, #0]
80083ac: b29b uxth r3, r3
80083ae: 021b lsls r3, r3, #8
80083b0: b29b uxth r3, r3
80083b2: 4313 orrs r3, r2
80083b4: b29a uxth r2, r3
80083b6: 68fb ldr r3, [r7, #12]
80083b8: 811a strh r2, [r3, #8]
dev_desc->idProduct = LE16(buf + 10);
80083ba: 68bb ldr r3, [r7, #8]
80083bc: 330a adds r3, #10
80083be: 781b ldrb r3, [r3, #0]
80083c0: b29a uxth r2, r3
80083c2: 68bb ldr r3, [r7, #8]
80083c4: 330b adds r3, #11
80083c6: 781b ldrb r3, [r3, #0]
80083c8: b29b uxth r3, r3
80083ca: 021b lsls r3, r3, #8
80083cc: b29b uxth r3, r3
80083ce: 4313 orrs r3, r2
80083d0: b29a uxth r2, r3
80083d2: 68fb ldr r3, [r7, #12]
80083d4: 815a strh r2, [r3, #10]
dev_desc->bcdDevice = LE16(buf + 12);
80083d6: 68bb ldr r3, [r7, #8]
80083d8: 330c adds r3, #12
80083da: 781b ldrb r3, [r3, #0]
80083dc: b29a uxth r2, r3
80083de: 68bb ldr r3, [r7, #8]
80083e0: 330d adds r3, #13
80083e2: 781b ldrb r3, [r3, #0]
80083e4: b29b uxth r3, r3
80083e6: 021b lsls r3, r3, #8
80083e8: b29b uxth r3, r3
80083ea: 4313 orrs r3, r2
80083ec: b29a uxth r2, r3
80083ee: 68fb ldr r3, [r7, #12]
80083f0: 819a strh r2, [r3, #12]
dev_desc->iManufacturer = *(uint8_t *)(buf + 14);
80083f2: 68bb ldr r3, [r7, #8]
80083f4: 7b9a ldrb r2, [r3, #14]
80083f6: 68fb ldr r3, [r7, #12]
80083f8: 739a strb r2, [r3, #14]
dev_desc->iProduct = *(uint8_t *)(buf + 15);
80083fa: 68bb ldr r3, [r7, #8]
80083fc: 7bda ldrb r2, [r3, #15]
80083fe: 68fb ldr r3, [r7, #12]
8008400: 73da strb r2, [r3, #15]
dev_desc->iSerialNumber = *(uint8_t *)(buf + 16);
8008402: 68bb ldr r3, [r7, #8]
8008404: 7c1a ldrb r2, [r3, #16]
8008406: 68fb ldr r3, [r7, #12]
8008408: 741a strb r2, [r3, #16]
dev_desc->bNumConfigurations = *(uint8_t *)(buf + 17);
800840a: 68bb ldr r3, [r7, #8]
800840c: 7c5a ldrb r2, [r3, #17]
800840e: 68fb ldr r3, [r7, #12]
8008410: 745a strb r2, [r3, #17]
}
}
8008412: bf00 nop
8008414: 3714 adds r7, #20
8008416: 46bd mov sp, r7
8008418: f85d 7b04 ldr.w r7, [sp], #4
800841c: 4770 bx lr
0800841e <USBH_ParseCfgDesc>:
* @param length: Length of the descriptor
* @retval None
*/
static void USBH_ParseCfgDesc(USBH_CfgDescTypeDef *cfg_desc, uint8_t *buf,
uint16_t length)
{
800841e: b580 push {r7, lr}
8008420: b08a sub sp, #40 ; 0x28
8008422: af00 add r7, sp, #0
8008424: 60f8 str r0, [r7, #12]
8008426: 60b9 str r1, [r7, #8]
8008428: 4613 mov r3, r2
800842a: 80fb strh r3, [r7, #6]
USBH_InterfaceDescTypeDef *pif ;
USBH_EpDescTypeDef *pep;
USBH_DescHeader_t *pdesc = (USBH_DescHeader_t *)(void *)buf;
800842c: 68bb ldr r3, [r7, #8]
800842e: 627b str r3, [r7, #36] ; 0x24
uint16_t ptr;
uint8_t if_ix = 0U;
8008430: 2300 movs r3, #0
8008432: f887 3023 strb.w r3, [r7, #35] ; 0x23
uint8_t ep_ix = 0U;
8008436: 2300 movs r3, #0
8008438: f887 3022 strb.w r3, [r7, #34] ; 0x22
pdesc = (USBH_DescHeader_t *)(void *)buf;
800843c: 68bb ldr r3, [r7, #8]
800843e: 627b str r3, [r7, #36] ; 0x24
/* Parse configuration descriptor */
cfg_desc->bLength = *(uint8_t *)(buf + 0);
8008440: 68bb ldr r3, [r7, #8]
8008442: 781a ldrb r2, [r3, #0]
8008444: 68fb ldr r3, [r7, #12]
8008446: 701a strb r2, [r3, #0]
cfg_desc->bDescriptorType = *(uint8_t *)(buf + 1);
8008448: 68bb ldr r3, [r7, #8]
800844a: 785a ldrb r2, [r3, #1]
800844c: 68fb ldr r3, [r7, #12]
800844e: 705a strb r2, [r3, #1]
cfg_desc->wTotalLength = LE16(buf + 2);
8008450: 68bb ldr r3, [r7, #8]
8008452: 3302 adds r3, #2
8008454: 781b ldrb r3, [r3, #0]
8008456: b29a uxth r2, r3
8008458: 68bb ldr r3, [r7, #8]
800845a: 3303 adds r3, #3
800845c: 781b ldrb r3, [r3, #0]
800845e: b29b uxth r3, r3
8008460: 021b lsls r3, r3, #8
8008462: b29b uxth r3, r3
8008464: 4313 orrs r3, r2
8008466: b29a uxth r2, r3
8008468: 68fb ldr r3, [r7, #12]
800846a: 805a strh r2, [r3, #2]
cfg_desc->bNumInterfaces = *(uint8_t *)(buf + 4);
800846c: 68bb ldr r3, [r7, #8]
800846e: 791a ldrb r2, [r3, #4]
8008470: 68fb ldr r3, [r7, #12]
8008472: 711a strb r2, [r3, #4]
cfg_desc->bConfigurationValue = *(uint8_t *)(buf + 5);
8008474: 68bb ldr r3, [r7, #8]
8008476: 795a ldrb r2, [r3, #5]
8008478: 68fb ldr r3, [r7, #12]
800847a: 715a strb r2, [r3, #5]
cfg_desc->iConfiguration = *(uint8_t *)(buf + 6);
800847c: 68bb ldr r3, [r7, #8]
800847e: 799a ldrb r2, [r3, #6]
8008480: 68fb ldr r3, [r7, #12]
8008482: 719a strb r2, [r3, #6]
cfg_desc->bmAttributes = *(uint8_t *)(buf + 7);
8008484: 68bb ldr r3, [r7, #8]
8008486: 79da ldrb r2, [r3, #7]
8008488: 68fb ldr r3, [r7, #12]
800848a: 71da strb r2, [r3, #7]
cfg_desc->bMaxPower = *(uint8_t *)(buf + 8);
800848c: 68bb ldr r3, [r7, #8]
800848e: 7a1a ldrb r2, [r3, #8]
8008490: 68fb ldr r3, [r7, #12]
8008492: 721a strb r2, [r3, #8]
if (length > USB_CONFIGURATION_DESC_SIZE)
8008494: 88fb ldrh r3, [r7, #6]
8008496: 2b09 cmp r3, #9
8008498: d95f bls.n 800855a <USBH_ParseCfgDesc+0x13c>
{
ptr = USB_LEN_CFG_DESC;
800849a: 2309 movs r3, #9
800849c: 82fb strh r3, [r7, #22]
pif = (USBH_InterfaceDescTypeDef *)0;
800849e: 2300 movs r3, #0
80084a0: 61fb str r3, [r7, #28]
while ((if_ix < USBH_MAX_NUM_INTERFACES) && (ptr < cfg_desc->wTotalLength))
80084a2: e051 b.n 8008548 <USBH_ParseCfgDesc+0x12a>
{
pdesc = USBH_GetNextDesc((uint8_t *)(void *)pdesc, &ptr);
80084a4: f107 0316 add.w r3, r7, #22
80084a8: 4619 mov r1, r3
80084aa: 6a78 ldr r0, [r7, #36] ; 0x24
80084ac: f000 f8e8 bl 8008680 <USBH_GetNextDesc>
80084b0: 6278 str r0, [r7, #36] ; 0x24
if (pdesc->bDescriptorType == USB_DESC_TYPE_INTERFACE)
80084b2: 6a7b ldr r3, [r7, #36] ; 0x24
80084b4: 785b ldrb r3, [r3, #1]
80084b6: 2b04 cmp r3, #4
80084b8: d146 bne.n 8008548 <USBH_ParseCfgDesc+0x12a>
{
pif = &cfg_desc->Itf_Desc[if_ix];
80084ba: f897 3023 ldrb.w r3, [r7, #35] ; 0x23
80084be: 221a movs r2, #26
80084c0: fb02 f303 mul.w r3, r2, r3
80084c4: 3308 adds r3, #8
80084c6: 68fa ldr r2, [r7, #12]
80084c8: 4413 add r3, r2
80084ca: 3302 adds r3, #2
80084cc: 61fb str r3, [r7, #28]
USBH_ParseInterfaceDesc(pif, (uint8_t *)(void *)pdesc);
80084ce: 6a79 ldr r1, [r7, #36] ; 0x24
80084d0: 69f8 ldr r0, [r7, #28]
80084d2: f000 f846 bl 8008562 <USBH_ParseInterfaceDesc>
ep_ix = 0U;
80084d6: 2300 movs r3, #0
80084d8: f887 3022 strb.w r3, [r7, #34] ; 0x22
pep = (USBH_EpDescTypeDef *)0;
80084dc: 2300 movs r3, #0
80084de: 61bb str r3, [r7, #24]
while ((ep_ix < pif->bNumEndpoints) && (ptr < cfg_desc->wTotalLength))
80084e0: e022 b.n 8008528 <USBH_ParseCfgDesc+0x10a>
{
pdesc = USBH_GetNextDesc((uint8_t *)(void *)pdesc, &ptr);
80084e2: f107 0316 add.w r3, r7, #22
80084e6: 4619 mov r1, r3
80084e8: 6a78 ldr r0, [r7, #36] ; 0x24
80084ea: f000 f8c9 bl 8008680 <USBH_GetNextDesc>
80084ee: 6278 str r0, [r7, #36] ; 0x24
if (pdesc->bDescriptorType == USB_DESC_TYPE_ENDPOINT)
80084f0: 6a7b ldr r3, [r7, #36] ; 0x24
80084f2: 785b ldrb r3, [r3, #1]
80084f4: 2b05 cmp r3, #5
80084f6: d117 bne.n 8008528 <USBH_ParseCfgDesc+0x10a>
{
pep = &cfg_desc->Itf_Desc[if_ix].Ep_Desc[ep_ix];
80084f8: f897 3023 ldrb.w r3, [r7, #35] ; 0x23
80084fc: f897 2022 ldrb.w r2, [r7, #34] ; 0x22
8008500: 3201 adds r2, #1
8008502: 00d2 lsls r2, r2, #3
8008504: 211a movs r1, #26
8008506: fb01 f303 mul.w r3, r1, r3
800850a: 4413 add r3, r2
800850c: 3308 adds r3, #8
800850e: 68fa ldr r2, [r7, #12]
8008510: 4413 add r3, r2
8008512: 3304 adds r3, #4
8008514: 61bb str r3, [r7, #24]
USBH_ParseEPDesc(pep, (uint8_t *)(void *)pdesc);
8008516: 6a79 ldr r1, [r7, #36] ; 0x24
8008518: 69b8 ldr r0, [r7, #24]
800851a: f000 f851 bl 80085c0 <USBH_ParseEPDesc>
ep_ix++;
800851e: f897 3022 ldrb.w r3, [r7, #34] ; 0x22
8008522: 3301 adds r3, #1
8008524: f887 3022 strb.w r3, [r7, #34] ; 0x22
while ((ep_ix < pif->bNumEndpoints) && (ptr < cfg_desc->wTotalLength))
8008528: 69fb ldr r3, [r7, #28]
800852a: 791b ldrb r3, [r3, #4]
800852c: f897 2022 ldrb.w r2, [r7, #34] ; 0x22
8008530: 429a cmp r2, r3
8008532: d204 bcs.n 800853e <USBH_ParseCfgDesc+0x120>
8008534: 68fb ldr r3, [r7, #12]
8008536: 885a ldrh r2, [r3, #2]
8008538: 8afb ldrh r3, [r7, #22]
800853a: 429a cmp r2, r3
800853c: d8d1 bhi.n 80084e2 <USBH_ParseCfgDesc+0xc4>
}
}
if_ix++;
800853e: f897 3023 ldrb.w r3, [r7, #35] ; 0x23
8008542: 3301 adds r3, #1
8008544: f887 3023 strb.w r3, [r7, #35] ; 0x23
while ((if_ix < USBH_MAX_NUM_INTERFACES) && (ptr < cfg_desc->wTotalLength))
8008548: f897 3023 ldrb.w r3, [r7, #35] ; 0x23
800854c: 2b01 cmp r3, #1
800854e: d804 bhi.n 800855a <USBH_ParseCfgDesc+0x13c>
8008550: 68fb ldr r3, [r7, #12]
8008552: 885a ldrh r2, [r3, #2]
8008554: 8afb ldrh r3, [r7, #22]
8008556: 429a cmp r2, r3
8008558: d8a4 bhi.n 80084a4 <USBH_ParseCfgDesc+0x86>
}
}
}
}
800855a: bf00 nop
800855c: 3728 adds r7, #40 ; 0x28
800855e: 46bd mov sp, r7
8008560: bd80 pop {r7, pc}
08008562 <USBH_ParseInterfaceDesc>:
* @param buf: Buffer where the descriptor data is available
* @retval None
*/
static void USBH_ParseInterfaceDesc(USBH_InterfaceDescTypeDef *if_descriptor,
uint8_t *buf)
{
8008562: b480 push {r7}
8008564: b083 sub sp, #12
8008566: af00 add r7, sp, #0
8008568: 6078 str r0, [r7, #4]
800856a: 6039 str r1, [r7, #0]
if_descriptor->bLength = *(uint8_t *)(buf + 0);
800856c: 683b ldr r3, [r7, #0]
800856e: 781a ldrb r2, [r3, #0]
8008570: 687b ldr r3, [r7, #4]
8008572: 701a strb r2, [r3, #0]
if_descriptor->bDescriptorType = *(uint8_t *)(buf + 1);
8008574: 683b ldr r3, [r7, #0]
8008576: 785a ldrb r2, [r3, #1]
8008578: 687b ldr r3, [r7, #4]
800857a: 705a strb r2, [r3, #1]
if_descriptor->bInterfaceNumber = *(uint8_t *)(buf + 2);
800857c: 683b ldr r3, [r7, #0]
800857e: 789a ldrb r2, [r3, #2]
8008580: 687b ldr r3, [r7, #4]
8008582: 709a strb r2, [r3, #2]
if_descriptor->bAlternateSetting = *(uint8_t *)(buf + 3);
8008584: 683b ldr r3, [r7, #0]
8008586: 78da ldrb r2, [r3, #3]
8008588: 687b ldr r3, [r7, #4]
800858a: 70da strb r2, [r3, #3]
if_descriptor->bNumEndpoints = *(uint8_t *)(buf + 4);
800858c: 683b ldr r3, [r7, #0]
800858e: 791a ldrb r2, [r3, #4]
8008590: 687b ldr r3, [r7, #4]
8008592: 711a strb r2, [r3, #4]
if_descriptor->bInterfaceClass = *(uint8_t *)(buf + 5);
8008594: 683b ldr r3, [r7, #0]
8008596: 795a ldrb r2, [r3, #5]
8008598: 687b ldr r3, [r7, #4]
800859a: 715a strb r2, [r3, #5]
if_descriptor->bInterfaceSubClass = *(uint8_t *)(buf + 6);
800859c: 683b ldr r3, [r7, #0]
800859e: 799a ldrb r2, [r3, #6]
80085a0: 687b ldr r3, [r7, #4]
80085a2: 719a strb r2, [r3, #6]
if_descriptor->bInterfaceProtocol = *(uint8_t *)(buf + 7);
80085a4: 683b ldr r3, [r7, #0]
80085a6: 79da ldrb r2, [r3, #7]
80085a8: 687b ldr r3, [r7, #4]
80085aa: 71da strb r2, [r3, #7]
if_descriptor->iInterface = *(uint8_t *)(buf + 8);
80085ac: 683b ldr r3, [r7, #0]
80085ae: 7a1a ldrb r2, [r3, #8]
80085b0: 687b ldr r3, [r7, #4]
80085b2: 721a strb r2, [r3, #8]
}
80085b4: bf00 nop
80085b6: 370c adds r7, #12
80085b8: 46bd mov sp, r7
80085ba: f85d 7b04 ldr.w r7, [sp], #4
80085be: 4770 bx lr
080085c0 <USBH_ParseEPDesc>:
* @param buf: Buffer where the parsed descriptor stored
* @retval None
*/
static void USBH_ParseEPDesc(USBH_EpDescTypeDef *ep_descriptor,
uint8_t *buf)
{
80085c0: b480 push {r7}
80085c2: b083 sub sp, #12
80085c4: af00 add r7, sp, #0
80085c6: 6078 str r0, [r7, #4]
80085c8: 6039 str r1, [r7, #0]
ep_descriptor->bLength = *(uint8_t *)(buf + 0);
80085ca: 683b ldr r3, [r7, #0]
80085cc: 781a ldrb r2, [r3, #0]
80085ce: 687b ldr r3, [r7, #4]
80085d0: 701a strb r2, [r3, #0]
ep_descriptor->bDescriptorType = *(uint8_t *)(buf + 1);
80085d2: 683b ldr r3, [r7, #0]
80085d4: 785a ldrb r2, [r3, #1]
80085d6: 687b ldr r3, [r7, #4]
80085d8: 705a strb r2, [r3, #1]
ep_descriptor->bEndpointAddress = *(uint8_t *)(buf + 2);
80085da: 683b ldr r3, [r7, #0]
80085dc: 789a ldrb r2, [r3, #2]
80085de: 687b ldr r3, [r7, #4]
80085e0: 709a strb r2, [r3, #2]
ep_descriptor->bmAttributes = *(uint8_t *)(buf + 3);
80085e2: 683b ldr r3, [r7, #0]
80085e4: 78da ldrb r2, [r3, #3]
80085e6: 687b ldr r3, [r7, #4]
80085e8: 70da strb r2, [r3, #3]
ep_descriptor->wMaxPacketSize = LE16(buf + 4);
80085ea: 683b ldr r3, [r7, #0]
80085ec: 3304 adds r3, #4
80085ee: 781b ldrb r3, [r3, #0]
80085f0: b29a uxth r2, r3
80085f2: 683b ldr r3, [r7, #0]
80085f4: 3305 adds r3, #5
80085f6: 781b ldrb r3, [r3, #0]
80085f8: b29b uxth r3, r3
80085fa: 021b lsls r3, r3, #8
80085fc: b29b uxth r3, r3
80085fe: 4313 orrs r3, r2
8008600: b29a uxth r2, r3
8008602: 687b ldr r3, [r7, #4]
8008604: 809a strh r2, [r3, #4]
ep_descriptor->bInterval = *(uint8_t *)(buf + 6);
8008606: 683b ldr r3, [r7, #0]
8008608: 799a ldrb r2, [r3, #6]
800860a: 687b ldr r3, [r7, #4]
800860c: 719a strb r2, [r3, #6]
}
800860e: bf00 nop
8008610: 370c adds r7, #12
8008612: 46bd mov sp, r7
8008614: f85d 7b04 ldr.w r7, [sp], #4
8008618: 4770 bx lr
0800861a <USBH_ParseStringDesc>:
* @param pdest: Destination address pointer
* @param length: Length of the descriptor
* @retval None
*/
static void USBH_ParseStringDesc(uint8_t *psrc, uint8_t *pdest, uint16_t length)
{
800861a: b480 push {r7}
800861c: b087 sub sp, #28
800861e: af00 add r7, sp, #0
8008620: 60f8 str r0, [r7, #12]
8008622: 60b9 str r1, [r7, #8]
8008624: 4613 mov r3, r2
8008626: 80fb strh r3, [r7, #6]
*/
/* Check which is lower size, the Size of string or the length of bytes read
from the device */
if (psrc[1] == USB_DESC_TYPE_STRING)
8008628: 68fb ldr r3, [r7, #12]
800862a: 3301 adds r3, #1
800862c: 781b ldrb r3, [r3, #0]
800862e: 2b03 cmp r3, #3
8008630: d120 bne.n 8008674 <USBH_ParseStringDesc+0x5a>
{
/* Make sure the Descriptor is String Type */
/* psrc[0] contains Size of Descriptor, subtract 2 to get the length of string */
strlength = ((((uint16_t)psrc[0] - 2U) <= length) ? ((uint16_t)psrc[0] - 2U) : length);
8008632: 68fb ldr r3, [r7, #12]
8008634: 781b ldrb r3, [r3, #0]
8008636: 1e9a subs r2, r3, #2
8008638: 88fb ldrh r3, [r7, #6]
800863a: 4293 cmp r3, r2
800863c: bf28 it cs
800863e: 4613 movcs r3, r2
8008640: 82bb strh r3, [r7, #20]
/* Adjust the offset ignoring the String Len and Descriptor type */
psrc += 2U;
8008642: 68fb ldr r3, [r7, #12]
8008644: 3302 adds r3, #2
8008646: 60fb str r3, [r7, #12]
for (idx = 0U; idx < strlength; idx += 2U)
8008648: 2300 movs r3, #0
800864a: 82fb strh r3, [r7, #22]
800864c: e00b b.n 8008666 <USBH_ParseStringDesc+0x4c>
{
/* Copy Only the string and ignore the UNICODE ID, hence add the src */
*pdest = psrc[idx];
800864e: 8afb ldrh r3, [r7, #22]
8008650: 68fa ldr r2, [r7, #12]
8008652: 4413 add r3, r2
8008654: 781a ldrb r2, [r3, #0]
8008656: 68bb ldr r3, [r7, #8]
8008658: 701a strb r2, [r3, #0]
pdest++;
800865a: 68bb ldr r3, [r7, #8]
800865c: 3301 adds r3, #1
800865e: 60bb str r3, [r7, #8]
for (idx = 0U; idx < strlength; idx += 2U)
8008660: 8afb ldrh r3, [r7, #22]
8008662: 3302 adds r3, #2
8008664: 82fb strh r3, [r7, #22]
8008666: 8afa ldrh r2, [r7, #22]
8008668: 8abb ldrh r3, [r7, #20]
800866a: 429a cmp r2, r3
800866c: d3ef bcc.n 800864e <USBH_ParseStringDesc+0x34>
}
*pdest = 0U; /* mark end of string */
800866e: 68bb ldr r3, [r7, #8]
8008670: 2200 movs r2, #0
8008672: 701a strb r2, [r3, #0]
}
}
8008674: bf00 nop
8008676: 371c adds r7, #28
8008678: 46bd mov sp, r7
800867a: f85d 7b04 ldr.w r7, [sp], #4
800867e: 4770 bx lr
08008680 <USBH_GetNextDesc>:
* @param buf: Buffer where the cfg descriptor is available
* @param ptr: data pointer inside the cfg descriptor
* @retval next header
*/
USBH_DescHeader_t *USBH_GetNextDesc(uint8_t *pbuf, uint16_t *ptr)
{
8008680: b480 push {r7}
8008682: b085 sub sp, #20
8008684: af00 add r7, sp, #0
8008686: 6078 str r0, [r7, #4]
8008688: 6039 str r1, [r7, #0]
USBH_DescHeader_t *pnext;
*ptr += ((USBH_DescHeader_t *)(void *)pbuf)->bLength;
800868a: 683b ldr r3, [r7, #0]
800868c: 881a ldrh r2, [r3, #0]
800868e: 687b ldr r3, [r7, #4]
8008690: 781b ldrb r3, [r3, #0]
8008692: b29b uxth r3, r3
8008694: 4413 add r3, r2
8008696: b29a uxth r2, r3
8008698: 683b ldr r3, [r7, #0]
800869a: 801a strh r2, [r3, #0]
pnext = (USBH_DescHeader_t *)(void *)((uint8_t *)(void *)pbuf + \
((USBH_DescHeader_t *)(void *)pbuf)->bLength);
800869c: 687b ldr r3, [r7, #4]
800869e: 781b ldrb r3, [r3, #0]
80086a0: 461a mov r2, r3
pnext = (USBH_DescHeader_t *)(void *)((uint8_t *)(void *)pbuf + \
80086a2: 687b ldr r3, [r7, #4]
80086a4: 4413 add r3, r2
80086a6: 60fb str r3, [r7, #12]
return (pnext);
80086a8: 68fb ldr r3, [r7, #12]
}
80086aa: 4618 mov r0, r3
80086ac: 3714 adds r7, #20
80086ae: 46bd mov sp, r7
80086b0: f85d 7b04 ldr.w r7, [sp], #4
80086b4: 4770 bx lr
080086b6 <USBH_CtlReq>:
* @param length: length of the response
* @retval USBH Status
*/
USBH_StatusTypeDef USBH_CtlReq(USBH_HandleTypeDef *phost, uint8_t *buff,
uint16_t length)
{
80086b6: b580 push {r7, lr}
80086b8: b086 sub sp, #24
80086ba: af00 add r7, sp, #0
80086bc: 60f8 str r0, [r7, #12]
80086be: 60b9 str r1, [r7, #8]
80086c0: 4613 mov r3, r2
80086c2: 80fb strh r3, [r7, #6]
USBH_StatusTypeDef status;
status = USBH_BUSY;
80086c4: 2301 movs r3, #1
80086c6: 75fb strb r3, [r7, #23]
switch (phost->RequestState)
80086c8: 68fb ldr r3, [r7, #12]
80086ca: 789b ldrb r3, [r3, #2]
80086cc: 2b01 cmp r3, #1
80086ce: d002 beq.n 80086d6 <USBH_CtlReq+0x20>
80086d0: 2b02 cmp r3, #2
80086d2: d00f beq.n 80086f4 <USBH_CtlReq+0x3e>
#endif
#endif
break;
default:
break;
80086d4: e027 b.n 8008726 <USBH_CtlReq+0x70>
phost->Control.buff = buff;
80086d6: 68fb ldr r3, [r7, #12]
80086d8: 68ba ldr r2, [r7, #8]
80086da: 609a str r2, [r3, #8]
phost->Control.length = length;
80086dc: 68fb ldr r3, [r7, #12]
80086de: 88fa ldrh r2, [r7, #6]
80086e0: 819a strh r2, [r3, #12]
phost->Control.state = CTRL_SETUP;
80086e2: 68fb ldr r3, [r7, #12]
80086e4: 2201 movs r2, #1
80086e6: 761a strb r2, [r3, #24]
phost->RequestState = CMD_WAIT;
80086e8: 68fb ldr r3, [r7, #12]
80086ea: 2202 movs r2, #2
80086ec: 709a strb r2, [r3, #2]
status = USBH_BUSY;
80086ee: 2301 movs r3, #1
80086f0: 75fb strb r3, [r7, #23]
break;
80086f2: e018 b.n 8008726 <USBH_CtlReq+0x70>
status = USBH_HandleControl(phost);
80086f4: 68f8 ldr r0, [r7, #12]
80086f6: f000 f81b bl 8008730 <USBH_HandleControl>
80086fa: 4603 mov r3, r0
80086fc: 75fb strb r3, [r7, #23]
if ((status == USBH_OK) || (status == USBH_NOT_SUPPORTED))
80086fe: 7dfb ldrb r3, [r7, #23]
8008700: 2b00 cmp r3, #0
8008702: d002 beq.n 800870a <USBH_CtlReq+0x54>
8008704: 7dfb ldrb r3, [r7, #23]
8008706: 2b03 cmp r3, #3
8008708: d106 bne.n 8008718 <USBH_CtlReq+0x62>
phost->RequestState = CMD_SEND;
800870a: 68fb ldr r3, [r7, #12]
800870c: 2201 movs r2, #1
800870e: 709a strb r2, [r3, #2]
phost->Control.state = CTRL_IDLE;
8008710: 68fb ldr r3, [r7, #12]
8008712: 2200 movs r2, #0
8008714: 761a strb r2, [r3, #24]
break;
8008716: e005 b.n 8008724 <USBH_CtlReq+0x6e>
else if (status == USBH_FAIL)
8008718: 7dfb ldrb r3, [r7, #23]
800871a: 2b02 cmp r3, #2
800871c: d102 bne.n 8008724 <USBH_CtlReq+0x6e>
phost->RequestState = CMD_SEND;
800871e: 68fb ldr r3, [r7, #12]
8008720: 2201 movs r2, #1
8008722: 709a strb r2, [r3, #2]
break;
8008724: bf00 nop
}
return status;
8008726: 7dfb ldrb r3, [r7, #23]
}
8008728: 4618 mov r0, r3
800872a: 3718 adds r7, #24
800872c: 46bd mov sp, r7
800872e: bd80 pop {r7, pc}
08008730 <USBH_HandleControl>:
* Handles the USB control transfer state machine
* @param phost: Host Handle
* @retval USBH Status
*/
static USBH_StatusTypeDef USBH_HandleControl(USBH_HandleTypeDef *phost)
{
8008730: b580 push {r7, lr}
8008732: b086 sub sp, #24
8008734: af02 add r7, sp, #8
8008736: 6078 str r0, [r7, #4]
uint8_t direction;
USBH_StatusTypeDef status = USBH_BUSY;
8008738: 2301 movs r3, #1
800873a: 73fb strb r3, [r7, #15]
USBH_URBStateTypeDef URB_Status = USBH_URB_IDLE;
800873c: 2300 movs r3, #0
800873e: 73bb strb r3, [r7, #14]
switch (phost->Control.state)
8008740: 687b ldr r3, [r7, #4]
8008742: 7e1b ldrb r3, [r3, #24]
8008744: 3b01 subs r3, #1
8008746: 2b0a cmp r3, #10
8008748: f200 8158 bhi.w 80089fc <USBH_HandleControl+0x2cc>
800874c: a201 add r2, pc, #4 ; (adr r2, 8008754 <USBH_HandleControl+0x24>)
800874e: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8008752: bf00 nop
8008754: 08008781 .word 0x08008781
8008758: 0800879b .word 0x0800879b
800875c: 08008805 .word 0x08008805
8008760: 0800882b .word 0x0800882b
8008764: 08008863 .word 0x08008863
8008768: 0800888f .word 0x0800888f
800876c: 080088e1 .word 0x080088e1
8008770: 08008903 .word 0x08008903
8008774: 0800893f .word 0x0800893f
8008778: 08008967 .word 0x08008967
800877c: 080089a5 .word 0x080089a5
{
case CTRL_SETUP:
/* send a SETUP packet */
USBH_CtlSendSetup(phost, (uint8_t *)(void *)phost->Control.setup.d8,
8008780: 687b ldr r3, [r7, #4]
8008782: f103 0110 add.w r1, r3, #16
8008786: 687b ldr r3, [r7, #4]
8008788: 795b ldrb r3, [r3, #5]
800878a: 461a mov r2, r3
800878c: 6878 ldr r0, [r7, #4]
800878e: f000 f945 bl 8008a1c <USBH_CtlSendSetup>
phost->Control.pipe_out);
phost->Control.state = CTRL_SETUP_WAIT;
8008792: 687b ldr r3, [r7, #4]
8008794: 2202 movs r2, #2
8008796: 761a strb r2, [r3, #24]
break;
8008798: e13b b.n 8008a12 <USBH_HandleControl+0x2e2>
case CTRL_SETUP_WAIT:
URB_Status = USBH_LL_GetURBState(phost, phost->Control.pipe_out);
800879a: 687b ldr r3, [r7, #4]
800879c: 795b ldrb r3, [r3, #5]
800879e: 4619 mov r1, r3
80087a0: 6878 ldr r0, [r7, #4]
80087a2: f000 fcc5 bl 8009130 <USBH_LL_GetURBState>
80087a6: 4603 mov r3, r0
80087a8: 73bb strb r3, [r7, #14]
/* case SETUP packet sent successfully */
if (URB_Status == USBH_URB_DONE)
80087aa: 7bbb ldrb r3, [r7, #14]
80087ac: 2b01 cmp r3, #1
80087ae: d11e bne.n 80087ee <USBH_HandleControl+0xbe>
{
direction = (phost->Control.setup.b.bmRequestType & USB_REQ_DIR_MASK);
80087b0: 687b ldr r3, [r7, #4]
80087b2: 7c1b ldrb r3, [r3, #16]
80087b4: f023 037f bic.w r3, r3, #127 ; 0x7f
80087b8: 737b strb r3, [r7, #13]
/* check if there is a data stage */
if (phost->Control.setup.b.wLength.w != 0U)
80087ba: 687b ldr r3, [r7, #4]
80087bc: 8adb ldrh r3, [r3, #22]
80087be: 2b00 cmp r3, #0
80087c0: d00a beq.n 80087d8 <USBH_HandleControl+0xa8>
{
if (direction == USB_D2H)
80087c2: 7b7b ldrb r3, [r7, #13]
80087c4: 2b80 cmp r3, #128 ; 0x80
80087c6: d103 bne.n 80087d0 <USBH_HandleControl+0xa0>
{
/* Data Direction is IN */
phost->Control.state = CTRL_DATA_IN;
80087c8: 687b ldr r3, [r7, #4]
80087ca: 2203 movs r2, #3
80087cc: 761a strb r2, [r3, #24]
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
#endif
#endif
}
}
break;
80087ce: e117 b.n 8008a00 <USBH_HandleControl+0x2d0>
phost->Control.state = CTRL_DATA_OUT;
80087d0: 687b ldr r3, [r7, #4]
80087d2: 2205 movs r2, #5
80087d4: 761a strb r2, [r3, #24]
break;
80087d6: e113 b.n 8008a00 <USBH_HandleControl+0x2d0>
if (direction == USB_D2H)
80087d8: 7b7b ldrb r3, [r7, #13]
80087da: 2b80 cmp r3, #128 ; 0x80
80087dc: d103 bne.n 80087e6 <USBH_HandleControl+0xb6>
phost->Control.state = CTRL_STATUS_OUT;
80087de: 687b ldr r3, [r7, #4]
80087e0: 2209 movs r2, #9
80087e2: 761a strb r2, [r3, #24]
break;
80087e4: e10c b.n 8008a00 <USBH_HandleControl+0x2d0>
phost->Control.state = CTRL_STATUS_IN;
80087e6: 687b ldr r3, [r7, #4]
80087e8: 2207 movs r2, #7
80087ea: 761a strb r2, [r3, #24]
break;
80087ec: e108 b.n 8008a00 <USBH_HandleControl+0x2d0>
if ((URB_Status == USBH_URB_ERROR) || (URB_Status == USBH_URB_NOTREADY))
80087ee: 7bbb ldrb r3, [r7, #14]
80087f0: 2b04 cmp r3, #4
80087f2: d003 beq.n 80087fc <USBH_HandleControl+0xcc>
80087f4: 7bbb ldrb r3, [r7, #14]
80087f6: 2b02 cmp r3, #2
80087f8: f040 8102 bne.w 8008a00 <USBH_HandleControl+0x2d0>
phost->Control.state = CTRL_ERROR;
80087fc: 687b ldr r3, [r7, #4]
80087fe: 220b movs r2, #11
8008800: 761a strb r2, [r3, #24]
break;
8008802: e0fd b.n 8008a00 <USBH_HandleControl+0x2d0>
case CTRL_DATA_IN:
/* Issue an IN token */
phost->Control.timer = (uint16_t)phost->Timer;
8008804: 687b ldr r3, [r7, #4]
8008806: f8d3 33c4 ldr.w r3, [r3, #964] ; 0x3c4
800880a: b29a uxth r2, r3
800880c: 687b ldr r3, [r7, #4]
800880e: 81da strh r2, [r3, #14]
USBH_CtlReceiveData(phost, phost->Control.buff, phost->Control.length,
8008810: 687b ldr r3, [r7, #4]
8008812: 6899 ldr r1, [r3, #8]
8008814: 687b ldr r3, [r7, #4]
8008816: 899a ldrh r2, [r3, #12]
8008818: 687b ldr r3, [r7, #4]
800881a: 791b ldrb r3, [r3, #4]
800881c: 6878 ldr r0, [r7, #4]
800881e: f000 f93c bl 8008a9a <USBH_CtlReceiveData>
phost->Control.pipe_in);
phost->Control.state = CTRL_DATA_IN_WAIT;
8008822: 687b ldr r3, [r7, #4]
8008824: 2204 movs r2, #4
8008826: 761a strb r2, [r3, #24]
break;
8008828: e0f3 b.n 8008a12 <USBH_HandleControl+0x2e2>
case CTRL_DATA_IN_WAIT:
URB_Status = USBH_LL_GetURBState(phost, phost->Control.pipe_in);
800882a: 687b ldr r3, [r7, #4]
800882c: 791b ldrb r3, [r3, #4]
800882e: 4619 mov r1, r3
8008830: 6878 ldr r0, [r7, #4]
8008832: f000 fc7d bl 8009130 <USBH_LL_GetURBState>
8008836: 4603 mov r3, r0
8008838: 73bb strb r3, [r7, #14]
/* check is DATA packet transferred successfully */
if (URB_Status == USBH_URB_DONE)
800883a: 7bbb ldrb r3, [r7, #14]
800883c: 2b01 cmp r3, #1
800883e: d102 bne.n 8008846 <USBH_HandleControl+0x116>
{
phost->Control.state = CTRL_STATUS_OUT;
8008840: 687b ldr r3, [r7, #4]
8008842: 2209 movs r2, #9
8008844: 761a strb r2, [r3, #24]
#endif
#endif
}
/* manage error cases*/
if (URB_Status == USBH_URB_STALL)
8008846: 7bbb ldrb r3, [r7, #14]
8008848: 2b05 cmp r3, #5
800884a: d102 bne.n 8008852 <USBH_HandleControl+0x122>
{
/* In stall case, return to previous machine state*/
status = USBH_NOT_SUPPORTED;
800884c: 2303 movs r3, #3
800884e: 73fb strb r3, [r7, #15]
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
#endif
#endif
}
}
break;
8008850: e0d8 b.n 8008a04 <USBH_HandleControl+0x2d4>
if (URB_Status == USBH_URB_ERROR)
8008852: 7bbb ldrb r3, [r7, #14]
8008854: 2b04 cmp r3, #4
8008856: f040 80d5 bne.w 8008a04 <USBH_HandleControl+0x2d4>
phost->Control.state = CTRL_ERROR;
800885a: 687b ldr r3, [r7, #4]
800885c: 220b movs r2, #11
800885e: 761a strb r2, [r3, #24]
break;
8008860: e0d0 b.n 8008a04 <USBH_HandleControl+0x2d4>
case CTRL_DATA_OUT:
USBH_CtlSendData(phost, phost->Control.buff, phost->Control.length,
8008862: 687b ldr r3, [r7, #4]
8008864: 6899 ldr r1, [r3, #8]
8008866: 687b ldr r3, [r7, #4]
8008868: 899a ldrh r2, [r3, #12]
800886a: 687b ldr r3, [r7, #4]
800886c: 7958 ldrb r0, [r3, #5]
800886e: 2301 movs r3, #1
8008870: 9300 str r3, [sp, #0]
8008872: 4603 mov r3, r0
8008874: 6878 ldr r0, [r7, #4]
8008876: f000 f8eb bl 8008a50 <USBH_CtlSendData>
phost->Control.pipe_out, 1U);
phost->Control.timer = (uint16_t)phost->Timer;
800887a: 687b ldr r3, [r7, #4]
800887c: f8d3 33c4 ldr.w r3, [r3, #964] ; 0x3c4
8008880: b29a uxth r2, r3
8008882: 687b ldr r3, [r7, #4]
8008884: 81da strh r2, [r3, #14]
phost->Control.state = CTRL_DATA_OUT_WAIT;
8008886: 687b ldr r3, [r7, #4]
8008888: 2206 movs r2, #6
800888a: 761a strb r2, [r3, #24]
break;
800888c: e0c1 b.n 8008a12 <USBH_HandleControl+0x2e2>
case CTRL_DATA_OUT_WAIT:
URB_Status = USBH_LL_GetURBState(phost, phost->Control.pipe_out);
800888e: 687b ldr r3, [r7, #4]
8008890: 795b ldrb r3, [r3, #5]
8008892: 4619 mov r1, r3
8008894: 6878 ldr r0, [r7, #4]
8008896: f000 fc4b bl 8009130 <USBH_LL_GetURBState>
800889a: 4603 mov r3, r0
800889c: 73bb strb r3, [r7, #14]
if (URB_Status == USBH_URB_DONE)
800889e: 7bbb ldrb r3, [r7, #14]
80088a0: 2b01 cmp r3, #1
80088a2: d103 bne.n 80088ac <USBH_HandleControl+0x17c>
{
/* If the Setup Pkt is sent successful, then change the state */
phost->Control.state = CTRL_STATUS_IN;
80088a4: 687b ldr r3, [r7, #4]
80088a6: 2207 movs r2, #7
80088a8: 761a strb r2, [r3, #24]
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
#endif
#endif
}
}
break;
80088aa: e0ad b.n 8008a08 <USBH_HandleControl+0x2d8>
else if (URB_Status == USBH_URB_STALL)
80088ac: 7bbb ldrb r3, [r7, #14]
80088ae: 2b05 cmp r3, #5
80088b0: d105 bne.n 80088be <USBH_HandleControl+0x18e>
phost->Control.state = CTRL_STALLED;
80088b2: 687b ldr r3, [r7, #4]
80088b4: 220c movs r2, #12
80088b6: 761a strb r2, [r3, #24]
status = USBH_NOT_SUPPORTED;
80088b8: 2303 movs r3, #3
80088ba: 73fb strb r3, [r7, #15]
break;
80088bc: e0a4 b.n 8008a08 <USBH_HandleControl+0x2d8>
else if (URB_Status == USBH_URB_NOTREADY)
80088be: 7bbb ldrb r3, [r7, #14]
80088c0: 2b02 cmp r3, #2
80088c2: d103 bne.n 80088cc <USBH_HandleControl+0x19c>
phost->Control.state = CTRL_DATA_OUT;
80088c4: 687b ldr r3, [r7, #4]
80088c6: 2205 movs r2, #5
80088c8: 761a strb r2, [r3, #24]
break;
80088ca: e09d b.n 8008a08 <USBH_HandleControl+0x2d8>
if (URB_Status == USBH_URB_ERROR)
80088cc: 7bbb ldrb r3, [r7, #14]
80088ce: 2b04 cmp r3, #4
80088d0: f040 809a bne.w 8008a08 <USBH_HandleControl+0x2d8>
phost->Control.state = CTRL_ERROR;
80088d4: 687b ldr r3, [r7, #4]
80088d6: 220b movs r2, #11
80088d8: 761a strb r2, [r3, #24]
status = USBH_FAIL;
80088da: 2302 movs r3, #2
80088dc: 73fb strb r3, [r7, #15]
break;
80088de: e093 b.n 8008a08 <USBH_HandleControl+0x2d8>
case CTRL_STATUS_IN:
/* Send 0 bytes out packet */
USBH_CtlReceiveData(phost, 0U, 0U, phost->Control.pipe_in);
80088e0: 687b ldr r3, [r7, #4]
80088e2: 791b ldrb r3, [r3, #4]
80088e4: 2200 movs r2, #0
80088e6: 2100 movs r1, #0
80088e8: 6878 ldr r0, [r7, #4]
80088ea: f000 f8d6 bl 8008a9a <USBH_CtlReceiveData>
phost->Control.timer = (uint16_t)phost->Timer;
80088ee: 687b ldr r3, [r7, #4]
80088f0: f8d3 33c4 ldr.w r3, [r3, #964] ; 0x3c4
80088f4: b29a uxth r2, r3
80088f6: 687b ldr r3, [r7, #4]
80088f8: 81da strh r2, [r3, #14]
phost->Control.state = CTRL_STATUS_IN_WAIT;
80088fa: 687b ldr r3, [r7, #4]
80088fc: 2208 movs r2, #8
80088fe: 761a strb r2, [r3, #24]
break;
8008900: e087 b.n 8008a12 <USBH_HandleControl+0x2e2>
case CTRL_STATUS_IN_WAIT:
URB_Status = USBH_LL_GetURBState(phost, phost->Control.pipe_in);
8008902: 687b ldr r3, [r7, #4]
8008904: 791b ldrb r3, [r3, #4]
8008906: 4619 mov r1, r3
8008908: 6878 ldr r0, [r7, #4]
800890a: f000 fc11 bl 8009130 <USBH_LL_GetURBState>
800890e: 4603 mov r3, r0
8008910: 73bb strb r3, [r7, #14]
if (URB_Status == USBH_URB_DONE)
8008912: 7bbb ldrb r3, [r7, #14]
8008914: 2b01 cmp r3, #1
8008916: d105 bne.n 8008924 <USBH_HandleControl+0x1f4>
{
/* Control transfers completed, Exit the State Machine */
phost->Control.state = CTRL_COMPLETE;
8008918: 687b ldr r3, [r7, #4]
800891a: 220d movs r2, #13
800891c: 761a strb r2, [r3, #24]
status = USBH_OK;
800891e: 2300 movs r3, #0
8008920: 73fb strb r3, [r7, #15]
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
#endif
#endif
}
}
break;
8008922: e073 b.n 8008a0c <USBH_HandleControl+0x2dc>
else if (URB_Status == USBH_URB_ERROR)
8008924: 7bbb ldrb r3, [r7, #14]
8008926: 2b04 cmp r3, #4
8008928: d103 bne.n 8008932 <USBH_HandleControl+0x202>
phost->Control.state = CTRL_ERROR;
800892a: 687b ldr r3, [r7, #4]
800892c: 220b movs r2, #11
800892e: 761a strb r2, [r3, #24]
break;
8008930: e06c b.n 8008a0c <USBH_HandleControl+0x2dc>
if (URB_Status == USBH_URB_STALL)
8008932: 7bbb ldrb r3, [r7, #14]
8008934: 2b05 cmp r3, #5
8008936: d169 bne.n 8008a0c <USBH_HandleControl+0x2dc>
status = USBH_NOT_SUPPORTED;
8008938: 2303 movs r3, #3
800893a: 73fb strb r3, [r7, #15]
break;
800893c: e066 b.n 8008a0c <USBH_HandleControl+0x2dc>
case CTRL_STATUS_OUT:
USBH_CtlSendData(phost, 0U, 0U, phost->Control.pipe_out, 1U);
800893e: 687b ldr r3, [r7, #4]
8008940: 795a ldrb r2, [r3, #5]
8008942: 2301 movs r3, #1
8008944: 9300 str r3, [sp, #0]
8008946: 4613 mov r3, r2
8008948: 2200 movs r2, #0
800894a: 2100 movs r1, #0
800894c: 6878 ldr r0, [r7, #4]
800894e: f000 f87f bl 8008a50 <USBH_CtlSendData>
phost->Control.timer = (uint16_t)phost->Timer;
8008952: 687b ldr r3, [r7, #4]
8008954: f8d3 33c4 ldr.w r3, [r3, #964] ; 0x3c4
8008958: b29a uxth r2, r3
800895a: 687b ldr r3, [r7, #4]
800895c: 81da strh r2, [r3, #14]
phost->Control.state = CTRL_STATUS_OUT_WAIT;
800895e: 687b ldr r3, [r7, #4]
8008960: 220a movs r2, #10
8008962: 761a strb r2, [r3, #24]
break;
8008964: e055 b.n 8008a12 <USBH_HandleControl+0x2e2>
case CTRL_STATUS_OUT_WAIT:
URB_Status = USBH_LL_GetURBState(phost, phost->Control.pipe_out);
8008966: 687b ldr r3, [r7, #4]
8008968: 795b ldrb r3, [r3, #5]
800896a: 4619 mov r1, r3
800896c: 6878 ldr r0, [r7, #4]
800896e: f000 fbdf bl 8009130 <USBH_LL_GetURBState>
8008972: 4603 mov r3, r0
8008974: 73bb strb r3, [r7, #14]
if (URB_Status == USBH_URB_DONE)
8008976: 7bbb ldrb r3, [r7, #14]
8008978: 2b01 cmp r3, #1
800897a: d105 bne.n 8008988 <USBH_HandleControl+0x258>
{
status = USBH_OK;
800897c: 2300 movs r3, #0
800897e: 73fb strb r3, [r7, #15]
phost->Control.state = CTRL_COMPLETE;
8008980: 687b ldr r3, [r7, #4]
8008982: 220d movs r2, #13
8008984: 761a strb r2, [r3, #24]
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
#endif
#endif
}
}
break;
8008986: e043 b.n 8008a10 <USBH_HandleControl+0x2e0>
else if (URB_Status == USBH_URB_NOTREADY)
8008988: 7bbb ldrb r3, [r7, #14]
800898a: 2b02 cmp r3, #2
800898c: d103 bne.n 8008996 <USBH_HandleControl+0x266>
phost->Control.state = CTRL_STATUS_OUT;
800898e: 687b ldr r3, [r7, #4]
8008990: 2209 movs r2, #9
8008992: 761a strb r2, [r3, #24]
break;
8008994: e03c b.n 8008a10 <USBH_HandleControl+0x2e0>
if (URB_Status == USBH_URB_ERROR)
8008996: 7bbb ldrb r3, [r7, #14]
8008998: 2b04 cmp r3, #4
800899a: d139 bne.n 8008a10 <USBH_HandleControl+0x2e0>
phost->Control.state = CTRL_ERROR;
800899c: 687b ldr r3, [r7, #4]
800899e: 220b movs r2, #11
80089a0: 761a strb r2, [r3, #24]
break;
80089a2: e035 b.n 8008a10 <USBH_HandleControl+0x2e0>
PID; i.e., recovery actions via some other pipe are not required for control
endpoints. For the Default Control Pipe, a device reset will ultimately be
required to clear the halt or error condition if the next Setup PID is not
accepted.
*/
if (++phost->Control.errorcount <= USBH_MAX_ERROR_COUNT)
80089a4: 687b ldr r3, [r7, #4]
80089a6: 7e5b ldrb r3, [r3, #25]
80089a8: 3301 adds r3, #1
80089aa: b2da uxtb r2, r3
80089ac: 687b ldr r3, [r7, #4]
80089ae: 765a strb r2, [r3, #25]
80089b0: 687b ldr r3, [r7, #4]
80089b2: 7e5b ldrb r3, [r3, #25]
80089b4: 2b02 cmp r3, #2
80089b6: d806 bhi.n 80089c6 <USBH_HandleControl+0x296>
{
/* Do the transmission again, starting from SETUP Packet */
phost->Control.state = CTRL_SETUP;
80089b8: 687b ldr r3, [r7, #4]
80089ba: 2201 movs r2, #1
80089bc: 761a strb r2, [r3, #24]
phost->RequestState = CMD_SEND;
80089be: 687b ldr r3, [r7, #4]
80089c0: 2201 movs r2, #1
80089c2: 709a strb r2, [r3, #2]
USBH_FreePipe(phost, phost->Control.pipe_in);
phost->gState = HOST_IDLE;
status = USBH_FAIL;
}
break;
80089c4: e025 b.n 8008a12 <USBH_HandleControl+0x2e2>
phost->pUser(phost, HOST_USER_UNRECOVERED_ERROR);
80089c6: 687b ldr r3, [r7, #4]
80089c8: f8d3 33d4 ldr.w r3, [r3, #980] ; 0x3d4
80089cc: 2106 movs r1, #6
80089ce: 6878 ldr r0, [r7, #4]
80089d0: 4798 blx r3
phost->Control.errorcount = 0U;
80089d2: 687b ldr r3, [r7, #4]
80089d4: 2200 movs r2, #0
80089d6: 765a strb r2, [r3, #25]
USBH_FreePipe(phost, phost->Control.pipe_out);
80089d8: 687b ldr r3, [r7, #4]
80089da: 795b ldrb r3, [r3, #5]
80089dc: 4619 mov r1, r3
80089de: 6878 ldr r0, [r7, #4]
80089e0: f000 f90c bl 8008bfc <USBH_FreePipe>
USBH_FreePipe(phost, phost->Control.pipe_in);
80089e4: 687b ldr r3, [r7, #4]
80089e6: 791b ldrb r3, [r3, #4]
80089e8: 4619 mov r1, r3
80089ea: 6878 ldr r0, [r7, #4]
80089ec: f000 f906 bl 8008bfc <USBH_FreePipe>
phost->gState = HOST_IDLE;
80089f0: 687b ldr r3, [r7, #4]
80089f2: 2200 movs r2, #0
80089f4: 701a strb r2, [r3, #0]
status = USBH_FAIL;
80089f6: 2302 movs r3, #2
80089f8: 73fb strb r3, [r7, #15]
break;
80089fa: e00a b.n 8008a12 <USBH_HandleControl+0x2e2>
default:
break;
80089fc: bf00 nop
80089fe: e008 b.n 8008a12 <USBH_HandleControl+0x2e2>
break;
8008a00: bf00 nop
8008a02: e006 b.n 8008a12 <USBH_HandleControl+0x2e2>
break;
8008a04: bf00 nop
8008a06: e004 b.n 8008a12 <USBH_HandleControl+0x2e2>
break;
8008a08: bf00 nop
8008a0a: e002 b.n 8008a12 <USBH_HandleControl+0x2e2>
break;
8008a0c: bf00 nop
8008a0e: e000 b.n 8008a12 <USBH_HandleControl+0x2e2>
break;
8008a10: bf00 nop
}
return status;
8008a12: 7bfb ldrb r3, [r7, #15]
}
8008a14: 4618 mov r0, r3
8008a16: 3710 adds r7, #16
8008a18: 46bd mov sp, r7
8008a1a: bd80 pop {r7, pc}
08008a1c <USBH_CtlSendSetup>:
* @retval USBH Status
*/
USBH_StatusTypeDef USBH_CtlSendSetup(USBH_HandleTypeDef *phost,
uint8_t *buff,
uint8_t pipe_num)
{
8008a1c: b580 push {r7, lr}
8008a1e: b088 sub sp, #32
8008a20: af04 add r7, sp, #16
8008a22: 60f8 str r0, [r7, #12]
8008a24: 60b9 str r1, [r7, #8]
8008a26: 4613 mov r3, r2
8008a28: 71fb strb r3, [r7, #7]
USBH_LL_SubmitURB(phost, /* Driver handle */
8008a2a: 79f9 ldrb r1, [r7, #7]
8008a2c: 2300 movs r3, #0
8008a2e: 9303 str r3, [sp, #12]
8008a30: 2308 movs r3, #8
8008a32: 9302 str r3, [sp, #8]
8008a34: 68bb ldr r3, [r7, #8]
8008a36: 9301 str r3, [sp, #4]
8008a38: 2300 movs r3, #0
8008a3a: 9300 str r3, [sp, #0]
8008a3c: 2300 movs r3, #0
8008a3e: 2200 movs r2, #0
8008a40: 68f8 ldr r0, [r7, #12]
8008a42: f000 fb44 bl 80090ce <USBH_LL_SubmitURB>
USBH_EP_CONTROL, /* EP type */
USBH_PID_SETUP, /* Type setup */
buff, /* data buffer */
USBH_SETUP_PKT_SIZE, /* data length */
0U);
return USBH_OK;
8008a46: 2300 movs r3, #0
}
8008a48: 4618 mov r0, r3
8008a4a: 3710 adds r7, #16
8008a4c: 46bd mov sp, r7
8008a4e: bd80 pop {r7, pc}
08008a50 <USBH_CtlSendData>:
USBH_StatusTypeDef USBH_CtlSendData(USBH_HandleTypeDef *phost,
uint8_t *buff,
uint16_t length,
uint8_t pipe_num,
uint8_t do_ping)
{
8008a50: b580 push {r7, lr}
8008a52: b088 sub sp, #32
8008a54: af04 add r7, sp, #16
8008a56: 60f8 str r0, [r7, #12]
8008a58: 60b9 str r1, [r7, #8]
8008a5a: 4611 mov r1, r2
8008a5c: 461a mov r2, r3
8008a5e: 460b mov r3, r1
8008a60: 80fb strh r3, [r7, #6]
8008a62: 4613 mov r3, r2
8008a64: 717b strb r3, [r7, #5]
if (phost->device.speed != USBH_SPEED_HIGH)
8008a66: 68fb ldr r3, [r7, #12]
8008a68: f893 331d ldrb.w r3, [r3, #797] ; 0x31d
8008a6c: 2b00 cmp r3, #0
8008a6e: d001 beq.n 8008a74 <USBH_CtlSendData+0x24>
{
do_ping = 0U;
8008a70: 2300 movs r3, #0
8008a72: 763b strb r3, [r7, #24]
}
USBH_LL_SubmitURB(phost, /* Driver handle */
8008a74: 7979 ldrb r1, [r7, #5]
8008a76: 7e3b ldrb r3, [r7, #24]
8008a78: 9303 str r3, [sp, #12]
8008a7a: 88fb ldrh r3, [r7, #6]
8008a7c: 9302 str r3, [sp, #8]
8008a7e: 68bb ldr r3, [r7, #8]
8008a80: 9301 str r3, [sp, #4]
8008a82: 2301 movs r3, #1
8008a84: 9300 str r3, [sp, #0]
8008a86: 2300 movs r3, #0
8008a88: 2200 movs r2, #0
8008a8a: 68f8 ldr r0, [r7, #12]
8008a8c: f000 fb1f bl 80090ce <USBH_LL_SubmitURB>
USBH_PID_DATA, /* Type Data */
buff, /* data buffer */
length, /* data length */
do_ping); /* do ping (HS Only)*/
return USBH_OK;
8008a90: 2300 movs r3, #0
}
8008a92: 4618 mov r0, r3
8008a94: 3710 adds r7, #16
8008a96: 46bd mov sp, r7
8008a98: bd80 pop {r7, pc}
08008a9a <USBH_CtlReceiveData>:
*/
USBH_StatusTypeDef USBH_CtlReceiveData(USBH_HandleTypeDef *phost,
uint8_t *buff,
uint16_t length,
uint8_t pipe_num)
{
8008a9a: b580 push {r7, lr}
8008a9c: b088 sub sp, #32
8008a9e: af04 add r7, sp, #16
8008aa0: 60f8 str r0, [r7, #12]
8008aa2: 60b9 str r1, [r7, #8]
8008aa4: 4611 mov r1, r2
8008aa6: 461a mov r2, r3
8008aa8: 460b mov r3, r1
8008aaa: 80fb strh r3, [r7, #6]
8008aac: 4613 mov r3, r2
8008aae: 717b strb r3, [r7, #5]
USBH_LL_SubmitURB(phost, /* Driver handle */
8008ab0: 7979 ldrb r1, [r7, #5]
8008ab2: 2300 movs r3, #0
8008ab4: 9303 str r3, [sp, #12]
8008ab6: 88fb ldrh r3, [r7, #6]
8008ab8: 9302 str r3, [sp, #8]
8008aba: 68bb ldr r3, [r7, #8]
8008abc: 9301 str r3, [sp, #4]
8008abe: 2301 movs r3, #1
8008ac0: 9300 str r3, [sp, #0]
8008ac2: 2300 movs r3, #0
8008ac4: 2201 movs r2, #1
8008ac6: 68f8 ldr r0, [r7, #12]
8008ac8: f000 fb01 bl 80090ce <USBH_LL_SubmitURB>
USBH_EP_CONTROL, /* EP type */
USBH_PID_DATA, /* Type Data */
buff, /* data buffer */
length, /* data length */
0U);
return USBH_OK;
8008acc: 2300 movs r3, #0
}
8008ace: 4618 mov r0, r3
8008ad0: 3710 adds r7, #16
8008ad2: 46bd mov sp, r7
8008ad4: bd80 pop {r7, pc}
08008ad6 <USBH_BulkSendData>:
USBH_StatusTypeDef USBH_BulkSendData(USBH_HandleTypeDef *phost,
uint8_t *buff,
uint16_t length,
uint8_t pipe_num,
uint8_t do_ping)
{
8008ad6: b580 push {r7, lr}
8008ad8: b088 sub sp, #32
8008ada: af04 add r7, sp, #16
8008adc: 60f8 str r0, [r7, #12]
8008ade: 60b9 str r1, [r7, #8]
8008ae0: 4611 mov r1, r2
8008ae2: 461a mov r2, r3
8008ae4: 460b mov r3, r1
8008ae6: 80fb strh r3, [r7, #6]
8008ae8: 4613 mov r3, r2
8008aea: 717b strb r3, [r7, #5]
if (phost->device.speed != USBH_SPEED_HIGH)
8008aec: 68fb ldr r3, [r7, #12]
8008aee: f893 331d ldrb.w r3, [r3, #797] ; 0x31d
8008af2: 2b00 cmp r3, #0
8008af4: d001 beq.n 8008afa <USBH_BulkSendData+0x24>
{
do_ping = 0U;
8008af6: 2300 movs r3, #0
8008af8: 763b strb r3, [r7, #24]
}
USBH_LL_SubmitURB(phost, /* Driver handle */
8008afa: 7979 ldrb r1, [r7, #5]
8008afc: 7e3b ldrb r3, [r7, #24]
8008afe: 9303 str r3, [sp, #12]
8008b00: 88fb ldrh r3, [r7, #6]
8008b02: 9302 str r3, [sp, #8]
8008b04: 68bb ldr r3, [r7, #8]
8008b06: 9301 str r3, [sp, #4]
8008b08: 2301 movs r3, #1
8008b0a: 9300 str r3, [sp, #0]
8008b0c: 2302 movs r3, #2
8008b0e: 2200 movs r2, #0
8008b10: 68f8 ldr r0, [r7, #12]
8008b12: f000 fadc bl 80090ce <USBH_LL_SubmitURB>
USBH_EP_BULK, /* EP type */
USBH_PID_DATA, /* Type Data */
buff, /* data buffer */
length, /* data length */
do_ping); /* do ping (HS Only)*/
return USBH_OK;
8008b16: 2300 movs r3, #0
}
8008b18: 4618 mov r0, r3
8008b1a: 3710 adds r7, #16
8008b1c: 46bd mov sp, r7
8008b1e: bd80 pop {r7, pc}
08008b20 <USBH_BulkReceiveData>:
*/
USBH_StatusTypeDef USBH_BulkReceiveData(USBH_HandleTypeDef *phost,
uint8_t *buff,
uint16_t length,
uint8_t pipe_num)
{
8008b20: b580 push {r7, lr}
8008b22: b088 sub sp, #32
8008b24: af04 add r7, sp, #16
8008b26: 60f8 str r0, [r7, #12]
8008b28: 60b9 str r1, [r7, #8]
8008b2a: 4611 mov r1, r2
8008b2c: 461a mov r2, r3
8008b2e: 460b mov r3, r1
8008b30: 80fb strh r3, [r7, #6]
8008b32: 4613 mov r3, r2
8008b34: 717b strb r3, [r7, #5]
USBH_LL_SubmitURB(phost, /* Driver handle */
8008b36: 7979 ldrb r1, [r7, #5]
8008b38: 2300 movs r3, #0
8008b3a: 9303 str r3, [sp, #12]
8008b3c: 88fb ldrh r3, [r7, #6]
8008b3e: 9302 str r3, [sp, #8]
8008b40: 68bb ldr r3, [r7, #8]
8008b42: 9301 str r3, [sp, #4]
8008b44: 2301 movs r3, #1
8008b46: 9300 str r3, [sp, #0]
8008b48: 2302 movs r3, #2
8008b4a: 2201 movs r2, #1
8008b4c: 68f8 ldr r0, [r7, #12]
8008b4e: f000 fabe bl 80090ce <USBH_LL_SubmitURB>
USBH_EP_BULK, /* EP type */
USBH_PID_DATA, /* Type Data */
buff, /* data buffer */
length, /* data length */
0U);
return USBH_OK;
8008b52: 2300 movs r3, #0
}
8008b54: 4618 mov r0, r3
8008b56: 3710 adds r7, #16
8008b58: 46bd mov sp, r7
8008b5a: bd80 pop {r7, pc}
08008b5c <USBH_OpenPipe>:
* @retval USBH Status
*/
USBH_StatusTypeDef USBH_OpenPipe(USBH_HandleTypeDef *phost, uint8_t pipe_num,
uint8_t epnum, uint8_t dev_address,
uint8_t speed, uint8_t ep_type, uint16_t mps)
{
8008b5c: b580 push {r7, lr}
8008b5e: b086 sub sp, #24
8008b60: af04 add r7, sp, #16
8008b62: 6078 str r0, [r7, #4]
8008b64: 4608 mov r0, r1
8008b66: 4611 mov r1, r2
8008b68: 461a mov r2, r3
8008b6a: 4603 mov r3, r0
8008b6c: 70fb strb r3, [r7, #3]
8008b6e: 460b mov r3, r1
8008b70: 70bb strb r3, [r7, #2]
8008b72: 4613 mov r3, r2
8008b74: 707b strb r3, [r7, #1]
USBH_LL_OpenPipe(phost, pipe_num, epnum, dev_address, speed, ep_type, mps);
8008b76: 7878 ldrb r0, [r7, #1]
8008b78: 78ba ldrb r2, [r7, #2]
8008b7a: 78f9 ldrb r1, [r7, #3]
8008b7c: 8b3b ldrh r3, [r7, #24]
8008b7e: 9302 str r3, [sp, #8]
8008b80: 7d3b ldrb r3, [r7, #20]
8008b82: 9301 str r3, [sp, #4]
8008b84: 7c3b ldrb r3, [r7, #16]
8008b86: 9300 str r3, [sp, #0]
8008b88: 4603 mov r3, r0
8008b8a: 6878 ldr r0, [r7, #4]
8008b8c: f000 fa51 bl 8009032 <USBH_LL_OpenPipe>
return USBH_OK;
8008b90: 2300 movs r3, #0
}
8008b92: 4618 mov r0, r3
8008b94: 3708 adds r7, #8
8008b96: 46bd mov sp, r7
8008b98: bd80 pop {r7, pc}
08008b9a <USBH_ClosePipe>:
* @param phost: Host Handle
* @param pipe_num: Pipe Number
* @retval USBH Status
*/
USBH_StatusTypeDef USBH_ClosePipe(USBH_HandleTypeDef *phost, uint8_t pipe_num)
{
8008b9a: b580 push {r7, lr}
8008b9c: b082 sub sp, #8
8008b9e: af00 add r7, sp, #0
8008ba0: 6078 str r0, [r7, #4]
8008ba2: 460b mov r3, r1
8008ba4: 70fb strb r3, [r7, #3]
USBH_LL_ClosePipe(phost, pipe_num);
8008ba6: 78fb ldrb r3, [r7, #3]
8008ba8: 4619 mov r1, r3
8008baa: 6878 ldr r0, [r7, #4]
8008bac: f000 fa70 bl 8009090 <USBH_LL_ClosePipe>
return USBH_OK;
8008bb0: 2300 movs r3, #0
}
8008bb2: 4618 mov r0, r3
8008bb4: 3708 adds r7, #8
8008bb6: 46bd mov sp, r7
8008bb8: bd80 pop {r7, pc}
08008bba <USBH_AllocPipe>:
* @param phost: Host Handle
* @param ep_addr: End point for which the Pipe to be allocated
* @retval Pipe number
*/
uint8_t USBH_AllocPipe(USBH_HandleTypeDef *phost, uint8_t ep_addr)
{
8008bba: b580 push {r7, lr}
8008bbc: b084 sub sp, #16
8008bbe: af00 add r7, sp, #0
8008bc0: 6078 str r0, [r7, #4]
8008bc2: 460b mov r3, r1
8008bc4: 70fb strb r3, [r7, #3]
uint16_t pipe;
pipe = USBH_GetFreePipe(phost);
8008bc6: 6878 ldr r0, [r7, #4]
8008bc8: f000 f836 bl 8008c38 <USBH_GetFreePipe>
8008bcc: 4603 mov r3, r0
8008bce: 81fb strh r3, [r7, #14]
if (pipe != 0xFFFFU)
8008bd0: 89fb ldrh r3, [r7, #14]
8008bd2: f64f 72ff movw r2, #65535 ; 0xffff
8008bd6: 4293 cmp r3, r2
8008bd8: d00a beq.n 8008bf0 <USBH_AllocPipe+0x36>
{
phost->Pipes[pipe & 0xFU] = 0x8000U | ep_addr;
8008bda: 78fa ldrb r2, [r7, #3]
8008bdc: 89fb ldrh r3, [r7, #14]
8008bde: f003 030f and.w r3, r3, #15
8008be2: f442 4200 orr.w r2, r2, #32768 ; 0x8000
8008be6: 6879 ldr r1, [r7, #4]
8008be8: 33e0 adds r3, #224 ; 0xe0
8008bea: 009b lsls r3, r3, #2
8008bec: 440b add r3, r1
8008bee: 605a str r2, [r3, #4]
}
return (uint8_t)pipe;
8008bf0: 89fb ldrh r3, [r7, #14]
8008bf2: b2db uxtb r3, r3
}
8008bf4: 4618 mov r0, r3
8008bf6: 3710 adds r7, #16
8008bf8: 46bd mov sp, r7
8008bfa: bd80 pop {r7, pc}
08008bfc <USBH_FreePipe>:
* @param phost: Host Handle
* @param idx: Pipe number to be freed
* @retval USBH Status
*/
USBH_StatusTypeDef USBH_FreePipe(USBH_HandleTypeDef *phost, uint8_t idx)
{
8008bfc: b480 push {r7}
8008bfe: b083 sub sp, #12
8008c00: af00 add r7, sp, #0
8008c02: 6078 str r0, [r7, #4]
8008c04: 460b mov r3, r1
8008c06: 70fb strb r3, [r7, #3]
if (idx < 11U)
8008c08: 78fb ldrb r3, [r7, #3]
8008c0a: 2b0a cmp r3, #10
8008c0c: d80d bhi.n 8008c2a <USBH_FreePipe+0x2e>
{
phost->Pipes[idx] &= 0x7FFFU;
8008c0e: 78fb ldrb r3, [r7, #3]
8008c10: 687a ldr r2, [r7, #4]
8008c12: 33e0 adds r3, #224 ; 0xe0
8008c14: 009b lsls r3, r3, #2
8008c16: 4413 add r3, r2
8008c18: 685a ldr r2, [r3, #4]
8008c1a: 78fb ldrb r3, [r7, #3]
8008c1c: f3c2 020e ubfx r2, r2, #0, #15
8008c20: 6879 ldr r1, [r7, #4]
8008c22: 33e0 adds r3, #224 ; 0xe0
8008c24: 009b lsls r3, r3, #2
8008c26: 440b add r3, r1
8008c28: 605a str r2, [r3, #4]
}
return USBH_OK;
8008c2a: 2300 movs r3, #0
}
8008c2c: 4618 mov r0, r3
8008c2e: 370c adds r7, #12
8008c30: 46bd mov sp, r7
8008c32: f85d 7b04 ldr.w r7, [sp], #4
8008c36: 4770 bx lr
08008c38 <USBH_GetFreePipe>:
* @param phost: Host Handle
* Get a free Pipe number for allocation to a device endpoint
* @retval idx: Free Pipe number
*/
static uint16_t USBH_GetFreePipe(USBH_HandleTypeDef *phost)
{
8008c38: b480 push {r7}
8008c3a: b085 sub sp, #20
8008c3c: af00 add r7, sp, #0
8008c3e: 6078 str r0, [r7, #4]
uint8_t idx = 0U;
8008c40: 2300 movs r3, #0
8008c42: 73fb strb r3, [r7, #15]
for (idx = 0U ; idx < 11U ; idx++)
8008c44: 2300 movs r3, #0
8008c46: 73fb strb r3, [r7, #15]
8008c48: e00f b.n 8008c6a <USBH_GetFreePipe+0x32>
{
if ((phost->Pipes[idx] & 0x8000U) == 0U)
8008c4a: 7bfb ldrb r3, [r7, #15]
8008c4c: 687a ldr r2, [r7, #4]
8008c4e: 33e0 adds r3, #224 ; 0xe0
8008c50: 009b lsls r3, r3, #2
8008c52: 4413 add r3, r2
8008c54: 685b ldr r3, [r3, #4]
8008c56: f403 4300 and.w r3, r3, #32768 ; 0x8000
8008c5a: 2b00 cmp r3, #0
8008c5c: d102 bne.n 8008c64 <USBH_GetFreePipe+0x2c>
{
return (uint16_t)idx;
8008c5e: 7bfb ldrb r3, [r7, #15]
8008c60: b29b uxth r3, r3
8008c62: e007 b.n 8008c74 <USBH_GetFreePipe+0x3c>
for (idx = 0U ; idx < 11U ; idx++)
8008c64: 7bfb ldrb r3, [r7, #15]
8008c66: 3301 adds r3, #1
8008c68: 73fb strb r3, [r7, #15]
8008c6a: 7bfb ldrb r3, [r7, #15]
8008c6c: 2b0a cmp r3, #10
8008c6e: d9ec bls.n 8008c4a <USBH_GetFreePipe+0x12>
}
}
return 0xFFFFU;
8008c70: f64f 73ff movw r3, #65535 ; 0xffff
}
8008c74: 4618 mov r0, r3
8008c76: 3714 adds r7, #20
8008c78: 46bd mov sp, r7
8008c7a: f85d 7b04 ldr.w r7, [sp], #4
8008c7e: 4770 bx lr
08008c80 <MX_USB_HOST_Init>:
/**
* Init USB host library, add supported class and start the library
* @retval None
*/
void MX_USB_HOST_Init(void)
{
8008c80: b580 push {r7, lr}
8008c82: af00 add r7, sp, #0
/* USER CODE BEGIN USB_HOST_Init_PreTreatment */
/* USER CODE END USB_HOST_Init_PreTreatment */
/* Init host Library, add supported class and start the library. */
if (USBH_Init(&hUsbHostFS, USBH_UserProcess, HOST_FS) != USBH_OK)
8008c84: 2201 movs r2, #1
8008c86: 490e ldr r1, [pc, #56] ; (8008cc0 <MX_USB_HOST_Init+0x40>)
8008c88: 480e ldr r0, [pc, #56] ; (8008cc4 <MX_USB_HOST_Init+0x44>)
8008c8a: f7fe fc9f bl 80075cc <USBH_Init>
8008c8e: 4603 mov r3, r0
8008c90: 2b00 cmp r3, #0
8008c92: d001 beq.n 8008c98 <MX_USB_HOST_Init+0x18>
{
Error_Handler();
8008c94: f7f7 ff3a bl 8000b0c <Error_Handler>
}
if (USBH_RegisterClass(&hUsbHostFS, USBH_CDC_CLASS) != USBH_OK)
8008c98: 490b ldr r1, [pc, #44] ; (8008cc8 <MX_USB_HOST_Init+0x48>)
8008c9a: 480a ldr r0, [pc, #40] ; (8008cc4 <MX_USB_HOST_Init+0x44>)
8008c9c: f7fe fd24 bl 80076e8 <USBH_RegisterClass>
8008ca0: 4603 mov r3, r0
8008ca2: 2b00 cmp r3, #0
8008ca4: d001 beq.n 8008caa <MX_USB_HOST_Init+0x2a>
{
Error_Handler();
8008ca6: f7f7 ff31 bl 8000b0c <Error_Handler>
}
if (USBH_Start(&hUsbHostFS) != USBH_OK)
8008caa: 4806 ldr r0, [pc, #24] ; (8008cc4 <MX_USB_HOST_Init+0x44>)
8008cac: f7fe fda8 bl 8007800 <USBH_Start>
8008cb0: 4603 mov r3, r0
8008cb2: 2b00 cmp r3, #0
8008cb4: d001 beq.n 8008cba <MX_USB_HOST_Init+0x3a>
{
Error_Handler();
8008cb6: f7f7 ff29 bl 8000b0c <Error_Handler>
}
/* USER CODE BEGIN USB_HOST_Init_PostTreatment */
/* USER CODE END USB_HOST_Init_PostTreatment */
}
8008cba: bf00 nop
8008cbc: bd80 pop {r7, pc}
8008cbe: bf00 nop
8008cc0: 08008ce1 .word 0x08008ce1
8008cc4: 20000260 .word 0x20000260
8008cc8: 20000020 .word 0x20000020
08008ccc <MX_USB_HOST_Process>:
/*
* Background task
*/
void MX_USB_HOST_Process(void)
{
8008ccc: b580 push {r7, lr}
8008cce: af00 add r7, sp, #0
/* USB Host Background task */
USBH_Process(&hUsbHostFS);
8008cd0: 4802 ldr r0, [pc, #8] ; (8008cdc <MX_USB_HOST_Process+0x10>)
8008cd2: f7fe fda5 bl 8007820 <USBH_Process>
}
8008cd6: bf00 nop
8008cd8: bd80 pop {r7, pc}
8008cda: bf00 nop
8008cdc: 20000260 .word 0x20000260
08008ce0 <USBH_UserProcess>:
/*
* user callback definition
*/
static void USBH_UserProcess (USBH_HandleTypeDef *phost, uint8_t id)
{
8008ce0: b480 push {r7}
8008ce2: b083 sub sp, #12
8008ce4: af00 add r7, sp, #0
8008ce6: 6078 str r0, [r7, #4]
8008ce8: 460b mov r3, r1
8008cea: 70fb strb r3, [r7, #3]
/* USER CODE BEGIN CALL_BACK_1 */
switch(id)
8008cec: 78fb ldrb r3, [r7, #3]
8008cee: 3b01 subs r3, #1
8008cf0: 2b04 cmp r3, #4
8008cf2: d819 bhi.n 8008d28 <USBH_UserProcess+0x48>
8008cf4: a201 add r2, pc, #4 ; (adr r2, 8008cfc <USBH_UserProcess+0x1c>)
8008cf6: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8008cfa: bf00 nop
8008cfc: 08008d29 .word 0x08008d29
8008d00: 08008d19 .word 0x08008d19
8008d04: 08008d29 .word 0x08008d29
8008d08: 08008d21 .word 0x08008d21
8008d0c: 08008d11 .word 0x08008d11
{
case HOST_USER_SELECT_CONFIGURATION:
break;
case HOST_USER_DISCONNECTION:
Appli_state = APPLICATION_DISCONNECT;
8008d10: 4b09 ldr r3, [pc, #36] ; (8008d38 <USBH_UserProcess+0x58>)
8008d12: 2203 movs r2, #3
8008d14: 701a strb r2, [r3, #0]
break;
8008d16: e008 b.n 8008d2a <USBH_UserProcess+0x4a>
case HOST_USER_CLASS_ACTIVE:
Appli_state = APPLICATION_READY;
8008d18: 4b07 ldr r3, [pc, #28] ; (8008d38 <USBH_UserProcess+0x58>)
8008d1a: 2202 movs r2, #2
8008d1c: 701a strb r2, [r3, #0]
break;
8008d1e: e004 b.n 8008d2a <USBH_UserProcess+0x4a>
case HOST_USER_CONNECTION:
Appli_state = APPLICATION_START;
8008d20: 4b05 ldr r3, [pc, #20] ; (8008d38 <USBH_UserProcess+0x58>)
8008d22: 2201 movs r2, #1
8008d24: 701a strb r2, [r3, #0]
break;
8008d26: e000 b.n 8008d2a <USBH_UserProcess+0x4a>
default:
break;
8008d28: bf00 nop
}
/* USER CODE END CALL_BACK_1 */
}
8008d2a: bf00 nop
8008d2c: 370c adds r7, #12
8008d2e: 46bd mov sp, r7
8008d30: f85d 7b04 ldr.w r7, [sp], #4
8008d34: 4770 bx lr
8008d36: bf00 nop
8008d38: 200000d0 .word 0x200000d0
08008d3c <HAL_HCD_MspInit>:
LL Driver Callbacks (HCD -> USB Host Library)
*******************************************************************************/
/* MSP Init */
void HAL_HCD_MspInit(HCD_HandleTypeDef* hcdHandle)
{
8008d3c: b580 push {r7, lr}
8008d3e: b08a sub sp, #40 ; 0x28
8008d40: af00 add r7, sp, #0
8008d42: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8008d44: f107 0314 add.w r3, r7, #20
8008d48: 2200 movs r2, #0
8008d4a: 601a str r2, [r3, #0]
8008d4c: 605a str r2, [r3, #4]
8008d4e: 609a str r2, [r3, #8]
8008d50: 60da str r2, [r3, #12]
8008d52: 611a str r2, [r3, #16]
if(hcdHandle->Instance==USB_OTG_FS)
8008d54: 687b ldr r3, [r7, #4]
8008d56: 681b ldr r3, [r3, #0]
8008d58: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000
8008d5c: d147 bne.n 8008dee <HAL_HCD_MspInit+0xb2>
{
/* USER CODE BEGIN USB_OTG_FS_MspInit 0 */
/* USER CODE END USB_OTG_FS_MspInit 0 */
__HAL_RCC_GPIOA_CLK_ENABLE();
8008d5e: 2300 movs r3, #0
8008d60: 613b str r3, [r7, #16]
8008d62: 4b25 ldr r3, [pc, #148] ; (8008df8 <HAL_HCD_MspInit+0xbc>)
8008d64: 6b1b ldr r3, [r3, #48] ; 0x30
8008d66: 4a24 ldr r2, [pc, #144] ; (8008df8 <HAL_HCD_MspInit+0xbc>)
8008d68: f043 0301 orr.w r3, r3, #1
8008d6c: 6313 str r3, [r2, #48] ; 0x30
8008d6e: 4b22 ldr r3, [pc, #136] ; (8008df8 <HAL_HCD_MspInit+0xbc>)
8008d70: 6b1b ldr r3, [r3, #48] ; 0x30
8008d72: f003 0301 and.w r3, r3, #1
8008d76: 613b str r3, [r7, #16]
8008d78: 693b ldr r3, [r7, #16]
PA9 ------> USB_OTG_FS_VBUS
PA10 ------> USB_OTG_FS_ID
PA11 ------> USB_OTG_FS_DM
PA12 ------> USB_OTG_FS_DP
*/
GPIO_InitStruct.Pin = VBUS_FS_Pin;
8008d7a: f44f 7300 mov.w r3, #512 ; 0x200
8008d7e: 617b str r3, [r7, #20]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8008d80: 2300 movs r3, #0
8008d82: 61bb str r3, [r7, #24]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8008d84: 2300 movs r3, #0
8008d86: 61fb str r3, [r7, #28]
HAL_GPIO_Init(VBUS_FS_GPIO_Port, &GPIO_InitStruct);
8008d88: f107 0314 add.w r3, r7, #20
8008d8c: 4619 mov r1, r3
8008d8e: 481b ldr r0, [pc, #108] ; (8008dfc <HAL_HCD_MspInit+0xc0>)
8008d90: f7f8 fba2 bl 80014d8 <HAL_GPIO_Init>
GPIO_InitStruct.Pin = OTG_FS_ID_Pin|OTG_FS_DM_Pin|OTG_FS_DP_Pin;
8008d94: f44f 53e0 mov.w r3, #7168 ; 0x1c00
8008d98: 617b str r3, [r7, #20]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8008d9a: 2302 movs r3, #2
8008d9c: 61bb str r3, [r7, #24]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8008d9e: 2300 movs r3, #0
8008da0: 61fb str r3, [r7, #28]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
8008da2: 2303 movs r3, #3
8008da4: 623b str r3, [r7, #32]
GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS;
8008da6: 230a movs r3, #10
8008da8: 627b str r3, [r7, #36] ; 0x24
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8008daa: f107 0314 add.w r3, r7, #20
8008dae: 4619 mov r1, r3
8008db0: 4812 ldr r0, [pc, #72] ; (8008dfc <HAL_HCD_MspInit+0xc0>)
8008db2: f7f8 fb91 bl 80014d8 <HAL_GPIO_Init>
/* Peripheral clock enable */
__HAL_RCC_USB_OTG_FS_CLK_ENABLE();
8008db6: 4b10 ldr r3, [pc, #64] ; (8008df8 <HAL_HCD_MspInit+0xbc>)
8008db8: 6b5b ldr r3, [r3, #52] ; 0x34
8008dba: 4a0f ldr r2, [pc, #60] ; (8008df8 <HAL_HCD_MspInit+0xbc>)
8008dbc: f043 0380 orr.w r3, r3, #128 ; 0x80
8008dc0: 6353 str r3, [r2, #52] ; 0x34
8008dc2: 2300 movs r3, #0
8008dc4: 60fb str r3, [r7, #12]
8008dc6: 4b0c ldr r3, [pc, #48] ; (8008df8 <HAL_HCD_MspInit+0xbc>)
8008dc8: 6c5b ldr r3, [r3, #68] ; 0x44
8008dca: 4a0b ldr r2, [pc, #44] ; (8008df8 <HAL_HCD_MspInit+0xbc>)
8008dcc: f443 4380 orr.w r3, r3, #16384 ; 0x4000
8008dd0: 6453 str r3, [r2, #68] ; 0x44
8008dd2: 4b09 ldr r3, [pc, #36] ; (8008df8 <HAL_HCD_MspInit+0xbc>)
8008dd4: 6c5b ldr r3, [r3, #68] ; 0x44
8008dd6: f403 4380 and.w r3, r3, #16384 ; 0x4000
8008dda: 60fb str r3, [r7, #12]
8008ddc: 68fb ldr r3, [r7, #12]
/* Peripheral interrupt init */
HAL_NVIC_SetPriority(OTG_FS_IRQn, 0, 0);
8008dde: 2200 movs r2, #0
8008de0: 2100 movs r1, #0
8008de2: 2043 movs r0, #67 ; 0x43
8008de4: f7f8 fb41 bl 800146a <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(OTG_FS_IRQn);
8008de8: 2043 movs r0, #67 ; 0x43
8008dea: f7f8 fb5a bl 80014a2 <HAL_NVIC_EnableIRQ>
/* USER CODE BEGIN USB_OTG_FS_MspInit 1 */
/* USER CODE END USB_OTG_FS_MspInit 1 */
}
}
8008dee: bf00 nop
8008df0: 3728 adds r7, #40 ; 0x28
8008df2: 46bd mov sp, r7
8008df4: bd80 pop {r7, pc}
8008df6: bf00 nop
8008df8: 40023800 .word 0x40023800
8008dfc: 40020000 .word 0x40020000
08008e00 <HAL_HCD_SOF_Callback>:
* @brief SOF callback.
* @param hhcd: HCD handle
* @retval None
*/
void HAL_HCD_SOF_Callback(HCD_HandleTypeDef *hhcd)
{
8008e00: b580 push {r7, lr}
8008e02: b082 sub sp, #8
8008e04: af00 add r7, sp, #0
8008e06: 6078 str r0, [r7, #4]
USBH_LL_IncTimer(hhcd->pData);
8008e08: 687b ldr r3, [r7, #4]
8008e0a: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
8008e0e: 4618 mov r0, r3
8008e10: f7ff f8d9 bl 8007fc6 <USBH_LL_IncTimer>
}
8008e14: bf00 nop
8008e16: 3708 adds r7, #8
8008e18: 46bd mov sp, r7
8008e1a: bd80 pop {r7, pc}
08008e1c <HAL_HCD_Connect_Callback>:
* @brief SOF callback.
* @param hhcd: HCD handle
* @retval None
*/
void HAL_HCD_Connect_Callback(HCD_HandleTypeDef *hhcd)
{
8008e1c: b580 push {r7, lr}
8008e1e: b082 sub sp, #8
8008e20: af00 add r7, sp, #0
8008e22: 6078 str r0, [r7, #4]
USBH_LL_Connect(hhcd->pData);
8008e24: 687b ldr r3, [r7, #4]
8008e26: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
8008e2a: 4618 mov r0, r3
8008e2c: f7ff f911 bl 8008052 <USBH_LL_Connect>
}
8008e30: bf00 nop
8008e32: 3708 adds r7, #8
8008e34: 46bd mov sp, r7
8008e36: bd80 pop {r7, pc}
08008e38 <HAL_HCD_Disconnect_Callback>:
* @brief SOF callback.
* @param hhcd: HCD handle
* @retval None
*/
void HAL_HCD_Disconnect_Callback(HCD_HandleTypeDef *hhcd)
{
8008e38: b580 push {r7, lr}
8008e3a: b082 sub sp, #8
8008e3c: af00 add r7, sp, #0
8008e3e: 6078 str r0, [r7, #4]
USBH_LL_Disconnect(hhcd->pData);
8008e40: 687b ldr r3, [r7, #4]
8008e42: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
8008e46: 4618 mov r0, r3
8008e48: f7ff f91a bl 8008080 <USBH_LL_Disconnect>
}
8008e4c: bf00 nop
8008e4e: 3708 adds r7, #8
8008e50: 46bd mov sp, r7
8008e52: bd80 pop {r7, pc}
08008e54 <HAL_HCD_HC_NotifyURBChange_Callback>:
* @param chnum: channel number
* @param urb_state: state
* @retval None
*/
void HAL_HCD_HC_NotifyURBChange_Callback(HCD_HandleTypeDef *hhcd, uint8_t chnum, HCD_URBStateTypeDef urb_state)
{
8008e54: b480 push {r7}
8008e56: b083 sub sp, #12
8008e58: af00 add r7, sp, #0
8008e5a: 6078 str r0, [r7, #4]
8008e5c: 460b mov r3, r1
8008e5e: 70fb strb r3, [r7, #3]
8008e60: 4613 mov r3, r2
8008e62: 70bb strb r3, [r7, #2]
/* To be used with OS to sync URB state with the global state machine */
#if (USBH_USE_OS == 1)
USBH_LL_NotifyURBChange(hhcd->pData);
#endif
}
8008e64: bf00 nop
8008e66: 370c adds r7, #12
8008e68: 46bd mov sp, r7
8008e6a: f85d 7b04 ldr.w r7, [sp], #4
8008e6e: 4770 bx lr
08008e70 <HAL_HCD_PortEnabled_Callback>:
* @brief Port Port Enabled callback.
* @param hhcd: HCD handle
* @retval None
*/
void HAL_HCD_PortEnabled_Callback(HCD_HandleTypeDef *hhcd)
{
8008e70: b580 push {r7, lr}
8008e72: b082 sub sp, #8
8008e74: af00 add r7, sp, #0
8008e76: 6078 str r0, [r7, #4]
USBH_LL_PortEnabled(hhcd->pData);
8008e78: 687b ldr r3, [r7, #4]
8008e7a: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
8008e7e: 4618 mov r0, r3
8008e80: f7ff f8cb bl 800801a <USBH_LL_PortEnabled>
}
8008e84: bf00 nop
8008e86: 3708 adds r7, #8
8008e88: 46bd mov sp, r7
8008e8a: bd80 pop {r7, pc}
08008e8c <HAL_HCD_PortDisabled_Callback>:
* @brief Port Port Disabled callback.
* @param hhcd: HCD handle
* @retval None
*/
void HAL_HCD_PortDisabled_Callback(HCD_HandleTypeDef *hhcd)
{
8008e8c: b580 push {r7, lr}
8008e8e: b082 sub sp, #8
8008e90: af00 add r7, sp, #0
8008e92: 6078 str r0, [r7, #4]
USBH_LL_PortDisabled(hhcd->pData);
8008e94: 687b ldr r3, [r7, #4]
8008e96: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
8008e9a: 4618 mov r0, r3
8008e9c: f7ff f8cb bl 8008036 <USBH_LL_PortDisabled>
}
8008ea0: bf00 nop
8008ea2: 3708 adds r7, #8
8008ea4: 46bd mov sp, r7
8008ea6: bd80 pop {r7, pc}
08008ea8 <USBH_LL_Init>:
* @brief Initialize the low level portion of the host driver.
* @param phost: Host handle
* @retval USBH status
*/
USBH_StatusTypeDef USBH_LL_Init(USBH_HandleTypeDef *phost)
{
8008ea8: b580 push {r7, lr}
8008eaa: b082 sub sp, #8
8008eac: af00 add r7, sp, #0
8008eae: 6078 str r0, [r7, #4]
/* Init USB_IP */
if (phost->id == HOST_FS) {
8008eb0: 687b ldr r3, [r7, #4]
8008eb2: f893 33cc ldrb.w r3, [r3, #972] ; 0x3cc
8008eb6: 2b01 cmp r3, #1
8008eb8: d12a bne.n 8008f10 <USBH_LL_Init+0x68>
/* Link the driver to the stack. */
hhcd_USB_OTG_FS.pData = phost;
8008eba: 4a18 ldr r2, [pc, #96] ; (8008f1c <USBH_LL_Init+0x74>)
8008ebc: 687b ldr r3, [r7, #4]
8008ebe: f8c2 32c0 str.w r3, [r2, #704] ; 0x2c0
phost->pData = &hhcd_USB_OTG_FS;
8008ec2: 687b ldr r3, [r7, #4]
8008ec4: 4a15 ldr r2, [pc, #84] ; (8008f1c <USBH_LL_Init+0x74>)
8008ec6: f8c3 23d0 str.w r2, [r3, #976] ; 0x3d0
hhcd_USB_OTG_FS.Instance = USB_OTG_FS;
8008eca: 4b14 ldr r3, [pc, #80] ; (8008f1c <USBH_LL_Init+0x74>)
8008ecc: f04f 42a0 mov.w r2, #1342177280 ; 0x50000000
8008ed0: 601a str r2, [r3, #0]
hhcd_USB_OTG_FS.Init.Host_channels = 8;
8008ed2: 4b12 ldr r3, [pc, #72] ; (8008f1c <USBH_LL_Init+0x74>)
8008ed4: 2208 movs r2, #8
8008ed6: 609a str r2, [r3, #8]
hhcd_USB_OTG_FS.Init.speed = HCD_SPEED_FULL;
8008ed8: 4b10 ldr r3, [pc, #64] ; (8008f1c <USBH_LL_Init+0x74>)
8008eda: 2201 movs r2, #1
8008edc: 60da str r2, [r3, #12]
hhcd_USB_OTG_FS.Init.dma_enable = DISABLE;
8008ede: 4b0f ldr r3, [pc, #60] ; (8008f1c <USBH_LL_Init+0x74>)
8008ee0: 2200 movs r2, #0
8008ee2: 611a str r2, [r3, #16]
hhcd_USB_OTG_FS.Init.phy_itface = HCD_PHY_EMBEDDED;
8008ee4: 4b0d ldr r3, [pc, #52] ; (8008f1c <USBH_LL_Init+0x74>)
8008ee6: 2202 movs r2, #2
8008ee8: 619a str r2, [r3, #24]
hhcd_USB_OTG_FS.Init.Sof_enable = DISABLE;
8008eea: 4b0c ldr r3, [pc, #48] ; (8008f1c <USBH_LL_Init+0x74>)
8008eec: 2200 movs r2, #0
8008eee: 61da str r2, [r3, #28]
if (HAL_HCD_Init(&hhcd_USB_OTG_FS) != HAL_OK)
8008ef0: 480a ldr r0, [pc, #40] ; (8008f1c <USBH_LL_Init+0x74>)
8008ef2: f7f8 fca7 bl 8001844 <HAL_HCD_Init>
8008ef6: 4603 mov r3, r0
8008ef8: 2b00 cmp r3, #0
8008efa: d001 beq.n 8008f00 <USBH_LL_Init+0x58>
{
Error_Handler( );
8008efc: f7f7 fe06 bl 8000b0c <Error_Handler>
}
USBH_LL_SetTimer(phost, HAL_HCD_GetCurrentFrame(&hhcd_USB_OTG_FS));
8008f00: 4806 ldr r0, [pc, #24] ; (8008f1c <USBH_LL_Init+0x74>)
8008f02: f7f9 f8ab bl 800205c <HAL_HCD_GetCurrentFrame>
8008f06: 4603 mov r3, r0
8008f08: 4619 mov r1, r3
8008f0a: 6878 ldr r0, [r7, #4]
8008f0c: f7ff f84c bl 8007fa8 <USBH_LL_SetTimer>
}
return USBH_OK;
8008f10: 2300 movs r3, #0
}
8008f12: 4618 mov r0, r3
8008f14: 3708 adds r7, #8
8008f16: 46bd mov sp, r7
8008f18: bd80 pop {r7, pc}
8008f1a: bf00 nop
8008f1c: 20000638 .word 0x20000638
08008f20 <USBH_LL_Start>:
* @brief Start the low level portion of the host driver.
* @param phost: Host handle
* @retval USBH status
*/
USBH_StatusTypeDef USBH_LL_Start(USBH_HandleTypeDef *phost)
{
8008f20: b580 push {r7, lr}
8008f22: b084 sub sp, #16
8008f24: af00 add r7, sp, #0
8008f26: 6078 str r0, [r7, #4]
HAL_StatusTypeDef hal_status = HAL_OK;
8008f28: 2300 movs r3, #0
8008f2a: 73fb strb r3, [r7, #15]
USBH_StatusTypeDef usb_status = USBH_OK;
8008f2c: 2300 movs r3, #0
8008f2e: 73bb strb r3, [r7, #14]
hal_status = HAL_HCD_Start(phost->pData);
8008f30: 687b ldr r3, [r7, #4]
8008f32: f8d3 33d0 ldr.w r3, [r3, #976] ; 0x3d0
8008f36: 4618 mov r0, r3
8008f38: f7f9 f818 bl 8001f6c <HAL_HCD_Start>
8008f3c: 4603 mov r3, r0
8008f3e: 73fb strb r3, [r7, #15]
usb_status = USBH_Get_USB_Status(hal_status);
8008f40: 7bfb ldrb r3, [r7, #15]
8008f42: 4618 mov r0, r3
8008f44: f000 f95c bl 8009200 <USBH_Get_USB_Status>
8008f48: 4603 mov r3, r0
8008f4a: 73bb strb r3, [r7, #14]
return usb_status;
8008f4c: 7bbb ldrb r3, [r7, #14]
}
8008f4e: 4618 mov r0, r3
8008f50: 3710 adds r7, #16
8008f52: 46bd mov sp, r7
8008f54: bd80 pop {r7, pc}
08008f56 <USBH_LL_Stop>:
* @brief Stop the low level portion of the host driver.
* @param phost: Host handle
* @retval USBH status
*/
USBH_StatusTypeDef USBH_LL_Stop(USBH_HandleTypeDef *phost)
{
8008f56: b580 push {r7, lr}
8008f58: b084 sub sp, #16
8008f5a: af00 add r7, sp, #0
8008f5c: 6078 str r0, [r7, #4]
HAL_StatusTypeDef hal_status = HAL_OK;
8008f5e: 2300 movs r3, #0
8008f60: 73fb strb r3, [r7, #15]
USBH_StatusTypeDef usb_status = USBH_OK;
8008f62: 2300 movs r3, #0
8008f64: 73bb strb r3, [r7, #14]
hal_status = HAL_HCD_Stop(phost->pData);
8008f66: 687b ldr r3, [r7, #4]
8008f68: f8d3 33d0 ldr.w r3, [r3, #976] ; 0x3d0
8008f6c: 4618 mov r0, r3
8008f6e: f7f9 f820 bl 8001fb2 <HAL_HCD_Stop>
8008f72: 4603 mov r3, r0
8008f74: 73fb strb r3, [r7, #15]
usb_status = USBH_Get_USB_Status(hal_status);
8008f76: 7bfb ldrb r3, [r7, #15]
8008f78: 4618 mov r0, r3
8008f7a: f000 f941 bl 8009200 <USBH_Get_USB_Status>
8008f7e: 4603 mov r3, r0
8008f80: 73bb strb r3, [r7, #14]
return usb_status;
8008f82: 7bbb ldrb r3, [r7, #14]
}
8008f84: 4618 mov r0, r3
8008f86: 3710 adds r7, #16
8008f88: 46bd mov sp, r7
8008f8a: bd80 pop {r7, pc}
08008f8c <USBH_LL_GetSpeed>:
* @brief Return the USB host speed from the low level driver.
* @param phost: Host handle
* @retval USBH speeds
*/
USBH_SpeedTypeDef USBH_LL_GetSpeed(USBH_HandleTypeDef *phost)
{
8008f8c: b580 push {r7, lr}
8008f8e: b084 sub sp, #16
8008f90: af00 add r7, sp, #0
8008f92: 6078 str r0, [r7, #4]
USBH_SpeedTypeDef speed = USBH_SPEED_FULL;
8008f94: 2301 movs r3, #1
8008f96: 73fb strb r3, [r7, #15]
switch (HAL_HCD_GetCurrentSpeed(phost->pData))
8008f98: 687b ldr r3, [r7, #4]
8008f9a: f8d3 33d0 ldr.w r3, [r3, #976] ; 0x3d0
8008f9e: 4618 mov r0, r3
8008fa0: f7f9 f86a bl 8002078 <HAL_HCD_GetCurrentSpeed>
8008fa4: 4603 mov r3, r0
8008fa6: 2b01 cmp r3, #1
8008fa8: d007 beq.n 8008fba <USBH_LL_GetSpeed+0x2e>
8008faa: 2b01 cmp r3, #1
8008fac: d302 bcc.n 8008fb4 <USBH_LL_GetSpeed+0x28>
8008fae: 2b02 cmp r3, #2
8008fb0: d006 beq.n 8008fc0 <USBH_LL_GetSpeed+0x34>
8008fb2: e008 b.n 8008fc6 <USBH_LL_GetSpeed+0x3a>
{
case 0 :
speed = USBH_SPEED_HIGH;
8008fb4: 2300 movs r3, #0
8008fb6: 73fb strb r3, [r7, #15]
break;
8008fb8: e008 b.n 8008fcc <USBH_LL_GetSpeed+0x40>
case 1 :
speed = USBH_SPEED_FULL;
8008fba: 2301 movs r3, #1
8008fbc: 73fb strb r3, [r7, #15]
break;
8008fbe: e005 b.n 8008fcc <USBH_LL_GetSpeed+0x40>
case 2 :
speed = USBH_SPEED_LOW;
8008fc0: 2302 movs r3, #2
8008fc2: 73fb strb r3, [r7, #15]
break;
8008fc4: e002 b.n 8008fcc <USBH_LL_GetSpeed+0x40>
default:
speed = USBH_SPEED_FULL;
8008fc6: 2301 movs r3, #1
8008fc8: 73fb strb r3, [r7, #15]
break;
8008fca: bf00 nop
}
return speed;
8008fcc: 7bfb ldrb r3, [r7, #15]
}
8008fce: 4618 mov r0, r3
8008fd0: 3710 adds r7, #16
8008fd2: 46bd mov sp, r7
8008fd4: bd80 pop {r7, pc}
08008fd6 <USBH_LL_ResetPort>:
* @brief Reset the Host port of the low level driver.
* @param phost: Host handle
* @retval USBH status
*/
USBH_StatusTypeDef USBH_LL_ResetPort(USBH_HandleTypeDef *phost)
{
8008fd6: b580 push {r7, lr}
8008fd8: b084 sub sp, #16
8008fda: af00 add r7, sp, #0
8008fdc: 6078 str r0, [r7, #4]
HAL_StatusTypeDef hal_status = HAL_OK;
8008fde: 2300 movs r3, #0
8008fe0: 73fb strb r3, [r7, #15]
USBH_StatusTypeDef usb_status = USBH_OK;
8008fe2: 2300 movs r3, #0
8008fe4: 73bb strb r3, [r7, #14]
hal_status = HAL_HCD_ResetPort(phost->pData);
8008fe6: 687b ldr r3, [r7, #4]
8008fe8: f8d3 33d0 ldr.w r3, [r3, #976] ; 0x3d0
8008fec: 4618 mov r0, r3
8008fee: f7f8 fffd bl 8001fec <HAL_HCD_ResetPort>
8008ff2: 4603 mov r3, r0
8008ff4: 73fb strb r3, [r7, #15]
usb_status = USBH_Get_USB_Status(hal_status);
8008ff6: 7bfb ldrb r3, [r7, #15]
8008ff8: 4618 mov r0, r3
8008ffa: f000 f901 bl 8009200 <USBH_Get_USB_Status>
8008ffe: 4603 mov r3, r0
8009000: 73bb strb r3, [r7, #14]
return usb_status;
8009002: 7bbb ldrb r3, [r7, #14]
}
8009004: 4618 mov r0, r3
8009006: 3710 adds r7, #16
8009008: 46bd mov sp, r7
800900a: bd80 pop {r7, pc}
0800900c <USBH_LL_GetLastXferSize>:
* @param phost: Host handle
* @param pipe: Pipe index
* @retval Packet size
*/
uint32_t USBH_LL_GetLastXferSize(USBH_HandleTypeDef *phost, uint8_t pipe)
{
800900c: b580 push {r7, lr}
800900e: b082 sub sp, #8
8009010: af00 add r7, sp, #0
8009012: 6078 str r0, [r7, #4]
8009014: 460b mov r3, r1
8009016: 70fb strb r3, [r7, #3]
return HAL_HCD_HC_GetXferCount(phost->pData, pipe);
8009018: 687b ldr r3, [r7, #4]
800901a: f8d3 33d0 ldr.w r3, [r3, #976] ; 0x3d0
800901e: 78fa ldrb r2, [r7, #3]
8009020: 4611 mov r1, r2
8009022: 4618 mov r0, r3
8009024: f7f9 f805 bl 8002032 <HAL_HCD_HC_GetXferCount>
8009028: 4603 mov r3, r0
}
800902a: 4618 mov r0, r3
800902c: 3708 adds r7, #8
800902e: 46bd mov sp, r7
8009030: bd80 pop {r7, pc}
08009032 <USBH_LL_OpenPipe>:
* @param mps: Endpoint max packet size
* @retval USBH status
*/
USBH_StatusTypeDef USBH_LL_OpenPipe(USBH_HandleTypeDef *phost, uint8_t pipe_num, uint8_t epnum,
uint8_t dev_address, uint8_t speed, uint8_t ep_type, uint16_t mps)
{
8009032: b590 push {r4, r7, lr}
8009034: b089 sub sp, #36 ; 0x24
8009036: af04 add r7, sp, #16
8009038: 6078 str r0, [r7, #4]
800903a: 4608 mov r0, r1
800903c: 4611 mov r1, r2
800903e: 461a mov r2, r3
8009040: 4603 mov r3, r0
8009042: 70fb strb r3, [r7, #3]
8009044: 460b mov r3, r1
8009046: 70bb strb r3, [r7, #2]
8009048: 4613 mov r3, r2
800904a: 707b strb r3, [r7, #1]
HAL_StatusTypeDef hal_status = HAL_OK;
800904c: 2300 movs r3, #0
800904e: 73fb strb r3, [r7, #15]
USBH_StatusTypeDef usb_status = USBH_OK;
8009050: 2300 movs r3, #0
8009052: 73bb strb r3, [r7, #14]
hal_status = HAL_HCD_HC_Init(phost->pData, pipe_num, epnum,
8009054: 687b ldr r3, [r7, #4]
8009056: f8d3 03d0 ldr.w r0, [r3, #976] ; 0x3d0
800905a: 787c ldrb r4, [r7, #1]
800905c: 78ba ldrb r2, [r7, #2]
800905e: 78f9 ldrb r1, [r7, #3]
8009060: 8d3b ldrh r3, [r7, #40] ; 0x28
8009062: 9302 str r3, [sp, #8]
8009064: f897 3024 ldrb.w r3, [r7, #36] ; 0x24
8009068: 9301 str r3, [sp, #4]
800906a: f897 3020 ldrb.w r3, [r7, #32]
800906e: 9300 str r3, [sp, #0]
8009070: 4623 mov r3, r4
8009072: f7f8 fc49 bl 8001908 <HAL_HCD_HC_Init>
8009076: 4603 mov r3, r0
8009078: 73fb strb r3, [r7, #15]
dev_address, speed, ep_type, mps);
usb_status = USBH_Get_USB_Status(hal_status);
800907a: 7bfb ldrb r3, [r7, #15]
800907c: 4618 mov r0, r3
800907e: f000 f8bf bl 8009200 <USBH_Get_USB_Status>
8009082: 4603 mov r3, r0
8009084: 73bb strb r3, [r7, #14]
return usb_status;
8009086: 7bbb ldrb r3, [r7, #14]
}
8009088: 4618 mov r0, r3
800908a: 3714 adds r7, #20
800908c: 46bd mov sp, r7
800908e: bd90 pop {r4, r7, pc}
08009090 <USBH_LL_ClosePipe>:
* @param phost: Host handle
* @param pipe: Pipe index
* @retval USBH status
*/
USBH_StatusTypeDef USBH_LL_ClosePipe(USBH_HandleTypeDef *phost, uint8_t pipe)
{
8009090: b580 push {r7, lr}
8009092: b084 sub sp, #16
8009094: af00 add r7, sp, #0
8009096: 6078 str r0, [r7, #4]
8009098: 460b mov r3, r1
800909a: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800909c: 2300 movs r3, #0
800909e: 73fb strb r3, [r7, #15]
USBH_StatusTypeDef usb_status = USBH_OK;
80090a0: 2300 movs r3, #0
80090a2: 73bb strb r3, [r7, #14]
hal_status = HAL_HCD_HC_Halt(phost->pData, pipe);
80090a4: 687b ldr r3, [r7, #4]
80090a6: f8d3 33d0 ldr.w r3, [r3, #976] ; 0x3d0
80090aa: 78fa ldrb r2, [r7, #3]
80090ac: 4611 mov r1, r2
80090ae: 4618 mov r0, r3
80090b0: f7f8 fcc2 bl 8001a38 <HAL_HCD_HC_Halt>
80090b4: 4603 mov r3, r0
80090b6: 73fb strb r3, [r7, #15]
usb_status = USBH_Get_USB_Status(hal_status);
80090b8: 7bfb ldrb r3, [r7, #15]
80090ba: 4618 mov r0, r3
80090bc: f000 f8a0 bl 8009200 <USBH_Get_USB_Status>
80090c0: 4603 mov r3, r0
80090c2: 73bb strb r3, [r7, #14]
return usb_status;
80090c4: 7bbb ldrb r3, [r7, #14]
}
80090c6: 4618 mov r0, r3
80090c8: 3710 adds r7, #16
80090ca: 46bd mov sp, r7
80090cc: bd80 pop {r7, pc}
080090ce <USBH_LL_SubmitURB>:
* @retval Status
*/
USBH_StatusTypeDef USBH_LL_SubmitURB(USBH_HandleTypeDef *phost, uint8_t pipe, uint8_t direction,
uint8_t ep_type, uint8_t token, uint8_t *pbuff, uint16_t length,
uint8_t do_ping)
{
80090ce: b590 push {r4, r7, lr}
80090d0: b089 sub sp, #36 ; 0x24
80090d2: af04 add r7, sp, #16
80090d4: 6078 str r0, [r7, #4]
80090d6: 4608 mov r0, r1
80090d8: 4611 mov r1, r2
80090da: 461a mov r2, r3
80090dc: 4603 mov r3, r0
80090de: 70fb strb r3, [r7, #3]
80090e0: 460b mov r3, r1
80090e2: 70bb strb r3, [r7, #2]
80090e4: 4613 mov r3, r2
80090e6: 707b strb r3, [r7, #1]
HAL_StatusTypeDef hal_status = HAL_OK;
80090e8: 2300 movs r3, #0
80090ea: 73fb strb r3, [r7, #15]
USBH_StatusTypeDef usb_status = USBH_OK;
80090ec: 2300 movs r3, #0
80090ee: 73bb strb r3, [r7, #14]
hal_status = HAL_HCD_HC_SubmitRequest(phost->pData, pipe, direction ,
80090f0: 687b ldr r3, [r7, #4]
80090f2: f8d3 03d0 ldr.w r0, [r3, #976] ; 0x3d0
80090f6: 787c ldrb r4, [r7, #1]
80090f8: 78ba ldrb r2, [r7, #2]
80090fa: 78f9 ldrb r1, [r7, #3]
80090fc: f897 302c ldrb.w r3, [r7, #44] ; 0x2c
8009100: 9303 str r3, [sp, #12]
8009102: 8d3b ldrh r3, [r7, #40] ; 0x28
8009104: 9302 str r3, [sp, #8]
8009106: 6a7b ldr r3, [r7, #36] ; 0x24
8009108: 9301 str r3, [sp, #4]
800910a: f897 3020 ldrb.w r3, [r7, #32]
800910e: 9300 str r3, [sp, #0]
8009110: 4623 mov r3, r4
8009112: f7f8 fcb5 bl 8001a80 <HAL_HCD_HC_SubmitRequest>
8009116: 4603 mov r3, r0
8009118: 73fb strb r3, [r7, #15]
ep_type, token, pbuff, length,
do_ping);
usb_status = USBH_Get_USB_Status(hal_status);
800911a: 7bfb ldrb r3, [r7, #15]
800911c: 4618 mov r0, r3
800911e: f000 f86f bl 8009200 <USBH_Get_USB_Status>
8009122: 4603 mov r3, r0
8009124: 73bb strb r3, [r7, #14]
return usb_status;
8009126: 7bbb ldrb r3, [r7, #14]
}
8009128: 4618 mov r0, r3
800912a: 3714 adds r7, #20
800912c: 46bd mov sp, r7
800912e: bd90 pop {r4, r7, pc}
08009130 <USBH_LL_GetURBState>:
* @arg URB_NYET
* @arg URB_ERROR
* @arg URB_STALL
*/
USBH_URBStateTypeDef USBH_LL_GetURBState(USBH_HandleTypeDef *phost, uint8_t pipe)
{
8009130: b580 push {r7, lr}
8009132: b082 sub sp, #8
8009134: af00 add r7, sp, #0
8009136: 6078 str r0, [r7, #4]
8009138: 460b mov r3, r1
800913a: 70fb strb r3, [r7, #3]
return (USBH_URBStateTypeDef)HAL_HCD_HC_GetURBState (phost->pData, pipe);
800913c: 687b ldr r3, [r7, #4]
800913e: f8d3 33d0 ldr.w r3, [r3, #976] ; 0x3d0
8009142: 78fa ldrb r2, [r7, #3]
8009144: 4611 mov r1, r2
8009146: 4618 mov r0, r3
8009148: f7f8 ff5e bl 8002008 <HAL_HCD_HC_GetURBState>
800914c: 4603 mov r3, r0
}
800914e: 4618 mov r0, r3
8009150: 3708 adds r7, #8
8009152: 46bd mov sp, r7
8009154: bd80 pop {r7, pc}
08009156 <USBH_LL_DriverVBUS>:
* 0 : VBUS Inactive
* 1 : VBUS Active
* @retval Status
*/
USBH_StatusTypeDef USBH_LL_DriverVBUS(USBH_HandleTypeDef *phost, uint8_t state)
{
8009156: b580 push {r7, lr}
8009158: b082 sub sp, #8
800915a: af00 add r7, sp, #0
800915c: 6078 str r0, [r7, #4]
800915e: 460b mov r3, r1
8009160: 70fb strb r3, [r7, #3]
if (phost->id == HOST_FS) {
8009162: 687b ldr r3, [r7, #4]
8009164: f893 33cc ldrb.w r3, [r3, #972] ; 0x3cc
8009168: 2b01 cmp r3, #1
800916a: d103 bne.n 8009174 <USBH_LL_DriverVBUS+0x1e>
MX_DriverVbusFS(state);
800916c: 78fb ldrb r3, [r7, #3]
800916e: 4618 mov r0, r3
8009170: f000 f872 bl 8009258 <MX_DriverVbusFS>
/* USER CODE BEGIN 0 */
/* USER CODE END 0*/
HAL_Delay(200);
8009174: 20c8 movs r0, #200 ; 0xc8
8009176: f7f8 f87b bl 8001270 <HAL_Delay>
return USBH_OK;
800917a: 2300 movs r3, #0
}
800917c: 4618 mov r0, r3
800917e: 3708 adds r7, #8
8009180: 46bd mov sp, r7
8009182: bd80 pop {r7, pc}
08009184 <USBH_LL_SetToggle>:
* @param pipe: Pipe index
* @param toggle: toggle (0/1)
* @retval Status
*/
USBH_StatusTypeDef USBH_LL_SetToggle(USBH_HandleTypeDef *phost, uint8_t pipe, uint8_t toggle)
{
8009184: b480 push {r7}
8009186: b085 sub sp, #20
8009188: af00 add r7, sp, #0
800918a: 6078 str r0, [r7, #4]
800918c: 460b mov r3, r1
800918e: 70fb strb r3, [r7, #3]
8009190: 4613 mov r3, r2
8009192: 70bb strb r3, [r7, #2]
HCD_HandleTypeDef *pHandle;
pHandle = phost->pData;
8009194: 687b ldr r3, [r7, #4]
8009196: f8d3 33d0 ldr.w r3, [r3, #976] ; 0x3d0
800919a: 60fb str r3, [r7, #12]
if(pHandle->hc[pipe].ep_is_in)
800919c: 78fa ldrb r2, [r7, #3]
800919e: 68f9 ldr r1, [r7, #12]
80091a0: 4613 mov r3, r2
80091a2: 009b lsls r3, r3, #2
80091a4: 4413 add r3, r2
80091a6: 00db lsls r3, r3, #3
80091a8: 440b add r3, r1
80091aa: 333b adds r3, #59 ; 0x3b
80091ac: 781b ldrb r3, [r3, #0]
80091ae: 2b00 cmp r3, #0
80091b0: d00a beq.n 80091c8 <USBH_LL_SetToggle+0x44>
{
pHandle->hc[pipe].toggle_in = toggle;
80091b2: 78fa ldrb r2, [r7, #3]
80091b4: 68f9 ldr r1, [r7, #12]
80091b6: 4613 mov r3, r2
80091b8: 009b lsls r3, r3, #2
80091ba: 4413 add r3, r2
80091bc: 00db lsls r3, r3, #3
80091be: 440b add r3, r1
80091c0: 3350 adds r3, #80 ; 0x50
80091c2: 78ba ldrb r2, [r7, #2]
80091c4: 701a strb r2, [r3, #0]
80091c6: e009 b.n 80091dc <USBH_LL_SetToggle+0x58>
}
else
{
pHandle->hc[pipe].toggle_out = toggle;
80091c8: 78fa ldrb r2, [r7, #3]
80091ca: 68f9 ldr r1, [r7, #12]
80091cc: 4613 mov r3, r2
80091ce: 009b lsls r3, r3, #2
80091d0: 4413 add r3, r2
80091d2: 00db lsls r3, r3, #3
80091d4: 440b add r3, r1
80091d6: 3351 adds r3, #81 ; 0x51
80091d8: 78ba ldrb r2, [r7, #2]
80091da: 701a strb r2, [r3, #0]
}
return USBH_OK;
80091dc: 2300 movs r3, #0
}
80091de: 4618 mov r0, r3
80091e0: 3714 adds r7, #20
80091e2: 46bd mov sp, r7
80091e4: f85d 7b04 ldr.w r7, [sp], #4
80091e8: 4770 bx lr
080091ea <USBH_Delay>:
* @brief Delay routine for the USB Host Library
* @param Delay: Delay in ms
* @retval None
*/
void USBH_Delay(uint32_t Delay)
{
80091ea: b580 push {r7, lr}
80091ec: b082 sub sp, #8
80091ee: af00 add r7, sp, #0
80091f0: 6078 str r0, [r7, #4]
HAL_Delay(Delay);
80091f2: 6878 ldr r0, [r7, #4]
80091f4: f7f8 f83c bl 8001270 <HAL_Delay>
}
80091f8: bf00 nop
80091fa: 3708 adds r7, #8
80091fc: 46bd mov sp, r7
80091fe: bd80 pop {r7, pc}
08009200 <USBH_Get_USB_Status>:
* @brief Retuns the USB status depending on the HAL status:
* @param hal_status: HAL status
* @retval USB status
*/
USBH_StatusTypeDef USBH_Get_USB_Status(HAL_StatusTypeDef hal_status)
{
8009200: b480 push {r7}
8009202: b085 sub sp, #20
8009204: af00 add r7, sp, #0
8009206: 4603 mov r3, r0
8009208: 71fb strb r3, [r7, #7]
USBH_StatusTypeDef usb_status = USBH_OK;
800920a: 2300 movs r3, #0
800920c: 73fb strb r3, [r7, #15]
switch (hal_status)
800920e: 79fb ldrb r3, [r7, #7]
8009210: 2b03 cmp r3, #3
8009212: d817 bhi.n 8009244 <USBH_Get_USB_Status+0x44>
8009214: a201 add r2, pc, #4 ; (adr r2, 800921c <USBH_Get_USB_Status+0x1c>)
8009216: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800921a: bf00 nop
800921c: 0800922d .word 0x0800922d
8009220: 08009233 .word 0x08009233
8009224: 08009239 .word 0x08009239
8009228: 0800923f .word 0x0800923f
{
case HAL_OK :
usb_status = USBH_OK;
800922c: 2300 movs r3, #0
800922e: 73fb strb r3, [r7, #15]
break;
8009230: e00b b.n 800924a <USBH_Get_USB_Status+0x4a>
case HAL_ERROR :
usb_status = USBH_FAIL;
8009232: 2302 movs r3, #2
8009234: 73fb strb r3, [r7, #15]
break;
8009236: e008 b.n 800924a <USBH_Get_USB_Status+0x4a>
case HAL_BUSY :
usb_status = USBH_BUSY;
8009238: 2301 movs r3, #1
800923a: 73fb strb r3, [r7, #15]
break;
800923c: e005 b.n 800924a <USBH_Get_USB_Status+0x4a>
case HAL_TIMEOUT :
usb_status = USBH_FAIL;
800923e: 2302 movs r3, #2
8009240: 73fb strb r3, [r7, #15]
break;
8009242: e002 b.n 800924a <USBH_Get_USB_Status+0x4a>
default :
usb_status = USBH_FAIL;
8009244: 2302 movs r3, #2
8009246: 73fb strb r3, [r7, #15]
break;
8009248: bf00 nop
}
return usb_status;
800924a: 7bfb ldrb r3, [r7, #15]
}
800924c: 4618 mov r0, r3
800924e: 3714 adds r7, #20
8009250: 46bd mov sp, r7
8009252: f85d 7b04 ldr.w r7, [sp], #4
8009256: 4770 bx lr
08009258 <MX_DriverVbusFS>:
* This parameter can be one of the these values:
* - 1 : VBUS Active
* - 0 : VBUS Inactive
*/
void MX_DriverVbusFS(uint8_t state)
{
8009258: b580 push {r7, lr}
800925a: b084 sub sp, #16
800925c: af00 add r7, sp, #0
800925e: 4603 mov r3, r0
8009260: 71fb strb r3, [r7, #7]
uint8_t data = state;
8009262: 79fb ldrb r3, [r7, #7]
8009264: 73fb strb r3, [r7, #15]
/* USER CODE BEGIN PREPARE_GPIO_DATA_VBUS_FS */
if(state == 0)
8009266: 79fb ldrb r3, [r7, #7]
8009268: 2b00 cmp r3, #0
800926a: d102 bne.n 8009272 <MX_DriverVbusFS+0x1a>
{
/* Drive high Charge pump */
data = GPIO_PIN_SET;
800926c: 2301 movs r3, #1
800926e: 73fb strb r3, [r7, #15]
8009270: e001 b.n 8009276 <MX_DriverVbusFS+0x1e>
}
else
{
/* Drive low Charge pump */
data = GPIO_PIN_RESET;
8009272: 2300 movs r3, #0
8009274: 73fb strb r3, [r7, #15]
}
/* USER CODE END PREPARE_GPIO_DATA_VBUS_FS */
HAL_GPIO_WritePin(GPIOC,GPIO_PIN_0,(GPIO_PinState)data);
8009276: 7bfb ldrb r3, [r7, #15]
8009278: 461a mov r2, r3
800927a: 2101 movs r1, #1
800927c: 4803 ldr r0, [pc, #12] ; (800928c <MX_DriverVbusFS+0x34>)
800927e: f7f8 faad bl 80017dc <HAL_GPIO_WritePin>
}
8009282: bf00 nop
8009284: 3710 adds r7, #16
8009286: 46bd mov sp, r7
8009288: bd80 pop {r7, pc}
800928a: bf00 nop
800928c: 40020800 .word 0x40020800
08009290 <__errno>:
8009290: 4b01 ldr r3, [pc, #4] ; (8009298 <__errno+0x8>)
8009292: 6818 ldr r0, [r3, #0]
8009294: 4770 bx lr
8009296: bf00 nop
8009298: 20000040 .word 0x20000040
0800929c <__libc_init_array>:
800929c: b570 push {r4, r5, r6, lr}
800929e: 4e0d ldr r6, [pc, #52] ; (80092d4 <__libc_init_array+0x38>)
80092a0: 4c0d ldr r4, [pc, #52] ; (80092d8 <__libc_init_array+0x3c>)
80092a2: 1ba4 subs r4, r4, r6
80092a4: 10a4 asrs r4, r4, #2
80092a6: 2500 movs r5, #0
80092a8: 42a5 cmp r5, r4
80092aa: d109 bne.n 80092c0 <__libc_init_array+0x24>
80092ac: 4e0b ldr r6, [pc, #44] ; (80092dc <__libc_init_array+0x40>)
80092ae: 4c0c ldr r4, [pc, #48] ; (80092e0 <__libc_init_array+0x44>)
80092b0: f000 ff78 bl 800a1a4 <_init>
80092b4: 1ba4 subs r4, r4, r6
80092b6: 10a4 asrs r4, r4, #2
80092b8: 2500 movs r5, #0
80092ba: 42a5 cmp r5, r4
80092bc: d105 bne.n 80092ca <__libc_init_array+0x2e>
80092be: bd70 pop {r4, r5, r6, pc}
80092c0: f856 3025 ldr.w r3, [r6, r5, lsl #2]
80092c4: 4798 blx r3
80092c6: 3501 adds r5, #1
80092c8: e7ee b.n 80092a8 <__libc_init_array+0xc>
80092ca: f856 3025 ldr.w r3, [r6, r5, lsl #2]
80092ce: 4798 blx r3
80092d0: 3501 adds r5, #1
80092d2: e7f2 b.n 80092ba <__libc_init_array+0x1e>
80092d4: 0800a2b8 .word 0x0800a2b8
80092d8: 0800a2b8 .word 0x0800a2b8
80092dc: 0800a2b8 .word 0x0800a2b8
80092e0: 0800a2bc .word 0x0800a2bc
080092e4 <malloc>:
80092e4: 4b02 ldr r3, [pc, #8] ; (80092f0 <malloc+0xc>)
80092e6: 4601 mov r1, r0
80092e8: 6818 ldr r0, [r3, #0]
80092ea: f000 b861 b.w 80093b0 <_malloc_r>
80092ee: bf00 nop
80092f0: 20000040 .word 0x20000040
080092f4 <free>:
80092f4: 4b02 ldr r3, [pc, #8] ; (8009300 <free+0xc>)
80092f6: 4601 mov r1, r0
80092f8: 6818 ldr r0, [r3, #0]
80092fa: f000 b80b b.w 8009314 <_free_r>
80092fe: bf00 nop
8009300: 20000040 .word 0x20000040
08009304 <memset>:
8009304: 4402 add r2, r0
8009306: 4603 mov r3, r0
8009308: 4293 cmp r3, r2
800930a: d100 bne.n 800930e <memset+0xa>
800930c: 4770 bx lr
800930e: f803 1b01 strb.w r1, [r3], #1
8009312: e7f9 b.n 8009308 <memset+0x4>
08009314 <_free_r>:
8009314: b538 push {r3, r4, r5, lr}
8009316: 4605 mov r5, r0
8009318: 2900 cmp r1, #0
800931a: d045 beq.n 80093a8 <_free_r+0x94>
800931c: f851 3c04 ldr.w r3, [r1, #-4]
8009320: 1f0c subs r4, r1, #4
8009322: 2b00 cmp r3, #0
8009324: bfb8 it lt
8009326: 18e4 addlt r4, r4, r3
8009328: f000 fbc6 bl 8009ab8 <__malloc_lock>
800932c: 4a1f ldr r2, [pc, #124] ; (80093ac <_free_r+0x98>)
800932e: 6813 ldr r3, [r2, #0]
8009330: 4610 mov r0, r2
8009332: b933 cbnz r3, 8009342 <_free_r+0x2e>
8009334: 6063 str r3, [r4, #4]
8009336: 6014 str r4, [r2, #0]
8009338: 4628 mov r0, r5
800933a: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
800933e: f000 bbbc b.w 8009aba <__malloc_unlock>
8009342: 42a3 cmp r3, r4
8009344: d90c bls.n 8009360 <_free_r+0x4c>
8009346: 6821 ldr r1, [r4, #0]
8009348: 1862 adds r2, r4, r1
800934a: 4293 cmp r3, r2
800934c: bf04 itt eq
800934e: 681a ldreq r2, [r3, #0]
8009350: 685b ldreq r3, [r3, #4]
8009352: 6063 str r3, [r4, #4]
8009354: bf04 itt eq
8009356: 1852 addeq r2, r2, r1
8009358: 6022 streq r2, [r4, #0]
800935a: 6004 str r4, [r0, #0]
800935c: e7ec b.n 8009338 <_free_r+0x24>
800935e: 4613 mov r3, r2
8009360: 685a ldr r2, [r3, #4]
8009362: b10a cbz r2, 8009368 <_free_r+0x54>
8009364: 42a2 cmp r2, r4
8009366: d9fa bls.n 800935e <_free_r+0x4a>
8009368: 6819 ldr r1, [r3, #0]
800936a: 1858 adds r0, r3, r1
800936c: 42a0 cmp r0, r4
800936e: d10b bne.n 8009388 <_free_r+0x74>
8009370: 6820 ldr r0, [r4, #0]
8009372: 4401 add r1, r0
8009374: 1858 adds r0, r3, r1
8009376: 4282 cmp r2, r0
8009378: 6019 str r1, [r3, #0]
800937a: d1dd bne.n 8009338 <_free_r+0x24>
800937c: 6810 ldr r0, [r2, #0]
800937e: 6852 ldr r2, [r2, #4]
8009380: 605a str r2, [r3, #4]
8009382: 4401 add r1, r0
8009384: 6019 str r1, [r3, #0]
8009386: e7d7 b.n 8009338 <_free_r+0x24>
8009388: d902 bls.n 8009390 <_free_r+0x7c>
800938a: 230c movs r3, #12
800938c: 602b str r3, [r5, #0]
800938e: e7d3 b.n 8009338 <_free_r+0x24>
8009390: 6820 ldr r0, [r4, #0]
8009392: 1821 adds r1, r4, r0
8009394: 428a cmp r2, r1
8009396: bf04 itt eq
8009398: 6811 ldreq r1, [r2, #0]
800939a: 6852 ldreq r2, [r2, #4]
800939c: 6062 str r2, [r4, #4]
800939e: bf04 itt eq
80093a0: 1809 addeq r1, r1, r0
80093a2: 6021 streq r1, [r4, #0]
80093a4: 605c str r4, [r3, #4]
80093a6: e7c7 b.n 8009338 <_free_r+0x24>
80093a8: bd38 pop {r3, r4, r5, pc}
80093aa: bf00 nop
80093ac: 200000d4 .word 0x200000d4
080093b0 <_malloc_r>:
80093b0: b570 push {r4, r5, r6, lr}
80093b2: 1ccd adds r5, r1, #3
80093b4: f025 0503 bic.w r5, r5, #3
80093b8: 3508 adds r5, #8
80093ba: 2d0c cmp r5, #12
80093bc: bf38 it cc
80093be: 250c movcc r5, #12
80093c0: 2d00 cmp r5, #0
80093c2: 4606 mov r6, r0
80093c4: db01 blt.n 80093ca <_malloc_r+0x1a>
80093c6: 42a9 cmp r1, r5
80093c8: d903 bls.n 80093d2 <_malloc_r+0x22>
80093ca: 230c movs r3, #12
80093cc: 6033 str r3, [r6, #0]
80093ce: 2000 movs r0, #0
80093d0: bd70 pop {r4, r5, r6, pc}
80093d2: f000 fb71 bl 8009ab8 <__malloc_lock>
80093d6: 4a21 ldr r2, [pc, #132] ; (800945c <_malloc_r+0xac>)
80093d8: 6814 ldr r4, [r2, #0]
80093da: 4621 mov r1, r4
80093dc: b991 cbnz r1, 8009404 <_malloc_r+0x54>
80093de: 4c20 ldr r4, [pc, #128] ; (8009460 <_malloc_r+0xb0>)
80093e0: 6823 ldr r3, [r4, #0]
80093e2: b91b cbnz r3, 80093ec <_malloc_r+0x3c>
80093e4: 4630 mov r0, r6
80093e6: f000 f8b9 bl 800955c <_sbrk_r>
80093ea: 6020 str r0, [r4, #0]
80093ec: 4629 mov r1, r5
80093ee: 4630 mov r0, r6
80093f0: f000 f8b4 bl 800955c <_sbrk_r>
80093f4: 1c43 adds r3, r0, #1
80093f6: d124 bne.n 8009442 <_malloc_r+0x92>
80093f8: 230c movs r3, #12
80093fa: 6033 str r3, [r6, #0]
80093fc: 4630 mov r0, r6
80093fe: f000 fb5c bl 8009aba <__malloc_unlock>
8009402: e7e4 b.n 80093ce <_malloc_r+0x1e>
8009404: 680b ldr r3, [r1, #0]
8009406: 1b5b subs r3, r3, r5
8009408: d418 bmi.n 800943c <_malloc_r+0x8c>
800940a: 2b0b cmp r3, #11
800940c: d90f bls.n 800942e <_malloc_r+0x7e>
800940e: 600b str r3, [r1, #0]
8009410: 50cd str r5, [r1, r3]
8009412: 18cc adds r4, r1, r3
8009414: 4630 mov r0, r6
8009416: f000 fb50 bl 8009aba <__malloc_unlock>
800941a: f104 000b add.w r0, r4, #11
800941e: 1d23 adds r3, r4, #4
8009420: f020 0007 bic.w r0, r0, #7
8009424: 1ac3 subs r3, r0, r3
8009426: d0d3 beq.n 80093d0 <_malloc_r+0x20>
8009428: 425a negs r2, r3
800942a: 50e2 str r2, [r4, r3]
800942c: e7d0 b.n 80093d0 <_malloc_r+0x20>
800942e: 428c cmp r4, r1
8009430: 684b ldr r3, [r1, #4]
8009432: bf16 itet ne
8009434: 6063 strne r3, [r4, #4]
8009436: 6013 streq r3, [r2, #0]
8009438: 460c movne r4, r1
800943a: e7eb b.n 8009414 <_malloc_r+0x64>
800943c: 460c mov r4, r1
800943e: 6849 ldr r1, [r1, #4]
8009440: e7cc b.n 80093dc <_malloc_r+0x2c>
8009442: 1cc4 adds r4, r0, #3
8009444: f024 0403 bic.w r4, r4, #3
8009448: 42a0 cmp r0, r4
800944a: d005 beq.n 8009458 <_malloc_r+0xa8>
800944c: 1a21 subs r1, r4, r0
800944e: 4630 mov r0, r6
8009450: f000 f884 bl 800955c <_sbrk_r>
8009454: 3001 adds r0, #1
8009456: d0cf beq.n 80093f8 <_malloc_r+0x48>
8009458: 6025 str r5, [r4, #0]
800945a: e7db b.n 8009414 <_malloc_r+0x64>
800945c: 200000d4 .word 0x200000d4
8009460: 200000d8 .word 0x200000d8
08009464 <iprintf>:
8009464: b40f push {r0, r1, r2, r3}
8009466: 4b0a ldr r3, [pc, #40] ; (8009490 <iprintf+0x2c>)
8009468: b513 push {r0, r1, r4, lr}
800946a: 681c ldr r4, [r3, #0]
800946c: b124 cbz r4, 8009478 <iprintf+0x14>
800946e: 69a3 ldr r3, [r4, #24]
8009470: b913 cbnz r3, 8009478 <iprintf+0x14>
8009472: 4620 mov r0, r4
8009474: f000 fa32 bl 80098dc <__sinit>
8009478: ab05 add r3, sp, #20
800947a: 9a04 ldr r2, [sp, #16]
800947c: 68a1 ldr r1, [r4, #8]
800947e: 9301 str r3, [sp, #4]
8009480: 4620 mov r0, r4
8009482: f000 fb45 bl 8009b10 <_vfiprintf_r>
8009486: b002 add sp, #8
8009488: e8bd 4010 ldmia.w sp!, {r4, lr}
800948c: b004 add sp, #16
800948e: 4770 bx lr
8009490: 20000040 .word 0x20000040
08009494 <_puts_r>:
8009494: b570 push {r4, r5, r6, lr}
8009496: 460e mov r6, r1
8009498: 4605 mov r5, r0
800949a: b118 cbz r0, 80094a4 <_puts_r+0x10>
800949c: 6983 ldr r3, [r0, #24]
800949e: b90b cbnz r3, 80094a4 <_puts_r+0x10>
80094a0: f000 fa1c bl 80098dc <__sinit>
80094a4: 69ab ldr r3, [r5, #24]
80094a6: 68ac ldr r4, [r5, #8]
80094a8: b913 cbnz r3, 80094b0 <_puts_r+0x1c>
80094aa: 4628 mov r0, r5
80094ac: f000 fa16 bl 80098dc <__sinit>
80094b0: 4b23 ldr r3, [pc, #140] ; (8009540 <_puts_r+0xac>)
80094b2: 429c cmp r4, r3
80094b4: d117 bne.n 80094e6 <_puts_r+0x52>
80094b6: 686c ldr r4, [r5, #4]
80094b8: 89a3 ldrh r3, [r4, #12]
80094ba: 071b lsls r3, r3, #28
80094bc: d51d bpl.n 80094fa <_puts_r+0x66>
80094be: 6923 ldr r3, [r4, #16]
80094c0: b1db cbz r3, 80094fa <_puts_r+0x66>
80094c2: 3e01 subs r6, #1
80094c4: 68a3 ldr r3, [r4, #8]
80094c6: f816 1f01 ldrb.w r1, [r6, #1]!
80094ca: 3b01 subs r3, #1
80094cc: 60a3 str r3, [r4, #8]
80094ce: b9e9 cbnz r1, 800950c <_puts_r+0x78>
80094d0: 2b00 cmp r3, #0
80094d2: da2e bge.n 8009532 <_puts_r+0x9e>
80094d4: 4622 mov r2, r4
80094d6: 210a movs r1, #10
80094d8: 4628 mov r0, r5
80094da: f000 f84f bl 800957c <__swbuf_r>
80094de: 3001 adds r0, #1
80094e0: d011 beq.n 8009506 <_puts_r+0x72>
80094e2: 200a movs r0, #10
80094e4: e011 b.n 800950a <_puts_r+0x76>
80094e6: 4b17 ldr r3, [pc, #92] ; (8009544 <_puts_r+0xb0>)
80094e8: 429c cmp r4, r3
80094ea: d101 bne.n 80094f0 <_puts_r+0x5c>
80094ec: 68ac ldr r4, [r5, #8]
80094ee: e7e3 b.n 80094b8 <_puts_r+0x24>
80094f0: 4b15 ldr r3, [pc, #84] ; (8009548 <_puts_r+0xb4>)
80094f2: 429c cmp r4, r3
80094f4: bf08 it eq
80094f6: 68ec ldreq r4, [r5, #12]
80094f8: e7de b.n 80094b8 <_puts_r+0x24>
80094fa: 4621 mov r1, r4
80094fc: 4628 mov r0, r5
80094fe: f000 f88f bl 8009620 <__swsetup_r>
8009502: 2800 cmp r0, #0
8009504: d0dd beq.n 80094c2 <_puts_r+0x2e>
8009506: f04f 30ff mov.w r0, #4294967295
800950a: bd70 pop {r4, r5, r6, pc}
800950c: 2b00 cmp r3, #0
800950e: da04 bge.n 800951a <_puts_r+0x86>
8009510: 69a2 ldr r2, [r4, #24]
8009512: 429a cmp r2, r3
8009514: dc06 bgt.n 8009524 <_puts_r+0x90>
8009516: 290a cmp r1, #10
8009518: d004 beq.n 8009524 <_puts_r+0x90>
800951a: 6823 ldr r3, [r4, #0]
800951c: 1c5a adds r2, r3, #1
800951e: 6022 str r2, [r4, #0]
8009520: 7019 strb r1, [r3, #0]
8009522: e7cf b.n 80094c4 <_puts_r+0x30>
8009524: 4622 mov r2, r4
8009526: 4628 mov r0, r5
8009528: f000 f828 bl 800957c <__swbuf_r>
800952c: 3001 adds r0, #1
800952e: d1c9 bne.n 80094c4 <_puts_r+0x30>
8009530: e7e9 b.n 8009506 <_puts_r+0x72>
8009532: 6823 ldr r3, [r4, #0]
8009534: 200a movs r0, #10
8009536: 1c5a adds r2, r3, #1
8009538: 6022 str r2, [r4, #0]
800953a: 7018 strb r0, [r3, #0]
800953c: e7e5 b.n 800950a <_puts_r+0x76>
800953e: bf00 nop
8009540: 0800a23c .word 0x0800a23c
8009544: 0800a25c .word 0x0800a25c
8009548: 0800a21c .word 0x0800a21c
0800954c <puts>:
800954c: 4b02 ldr r3, [pc, #8] ; (8009558 <puts+0xc>)
800954e: 4601 mov r1, r0
8009550: 6818 ldr r0, [r3, #0]
8009552: f7ff bf9f b.w 8009494 <_puts_r>
8009556: bf00 nop
8009558: 20000040 .word 0x20000040
0800955c <_sbrk_r>:
800955c: b538 push {r3, r4, r5, lr}
800955e: 4c06 ldr r4, [pc, #24] ; (8009578 <_sbrk_r+0x1c>)
8009560: 2300 movs r3, #0
8009562: 4605 mov r5, r0
8009564: 4608 mov r0, r1
8009566: 6023 str r3, [r4, #0]
8009568: f7f7 fd34 bl 8000fd4 <_sbrk>
800956c: 1c43 adds r3, r0, #1
800956e: d102 bne.n 8009576 <_sbrk_r+0x1a>
8009570: 6823 ldr r3, [r4, #0]
8009572: b103 cbz r3, 8009576 <_sbrk_r+0x1a>
8009574: 602b str r3, [r5, #0]
8009576: bd38 pop {r3, r4, r5, pc}
8009578: 200008fc .word 0x200008fc
0800957c <__swbuf_r>:
800957c: b5f8 push {r3, r4, r5, r6, r7, lr}
800957e: 460e mov r6, r1
8009580: 4614 mov r4, r2
8009582: 4605 mov r5, r0
8009584: b118 cbz r0, 800958e <__swbuf_r+0x12>
8009586: 6983 ldr r3, [r0, #24]
8009588: b90b cbnz r3, 800958e <__swbuf_r+0x12>
800958a: f000 f9a7 bl 80098dc <__sinit>
800958e: 4b21 ldr r3, [pc, #132] ; (8009614 <__swbuf_r+0x98>)
8009590: 429c cmp r4, r3
8009592: d12a bne.n 80095ea <__swbuf_r+0x6e>
8009594: 686c ldr r4, [r5, #4]
8009596: 69a3 ldr r3, [r4, #24]
8009598: 60a3 str r3, [r4, #8]
800959a: 89a3 ldrh r3, [r4, #12]
800959c: 071a lsls r2, r3, #28
800959e: d52e bpl.n 80095fe <__swbuf_r+0x82>
80095a0: 6923 ldr r3, [r4, #16]
80095a2: b363 cbz r3, 80095fe <__swbuf_r+0x82>
80095a4: 6923 ldr r3, [r4, #16]
80095a6: 6820 ldr r0, [r4, #0]
80095a8: 1ac0 subs r0, r0, r3
80095aa: 6963 ldr r3, [r4, #20]
80095ac: b2f6 uxtb r6, r6
80095ae: 4283 cmp r3, r0
80095b0: 4637 mov r7, r6
80095b2: dc04 bgt.n 80095be <__swbuf_r+0x42>
80095b4: 4621 mov r1, r4
80095b6: 4628 mov r0, r5
80095b8: f000 f926 bl 8009808 <_fflush_r>
80095bc: bb28 cbnz r0, 800960a <__swbuf_r+0x8e>
80095be: 68a3 ldr r3, [r4, #8]
80095c0: 3b01 subs r3, #1
80095c2: 60a3 str r3, [r4, #8]
80095c4: 6823 ldr r3, [r4, #0]
80095c6: 1c5a adds r2, r3, #1
80095c8: 6022 str r2, [r4, #0]
80095ca: 701e strb r6, [r3, #0]
80095cc: 6963 ldr r3, [r4, #20]
80095ce: 3001 adds r0, #1
80095d0: 4283 cmp r3, r0
80095d2: d004 beq.n 80095de <__swbuf_r+0x62>
80095d4: 89a3 ldrh r3, [r4, #12]
80095d6: 07db lsls r3, r3, #31
80095d8: d519 bpl.n 800960e <__swbuf_r+0x92>
80095da: 2e0a cmp r6, #10
80095dc: d117 bne.n 800960e <__swbuf_r+0x92>
80095de: 4621 mov r1, r4
80095e0: 4628 mov r0, r5
80095e2: f000 f911 bl 8009808 <_fflush_r>
80095e6: b190 cbz r0, 800960e <__swbuf_r+0x92>
80095e8: e00f b.n 800960a <__swbuf_r+0x8e>
80095ea: 4b0b ldr r3, [pc, #44] ; (8009618 <__swbuf_r+0x9c>)
80095ec: 429c cmp r4, r3
80095ee: d101 bne.n 80095f4 <__swbuf_r+0x78>
80095f0: 68ac ldr r4, [r5, #8]
80095f2: e7d0 b.n 8009596 <__swbuf_r+0x1a>
80095f4: 4b09 ldr r3, [pc, #36] ; (800961c <__swbuf_r+0xa0>)
80095f6: 429c cmp r4, r3
80095f8: bf08 it eq
80095fa: 68ec ldreq r4, [r5, #12]
80095fc: e7cb b.n 8009596 <__swbuf_r+0x1a>
80095fe: 4621 mov r1, r4
8009600: 4628 mov r0, r5
8009602: f000 f80d bl 8009620 <__swsetup_r>
8009606: 2800 cmp r0, #0
8009608: d0cc beq.n 80095a4 <__swbuf_r+0x28>
800960a: f04f 37ff mov.w r7, #4294967295
800960e: 4638 mov r0, r7
8009610: bdf8 pop {r3, r4, r5, r6, r7, pc}
8009612: bf00 nop
8009614: 0800a23c .word 0x0800a23c
8009618: 0800a25c .word 0x0800a25c
800961c: 0800a21c .word 0x0800a21c
08009620 <__swsetup_r>:
8009620: 4b32 ldr r3, [pc, #200] ; (80096ec <__swsetup_r+0xcc>)
8009622: b570 push {r4, r5, r6, lr}
8009624: 681d ldr r5, [r3, #0]
8009626: 4606 mov r6, r0
8009628: 460c mov r4, r1
800962a: b125 cbz r5, 8009636 <__swsetup_r+0x16>
800962c: 69ab ldr r3, [r5, #24]
800962e: b913 cbnz r3, 8009636 <__swsetup_r+0x16>
8009630: 4628 mov r0, r5
8009632: f000 f953 bl 80098dc <__sinit>
8009636: 4b2e ldr r3, [pc, #184] ; (80096f0 <__swsetup_r+0xd0>)
8009638: 429c cmp r4, r3
800963a: d10f bne.n 800965c <__swsetup_r+0x3c>
800963c: 686c ldr r4, [r5, #4]
800963e: f9b4 300c ldrsh.w r3, [r4, #12]
8009642: b29a uxth r2, r3
8009644: 0715 lsls r5, r2, #28
8009646: d42c bmi.n 80096a2 <__swsetup_r+0x82>
8009648: 06d0 lsls r0, r2, #27
800964a: d411 bmi.n 8009670 <__swsetup_r+0x50>
800964c: 2209 movs r2, #9
800964e: 6032 str r2, [r6, #0]
8009650: f043 0340 orr.w r3, r3, #64 ; 0x40
8009654: 81a3 strh r3, [r4, #12]
8009656: f04f 30ff mov.w r0, #4294967295
800965a: e03e b.n 80096da <__swsetup_r+0xba>
800965c: 4b25 ldr r3, [pc, #148] ; (80096f4 <__swsetup_r+0xd4>)
800965e: 429c cmp r4, r3
8009660: d101 bne.n 8009666 <__swsetup_r+0x46>
8009662: 68ac ldr r4, [r5, #8]
8009664: e7eb b.n 800963e <__swsetup_r+0x1e>
8009666: 4b24 ldr r3, [pc, #144] ; (80096f8 <__swsetup_r+0xd8>)
8009668: 429c cmp r4, r3
800966a: bf08 it eq
800966c: 68ec ldreq r4, [r5, #12]
800966e: e7e6 b.n 800963e <__swsetup_r+0x1e>
8009670: 0751 lsls r1, r2, #29
8009672: d512 bpl.n 800969a <__swsetup_r+0x7a>
8009674: 6b61 ldr r1, [r4, #52] ; 0x34
8009676: b141 cbz r1, 800968a <__swsetup_r+0x6a>
8009678: f104 0344 add.w r3, r4, #68 ; 0x44
800967c: 4299 cmp r1, r3
800967e: d002 beq.n 8009686 <__swsetup_r+0x66>
8009680: 4630 mov r0, r6
8009682: f7ff fe47 bl 8009314 <_free_r>
8009686: 2300 movs r3, #0
8009688: 6363 str r3, [r4, #52] ; 0x34
800968a: 89a3 ldrh r3, [r4, #12]
800968c: f023 0324 bic.w r3, r3, #36 ; 0x24
8009690: 81a3 strh r3, [r4, #12]
8009692: 2300 movs r3, #0
8009694: 6063 str r3, [r4, #4]
8009696: 6923 ldr r3, [r4, #16]
8009698: 6023 str r3, [r4, #0]
800969a: 89a3 ldrh r3, [r4, #12]
800969c: f043 0308 orr.w r3, r3, #8
80096a0: 81a3 strh r3, [r4, #12]
80096a2: 6923 ldr r3, [r4, #16]
80096a4: b94b cbnz r3, 80096ba <__swsetup_r+0x9a>
80096a6: 89a3 ldrh r3, [r4, #12]
80096a8: f403 7320 and.w r3, r3, #640 ; 0x280
80096ac: f5b3 7f00 cmp.w r3, #512 ; 0x200
80096b0: d003 beq.n 80096ba <__swsetup_r+0x9a>
80096b2: 4621 mov r1, r4
80096b4: 4630 mov r0, r6
80096b6: f000 f9bf bl 8009a38 <__smakebuf_r>
80096ba: 89a2 ldrh r2, [r4, #12]
80096bc: f012 0301 ands.w r3, r2, #1
80096c0: d00c beq.n 80096dc <__swsetup_r+0xbc>
80096c2: 2300 movs r3, #0
80096c4: 60a3 str r3, [r4, #8]
80096c6: 6963 ldr r3, [r4, #20]
80096c8: 425b negs r3, r3
80096ca: 61a3 str r3, [r4, #24]
80096cc: 6923 ldr r3, [r4, #16]
80096ce: b953 cbnz r3, 80096e6 <__swsetup_r+0xc6>
80096d0: f9b4 300c ldrsh.w r3, [r4, #12]
80096d4: f013 0080 ands.w r0, r3, #128 ; 0x80
80096d8: d1ba bne.n 8009650 <__swsetup_r+0x30>
80096da: bd70 pop {r4, r5, r6, pc}
80096dc: 0792 lsls r2, r2, #30
80096de: bf58 it pl
80096e0: 6963 ldrpl r3, [r4, #20]
80096e2: 60a3 str r3, [r4, #8]
80096e4: e7f2 b.n 80096cc <__swsetup_r+0xac>
80096e6: 2000 movs r0, #0
80096e8: e7f7 b.n 80096da <__swsetup_r+0xba>
80096ea: bf00 nop
80096ec: 20000040 .word 0x20000040
80096f0: 0800a23c .word 0x0800a23c
80096f4: 0800a25c .word 0x0800a25c
80096f8: 0800a21c .word 0x0800a21c
080096fc <__sflush_r>:
80096fc: 898a ldrh r2, [r1, #12]
80096fe: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
8009702: 4605 mov r5, r0
8009704: 0710 lsls r0, r2, #28
8009706: 460c mov r4, r1
8009708: d458 bmi.n 80097bc <__sflush_r+0xc0>
800970a: 684b ldr r3, [r1, #4]
800970c: 2b00 cmp r3, #0
800970e: dc05 bgt.n 800971c <__sflush_r+0x20>
8009710: 6c0b ldr r3, [r1, #64] ; 0x40
8009712: 2b00 cmp r3, #0
8009714: dc02 bgt.n 800971c <__sflush_r+0x20>
8009716: 2000 movs r0, #0
8009718: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
800971c: 6ae6 ldr r6, [r4, #44] ; 0x2c
800971e: 2e00 cmp r6, #0
8009720: d0f9 beq.n 8009716 <__sflush_r+0x1a>
8009722: 2300 movs r3, #0
8009724: f412 5280 ands.w r2, r2, #4096 ; 0x1000
8009728: 682f ldr r7, [r5, #0]
800972a: 6a21 ldr r1, [r4, #32]
800972c: 602b str r3, [r5, #0]
800972e: d032 beq.n 8009796 <__sflush_r+0x9a>
8009730: 6d60 ldr r0, [r4, #84] ; 0x54
8009732: 89a3 ldrh r3, [r4, #12]
8009734: 075a lsls r2, r3, #29
8009736: d505 bpl.n 8009744 <__sflush_r+0x48>
8009738: 6863 ldr r3, [r4, #4]
800973a: 1ac0 subs r0, r0, r3
800973c: 6b63 ldr r3, [r4, #52] ; 0x34
800973e: b10b cbz r3, 8009744 <__sflush_r+0x48>
8009740: 6c23 ldr r3, [r4, #64] ; 0x40
8009742: 1ac0 subs r0, r0, r3
8009744: 2300 movs r3, #0
8009746: 4602 mov r2, r0
8009748: 6ae6 ldr r6, [r4, #44] ; 0x2c
800974a: 6a21 ldr r1, [r4, #32]
800974c: 4628 mov r0, r5
800974e: 47b0 blx r6
8009750: 1c43 adds r3, r0, #1
8009752: 89a3 ldrh r3, [r4, #12]
8009754: d106 bne.n 8009764 <__sflush_r+0x68>
8009756: 6829 ldr r1, [r5, #0]
8009758: 291d cmp r1, #29
800975a: d848 bhi.n 80097ee <__sflush_r+0xf2>
800975c: 4a29 ldr r2, [pc, #164] ; (8009804 <__sflush_r+0x108>)
800975e: 40ca lsrs r2, r1
8009760: 07d6 lsls r6, r2, #31
8009762: d544 bpl.n 80097ee <__sflush_r+0xf2>
8009764: 2200 movs r2, #0
8009766: 6062 str r2, [r4, #4]
8009768: 04d9 lsls r1, r3, #19
800976a: 6922 ldr r2, [r4, #16]
800976c: 6022 str r2, [r4, #0]
800976e: d504 bpl.n 800977a <__sflush_r+0x7e>
8009770: 1c42 adds r2, r0, #1
8009772: d101 bne.n 8009778 <__sflush_r+0x7c>
8009774: 682b ldr r3, [r5, #0]
8009776: b903 cbnz r3, 800977a <__sflush_r+0x7e>
8009778: 6560 str r0, [r4, #84] ; 0x54
800977a: 6b61 ldr r1, [r4, #52] ; 0x34
800977c: 602f str r7, [r5, #0]
800977e: 2900 cmp r1, #0
8009780: d0c9 beq.n 8009716 <__sflush_r+0x1a>
8009782: f104 0344 add.w r3, r4, #68 ; 0x44
8009786: 4299 cmp r1, r3
8009788: d002 beq.n 8009790 <__sflush_r+0x94>
800978a: 4628 mov r0, r5
800978c: f7ff fdc2 bl 8009314 <_free_r>
8009790: 2000 movs r0, #0
8009792: 6360 str r0, [r4, #52] ; 0x34
8009794: e7c0 b.n 8009718 <__sflush_r+0x1c>
8009796: 2301 movs r3, #1
8009798: 4628 mov r0, r5
800979a: 47b0 blx r6
800979c: 1c41 adds r1, r0, #1
800979e: d1c8 bne.n 8009732 <__sflush_r+0x36>
80097a0: 682b ldr r3, [r5, #0]
80097a2: 2b00 cmp r3, #0
80097a4: d0c5 beq.n 8009732 <__sflush_r+0x36>
80097a6: 2b1d cmp r3, #29
80097a8: d001 beq.n 80097ae <__sflush_r+0xb2>
80097aa: 2b16 cmp r3, #22
80097ac: d101 bne.n 80097b2 <__sflush_r+0xb6>
80097ae: 602f str r7, [r5, #0]
80097b0: e7b1 b.n 8009716 <__sflush_r+0x1a>
80097b2: 89a3 ldrh r3, [r4, #12]
80097b4: f043 0340 orr.w r3, r3, #64 ; 0x40
80097b8: 81a3 strh r3, [r4, #12]
80097ba: e7ad b.n 8009718 <__sflush_r+0x1c>
80097bc: 690f ldr r7, [r1, #16]
80097be: 2f00 cmp r7, #0
80097c0: d0a9 beq.n 8009716 <__sflush_r+0x1a>
80097c2: 0793 lsls r3, r2, #30
80097c4: 680e ldr r6, [r1, #0]
80097c6: bf08 it eq
80097c8: 694b ldreq r3, [r1, #20]
80097ca: 600f str r7, [r1, #0]
80097cc: bf18 it ne
80097ce: 2300 movne r3, #0
80097d0: eba6 0807 sub.w r8, r6, r7
80097d4: 608b str r3, [r1, #8]
80097d6: f1b8 0f00 cmp.w r8, #0
80097da: dd9c ble.n 8009716 <__sflush_r+0x1a>
80097dc: 4643 mov r3, r8
80097de: 463a mov r2, r7
80097e0: 6a21 ldr r1, [r4, #32]
80097e2: 6aa6 ldr r6, [r4, #40] ; 0x28
80097e4: 4628 mov r0, r5
80097e6: 47b0 blx r6
80097e8: 2800 cmp r0, #0
80097ea: dc06 bgt.n 80097fa <__sflush_r+0xfe>
80097ec: 89a3 ldrh r3, [r4, #12]
80097ee: f043 0340 orr.w r3, r3, #64 ; 0x40
80097f2: 81a3 strh r3, [r4, #12]
80097f4: f04f 30ff mov.w r0, #4294967295
80097f8: e78e b.n 8009718 <__sflush_r+0x1c>
80097fa: 4407 add r7, r0
80097fc: eba8 0800 sub.w r8, r8, r0
8009800: e7e9 b.n 80097d6 <__sflush_r+0xda>
8009802: bf00 nop
8009804: 20400001 .word 0x20400001
08009808 <_fflush_r>:
8009808: b538 push {r3, r4, r5, lr}
800980a: 690b ldr r3, [r1, #16]
800980c: 4605 mov r5, r0
800980e: 460c mov r4, r1
8009810: b1db cbz r3, 800984a <_fflush_r+0x42>
8009812: b118 cbz r0, 800981c <_fflush_r+0x14>
8009814: 6983 ldr r3, [r0, #24]
8009816: b90b cbnz r3, 800981c <_fflush_r+0x14>
8009818: f000 f860 bl 80098dc <__sinit>
800981c: 4b0c ldr r3, [pc, #48] ; (8009850 <_fflush_r+0x48>)
800981e: 429c cmp r4, r3
8009820: d109 bne.n 8009836 <_fflush_r+0x2e>
8009822: 686c ldr r4, [r5, #4]
8009824: f9b4 300c ldrsh.w r3, [r4, #12]
8009828: b17b cbz r3, 800984a <_fflush_r+0x42>
800982a: 4621 mov r1, r4
800982c: 4628 mov r0, r5
800982e: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
8009832: f7ff bf63 b.w 80096fc <__sflush_r>
8009836: 4b07 ldr r3, [pc, #28] ; (8009854 <_fflush_r+0x4c>)
8009838: 429c cmp r4, r3
800983a: d101 bne.n 8009840 <_fflush_r+0x38>
800983c: 68ac ldr r4, [r5, #8]
800983e: e7f1 b.n 8009824 <_fflush_r+0x1c>
8009840: 4b05 ldr r3, [pc, #20] ; (8009858 <_fflush_r+0x50>)
8009842: 429c cmp r4, r3
8009844: bf08 it eq
8009846: 68ec ldreq r4, [r5, #12]
8009848: e7ec b.n 8009824 <_fflush_r+0x1c>
800984a: 2000 movs r0, #0
800984c: bd38 pop {r3, r4, r5, pc}
800984e: bf00 nop
8009850: 0800a23c .word 0x0800a23c
8009854: 0800a25c .word 0x0800a25c
8009858: 0800a21c .word 0x0800a21c
0800985c <std>:
800985c: 2300 movs r3, #0
800985e: b510 push {r4, lr}
8009860: 4604 mov r4, r0
8009862: e9c0 3300 strd r3, r3, [r0]
8009866: 6083 str r3, [r0, #8]
8009868: 8181 strh r1, [r0, #12]
800986a: 6643 str r3, [r0, #100] ; 0x64
800986c: 81c2 strh r2, [r0, #14]
800986e: e9c0 3304 strd r3, r3, [r0, #16]
8009872: 6183 str r3, [r0, #24]
8009874: 4619 mov r1, r3
8009876: 2208 movs r2, #8
8009878: 305c adds r0, #92 ; 0x5c
800987a: f7ff fd43 bl 8009304 <memset>
800987e: 4b05 ldr r3, [pc, #20] ; (8009894 <std+0x38>)
8009880: 6263 str r3, [r4, #36] ; 0x24
8009882: 4b05 ldr r3, [pc, #20] ; (8009898 <std+0x3c>)
8009884: 62a3 str r3, [r4, #40] ; 0x28
8009886: 4b05 ldr r3, [pc, #20] ; (800989c <std+0x40>)
8009888: 62e3 str r3, [r4, #44] ; 0x2c
800988a: 4b05 ldr r3, [pc, #20] ; (80098a0 <std+0x44>)
800988c: 6224 str r4, [r4, #32]
800988e: 6323 str r3, [r4, #48] ; 0x30
8009890: bd10 pop {r4, pc}
8009892: bf00 nop
8009894: 0800a04d .word 0x0800a04d
8009898: 0800a06f .word 0x0800a06f
800989c: 0800a0a7 .word 0x0800a0a7
80098a0: 0800a0cb .word 0x0800a0cb
080098a4 <_cleanup_r>:
80098a4: 4901 ldr r1, [pc, #4] ; (80098ac <_cleanup_r+0x8>)
80098a6: f000 b885 b.w 80099b4 <_fwalk_reent>
80098aa: bf00 nop
80098ac: 08009809 .word 0x08009809
080098b0 <__sfmoreglue>:
80098b0: b570 push {r4, r5, r6, lr}
80098b2: 1e4a subs r2, r1, #1
80098b4: 2568 movs r5, #104 ; 0x68
80098b6: 4355 muls r5, r2
80098b8: 460e mov r6, r1
80098ba: f105 0174 add.w r1, r5, #116 ; 0x74
80098be: f7ff fd77 bl 80093b0 <_malloc_r>
80098c2: 4604 mov r4, r0
80098c4: b140 cbz r0, 80098d8 <__sfmoreglue+0x28>
80098c6: 2100 movs r1, #0
80098c8: e9c0 1600 strd r1, r6, [r0]
80098cc: 300c adds r0, #12
80098ce: 60a0 str r0, [r4, #8]
80098d0: f105 0268 add.w r2, r5, #104 ; 0x68
80098d4: f7ff fd16 bl 8009304 <memset>
80098d8: 4620 mov r0, r4
80098da: bd70 pop {r4, r5, r6, pc}
080098dc <__sinit>:
80098dc: 6983 ldr r3, [r0, #24]
80098de: b510 push {r4, lr}
80098e0: 4604 mov r4, r0
80098e2: bb33 cbnz r3, 8009932 <__sinit+0x56>
80098e4: e9c0 3312 strd r3, r3, [r0, #72] ; 0x48
80098e8: 6503 str r3, [r0, #80] ; 0x50
80098ea: 4b12 ldr r3, [pc, #72] ; (8009934 <__sinit+0x58>)
80098ec: 4a12 ldr r2, [pc, #72] ; (8009938 <__sinit+0x5c>)
80098ee: 681b ldr r3, [r3, #0]
80098f0: 6282 str r2, [r0, #40] ; 0x28
80098f2: 4298 cmp r0, r3
80098f4: bf04 itt eq
80098f6: 2301 moveq r3, #1
80098f8: 6183 streq r3, [r0, #24]
80098fa: f000 f81f bl 800993c <__sfp>
80098fe: 6060 str r0, [r4, #4]
8009900: 4620 mov r0, r4
8009902: f000 f81b bl 800993c <__sfp>
8009906: 60a0 str r0, [r4, #8]
8009908: 4620 mov r0, r4
800990a: f000 f817 bl 800993c <__sfp>
800990e: 2200 movs r2, #0
8009910: 60e0 str r0, [r4, #12]
8009912: 2104 movs r1, #4
8009914: 6860 ldr r0, [r4, #4]
8009916: f7ff ffa1 bl 800985c <std>
800991a: 2201 movs r2, #1
800991c: 2109 movs r1, #9
800991e: 68a0 ldr r0, [r4, #8]
8009920: f7ff ff9c bl 800985c <std>
8009924: 2202 movs r2, #2
8009926: 2112 movs r1, #18
8009928: 68e0 ldr r0, [r4, #12]
800992a: f7ff ff97 bl 800985c <std>
800992e: 2301 movs r3, #1
8009930: 61a3 str r3, [r4, #24]
8009932: bd10 pop {r4, pc}
8009934: 0800a218 .word 0x0800a218
8009938: 080098a5 .word 0x080098a5
0800993c <__sfp>:
800993c: b5f8 push {r3, r4, r5, r6, r7, lr}
800993e: 4b1b ldr r3, [pc, #108] ; (80099ac <__sfp+0x70>)
8009940: 681e ldr r6, [r3, #0]
8009942: 69b3 ldr r3, [r6, #24]
8009944: 4607 mov r7, r0
8009946: b913 cbnz r3, 800994e <__sfp+0x12>
8009948: 4630 mov r0, r6
800994a: f7ff ffc7 bl 80098dc <__sinit>
800994e: 3648 adds r6, #72 ; 0x48
8009950: e9d6 3401 ldrd r3, r4, [r6, #4]
8009954: 3b01 subs r3, #1
8009956: d503 bpl.n 8009960 <__sfp+0x24>
8009958: 6833 ldr r3, [r6, #0]
800995a: b133 cbz r3, 800996a <__sfp+0x2e>
800995c: 6836 ldr r6, [r6, #0]
800995e: e7f7 b.n 8009950 <__sfp+0x14>
8009960: f9b4 500c ldrsh.w r5, [r4, #12]
8009964: b16d cbz r5, 8009982 <__sfp+0x46>
8009966: 3468 adds r4, #104 ; 0x68
8009968: e7f4 b.n 8009954 <__sfp+0x18>
800996a: 2104 movs r1, #4
800996c: 4638 mov r0, r7
800996e: f7ff ff9f bl 80098b0 <__sfmoreglue>
8009972: 6030 str r0, [r6, #0]
8009974: 2800 cmp r0, #0
8009976: d1f1 bne.n 800995c <__sfp+0x20>
8009978: 230c movs r3, #12
800997a: 603b str r3, [r7, #0]
800997c: 4604 mov r4, r0
800997e: 4620 mov r0, r4
8009980: bdf8 pop {r3, r4, r5, r6, r7, pc}
8009982: 4b0b ldr r3, [pc, #44] ; (80099b0 <__sfp+0x74>)
8009984: 6665 str r5, [r4, #100] ; 0x64
8009986: e9c4 5500 strd r5, r5, [r4]
800998a: 60a5 str r5, [r4, #8]
800998c: e9c4 3503 strd r3, r5, [r4, #12]
8009990: e9c4 5505 strd r5, r5, [r4, #20]
8009994: 2208 movs r2, #8
8009996: 4629 mov r1, r5
8009998: f104 005c add.w r0, r4, #92 ; 0x5c
800999c: f7ff fcb2 bl 8009304 <memset>
80099a0: e9c4 550d strd r5, r5, [r4, #52] ; 0x34
80099a4: e9c4 5512 strd r5, r5, [r4, #72] ; 0x48
80099a8: e7e9 b.n 800997e <__sfp+0x42>
80099aa: bf00 nop
80099ac: 0800a218 .word 0x0800a218
80099b0: ffff0001 .word 0xffff0001
080099b4 <_fwalk_reent>:
80099b4: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
80099b8: 4680 mov r8, r0
80099ba: 4689 mov r9, r1
80099bc: f100 0448 add.w r4, r0, #72 ; 0x48
80099c0: 2600 movs r6, #0
80099c2: b914 cbnz r4, 80099ca <_fwalk_reent+0x16>
80099c4: 4630 mov r0, r6
80099c6: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
80099ca: e9d4 7501 ldrd r7, r5, [r4, #4]
80099ce: 3f01 subs r7, #1
80099d0: d501 bpl.n 80099d6 <_fwalk_reent+0x22>
80099d2: 6824 ldr r4, [r4, #0]
80099d4: e7f5 b.n 80099c2 <_fwalk_reent+0xe>
80099d6: 89ab ldrh r3, [r5, #12]
80099d8: 2b01 cmp r3, #1
80099da: d907 bls.n 80099ec <_fwalk_reent+0x38>
80099dc: f9b5 300e ldrsh.w r3, [r5, #14]
80099e0: 3301 adds r3, #1
80099e2: d003 beq.n 80099ec <_fwalk_reent+0x38>
80099e4: 4629 mov r1, r5
80099e6: 4640 mov r0, r8
80099e8: 47c8 blx r9
80099ea: 4306 orrs r6, r0
80099ec: 3568 adds r5, #104 ; 0x68
80099ee: e7ee b.n 80099ce <_fwalk_reent+0x1a>
080099f0 <__swhatbuf_r>:
80099f0: b570 push {r4, r5, r6, lr}
80099f2: 460e mov r6, r1
80099f4: f9b1 100e ldrsh.w r1, [r1, #14]
80099f8: 2900 cmp r1, #0
80099fa: b096 sub sp, #88 ; 0x58
80099fc: 4614 mov r4, r2
80099fe: 461d mov r5, r3
8009a00: da07 bge.n 8009a12 <__swhatbuf_r+0x22>
8009a02: 2300 movs r3, #0
8009a04: 602b str r3, [r5, #0]
8009a06: 89b3 ldrh r3, [r6, #12]
8009a08: 061a lsls r2, r3, #24
8009a0a: d410 bmi.n 8009a2e <__swhatbuf_r+0x3e>
8009a0c: f44f 6380 mov.w r3, #1024 ; 0x400
8009a10: e00e b.n 8009a30 <__swhatbuf_r+0x40>
8009a12: 466a mov r2, sp
8009a14: f000 fb80 bl 800a118 <_fstat_r>
8009a18: 2800 cmp r0, #0
8009a1a: dbf2 blt.n 8009a02 <__swhatbuf_r+0x12>
8009a1c: 9a01 ldr r2, [sp, #4]
8009a1e: f402 4270 and.w r2, r2, #61440 ; 0xf000
8009a22: f5a2 5300 sub.w r3, r2, #8192 ; 0x2000
8009a26: 425a negs r2, r3
8009a28: 415a adcs r2, r3
8009a2a: 602a str r2, [r5, #0]
8009a2c: e7ee b.n 8009a0c <__swhatbuf_r+0x1c>
8009a2e: 2340 movs r3, #64 ; 0x40
8009a30: 2000 movs r0, #0
8009a32: 6023 str r3, [r4, #0]
8009a34: b016 add sp, #88 ; 0x58
8009a36: bd70 pop {r4, r5, r6, pc}
08009a38 <__smakebuf_r>:
8009a38: 898b ldrh r3, [r1, #12]
8009a3a: b573 push {r0, r1, r4, r5, r6, lr}
8009a3c: 079d lsls r5, r3, #30
8009a3e: 4606 mov r6, r0
8009a40: 460c mov r4, r1
8009a42: d507 bpl.n 8009a54 <__smakebuf_r+0x1c>
8009a44: f104 0347 add.w r3, r4, #71 ; 0x47
8009a48: 6023 str r3, [r4, #0]
8009a4a: 6123 str r3, [r4, #16]
8009a4c: 2301 movs r3, #1
8009a4e: 6163 str r3, [r4, #20]
8009a50: b002 add sp, #8
8009a52: bd70 pop {r4, r5, r6, pc}
8009a54: ab01 add r3, sp, #4
8009a56: 466a mov r2, sp
8009a58: f7ff ffca bl 80099f0 <__swhatbuf_r>
8009a5c: 9900 ldr r1, [sp, #0]
8009a5e: 4605 mov r5, r0
8009a60: 4630 mov r0, r6
8009a62: f7ff fca5 bl 80093b0 <_malloc_r>
8009a66: b948 cbnz r0, 8009a7c <__smakebuf_r+0x44>
8009a68: f9b4 300c ldrsh.w r3, [r4, #12]
8009a6c: 059a lsls r2, r3, #22
8009a6e: d4ef bmi.n 8009a50 <__smakebuf_r+0x18>
8009a70: f023 0303 bic.w r3, r3, #3
8009a74: f043 0302 orr.w r3, r3, #2
8009a78: 81a3 strh r3, [r4, #12]
8009a7a: e7e3 b.n 8009a44 <__smakebuf_r+0xc>
8009a7c: 4b0d ldr r3, [pc, #52] ; (8009ab4 <__smakebuf_r+0x7c>)
8009a7e: 62b3 str r3, [r6, #40] ; 0x28
8009a80: 89a3 ldrh r3, [r4, #12]
8009a82: 6020 str r0, [r4, #0]
8009a84: f043 0380 orr.w r3, r3, #128 ; 0x80
8009a88: 81a3 strh r3, [r4, #12]
8009a8a: 9b00 ldr r3, [sp, #0]
8009a8c: 6163 str r3, [r4, #20]
8009a8e: 9b01 ldr r3, [sp, #4]
8009a90: 6120 str r0, [r4, #16]
8009a92: b15b cbz r3, 8009aac <__smakebuf_r+0x74>
8009a94: f9b4 100e ldrsh.w r1, [r4, #14]
8009a98: 4630 mov r0, r6
8009a9a: f000 fb4f bl 800a13c <_isatty_r>
8009a9e: b128 cbz r0, 8009aac <__smakebuf_r+0x74>
8009aa0: 89a3 ldrh r3, [r4, #12]
8009aa2: f023 0303 bic.w r3, r3, #3
8009aa6: f043 0301 orr.w r3, r3, #1
8009aaa: 81a3 strh r3, [r4, #12]
8009aac: 89a3 ldrh r3, [r4, #12]
8009aae: 431d orrs r5, r3
8009ab0: 81a5 strh r5, [r4, #12]
8009ab2: e7cd b.n 8009a50 <__smakebuf_r+0x18>
8009ab4: 080098a5 .word 0x080098a5
08009ab8 <__malloc_lock>:
8009ab8: 4770 bx lr
08009aba <__malloc_unlock>:
8009aba: 4770 bx lr
08009abc <__sfputc_r>:
8009abc: 6893 ldr r3, [r2, #8]
8009abe: 3b01 subs r3, #1
8009ac0: 2b00 cmp r3, #0
8009ac2: b410 push {r4}
8009ac4: 6093 str r3, [r2, #8]
8009ac6: da08 bge.n 8009ada <__sfputc_r+0x1e>
8009ac8: 6994 ldr r4, [r2, #24]
8009aca: 42a3 cmp r3, r4
8009acc: db01 blt.n 8009ad2 <__sfputc_r+0x16>
8009ace: 290a cmp r1, #10
8009ad0: d103 bne.n 8009ada <__sfputc_r+0x1e>
8009ad2: f85d 4b04 ldr.w r4, [sp], #4
8009ad6: f7ff bd51 b.w 800957c <__swbuf_r>
8009ada: 6813 ldr r3, [r2, #0]
8009adc: 1c58 adds r0, r3, #1
8009ade: 6010 str r0, [r2, #0]
8009ae0: 7019 strb r1, [r3, #0]
8009ae2: 4608 mov r0, r1
8009ae4: f85d 4b04 ldr.w r4, [sp], #4
8009ae8: 4770 bx lr
08009aea <__sfputs_r>:
8009aea: b5f8 push {r3, r4, r5, r6, r7, lr}
8009aec: 4606 mov r6, r0
8009aee: 460f mov r7, r1
8009af0: 4614 mov r4, r2
8009af2: 18d5 adds r5, r2, r3
8009af4: 42ac cmp r4, r5
8009af6: d101 bne.n 8009afc <__sfputs_r+0x12>
8009af8: 2000 movs r0, #0
8009afa: e007 b.n 8009b0c <__sfputs_r+0x22>
8009afc: 463a mov r2, r7
8009afe: f814 1b01 ldrb.w r1, [r4], #1
8009b02: 4630 mov r0, r6
8009b04: f7ff ffda bl 8009abc <__sfputc_r>
8009b08: 1c43 adds r3, r0, #1
8009b0a: d1f3 bne.n 8009af4 <__sfputs_r+0xa>
8009b0c: bdf8 pop {r3, r4, r5, r6, r7, pc}
...
08009b10 <_vfiprintf_r>:
8009b10: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
8009b14: 460c mov r4, r1
8009b16: b09d sub sp, #116 ; 0x74
8009b18: 4617 mov r7, r2
8009b1a: 461d mov r5, r3
8009b1c: 4606 mov r6, r0
8009b1e: b118 cbz r0, 8009b28 <_vfiprintf_r+0x18>
8009b20: 6983 ldr r3, [r0, #24]
8009b22: b90b cbnz r3, 8009b28 <_vfiprintf_r+0x18>
8009b24: f7ff feda bl 80098dc <__sinit>
8009b28: 4b7c ldr r3, [pc, #496] ; (8009d1c <_vfiprintf_r+0x20c>)
8009b2a: 429c cmp r4, r3
8009b2c: d158 bne.n 8009be0 <_vfiprintf_r+0xd0>
8009b2e: 6874 ldr r4, [r6, #4]
8009b30: 89a3 ldrh r3, [r4, #12]
8009b32: 0718 lsls r0, r3, #28
8009b34: d55e bpl.n 8009bf4 <_vfiprintf_r+0xe4>
8009b36: 6923 ldr r3, [r4, #16]
8009b38: 2b00 cmp r3, #0
8009b3a: d05b beq.n 8009bf4 <_vfiprintf_r+0xe4>
8009b3c: 2300 movs r3, #0
8009b3e: 9309 str r3, [sp, #36] ; 0x24
8009b40: 2320 movs r3, #32
8009b42: f88d 3029 strb.w r3, [sp, #41] ; 0x29
8009b46: 2330 movs r3, #48 ; 0x30
8009b48: f88d 302a strb.w r3, [sp, #42] ; 0x2a
8009b4c: 9503 str r5, [sp, #12]
8009b4e: f04f 0b01 mov.w fp, #1
8009b52: 46b8 mov r8, r7
8009b54: 4645 mov r5, r8
8009b56: f815 3b01 ldrb.w r3, [r5], #1
8009b5a: b10b cbz r3, 8009b60 <_vfiprintf_r+0x50>
8009b5c: 2b25 cmp r3, #37 ; 0x25
8009b5e: d154 bne.n 8009c0a <_vfiprintf_r+0xfa>
8009b60: ebb8 0a07 subs.w sl, r8, r7
8009b64: d00b beq.n 8009b7e <_vfiprintf_r+0x6e>
8009b66: 4653 mov r3, sl
8009b68: 463a mov r2, r7
8009b6a: 4621 mov r1, r4
8009b6c: 4630 mov r0, r6
8009b6e: f7ff ffbc bl 8009aea <__sfputs_r>
8009b72: 3001 adds r0, #1
8009b74: f000 80c2 beq.w 8009cfc <_vfiprintf_r+0x1ec>
8009b78: 9b09 ldr r3, [sp, #36] ; 0x24
8009b7a: 4453 add r3, sl
8009b7c: 9309 str r3, [sp, #36] ; 0x24
8009b7e: f898 3000 ldrb.w r3, [r8]
8009b82: 2b00 cmp r3, #0
8009b84: f000 80ba beq.w 8009cfc <_vfiprintf_r+0x1ec>
8009b88: 2300 movs r3, #0
8009b8a: f04f 32ff mov.w r2, #4294967295
8009b8e: e9cd 2305 strd r2, r3, [sp, #20]
8009b92: 9304 str r3, [sp, #16]
8009b94: 9307 str r3, [sp, #28]
8009b96: f88d 3053 strb.w r3, [sp, #83] ; 0x53
8009b9a: 931a str r3, [sp, #104] ; 0x68
8009b9c: 46a8 mov r8, r5
8009b9e: 2205 movs r2, #5
8009ba0: f818 1b01 ldrb.w r1, [r8], #1
8009ba4: 485e ldr r0, [pc, #376] ; (8009d20 <_vfiprintf_r+0x210>)
8009ba6: f7f6 fb1b bl 80001e0 <memchr>
8009baa: 9b04 ldr r3, [sp, #16]
8009bac: bb78 cbnz r0, 8009c0e <_vfiprintf_r+0xfe>
8009bae: 06d9 lsls r1, r3, #27
8009bb0: bf44 itt mi
8009bb2: 2220 movmi r2, #32
8009bb4: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53
8009bb8: 071a lsls r2, r3, #28
8009bba: bf44 itt mi
8009bbc: 222b movmi r2, #43 ; 0x2b
8009bbe: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53
8009bc2: 782a ldrb r2, [r5, #0]
8009bc4: 2a2a cmp r2, #42 ; 0x2a
8009bc6: d02a beq.n 8009c1e <_vfiprintf_r+0x10e>
8009bc8: 9a07 ldr r2, [sp, #28]
8009bca: 46a8 mov r8, r5
8009bcc: 2000 movs r0, #0
8009bce: 250a movs r5, #10
8009bd0: 4641 mov r1, r8
8009bd2: f811 3b01 ldrb.w r3, [r1], #1
8009bd6: 3b30 subs r3, #48 ; 0x30
8009bd8: 2b09 cmp r3, #9
8009bda: d969 bls.n 8009cb0 <_vfiprintf_r+0x1a0>
8009bdc: b360 cbz r0, 8009c38 <_vfiprintf_r+0x128>
8009bde: e024 b.n 8009c2a <_vfiprintf_r+0x11a>
8009be0: 4b50 ldr r3, [pc, #320] ; (8009d24 <_vfiprintf_r+0x214>)
8009be2: 429c cmp r4, r3
8009be4: d101 bne.n 8009bea <_vfiprintf_r+0xda>
8009be6: 68b4 ldr r4, [r6, #8]
8009be8: e7a2 b.n 8009b30 <_vfiprintf_r+0x20>
8009bea: 4b4f ldr r3, [pc, #316] ; (8009d28 <_vfiprintf_r+0x218>)
8009bec: 429c cmp r4, r3
8009bee: bf08 it eq
8009bf0: 68f4 ldreq r4, [r6, #12]
8009bf2: e79d b.n 8009b30 <_vfiprintf_r+0x20>
8009bf4: 4621 mov r1, r4
8009bf6: 4630 mov r0, r6
8009bf8: f7ff fd12 bl 8009620 <__swsetup_r>
8009bfc: 2800 cmp r0, #0
8009bfe: d09d beq.n 8009b3c <_vfiprintf_r+0x2c>
8009c00: f04f 30ff mov.w r0, #4294967295
8009c04: b01d add sp, #116 ; 0x74
8009c06: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
8009c0a: 46a8 mov r8, r5
8009c0c: e7a2 b.n 8009b54 <_vfiprintf_r+0x44>
8009c0e: 4a44 ldr r2, [pc, #272] ; (8009d20 <_vfiprintf_r+0x210>)
8009c10: 1a80 subs r0, r0, r2
8009c12: fa0b f000 lsl.w r0, fp, r0
8009c16: 4318 orrs r0, r3
8009c18: 9004 str r0, [sp, #16]
8009c1a: 4645 mov r5, r8
8009c1c: e7be b.n 8009b9c <_vfiprintf_r+0x8c>
8009c1e: 9a03 ldr r2, [sp, #12]
8009c20: 1d11 adds r1, r2, #4
8009c22: 6812 ldr r2, [r2, #0]
8009c24: 9103 str r1, [sp, #12]
8009c26: 2a00 cmp r2, #0
8009c28: db01 blt.n 8009c2e <_vfiprintf_r+0x11e>
8009c2a: 9207 str r2, [sp, #28]
8009c2c: e004 b.n 8009c38 <_vfiprintf_r+0x128>
8009c2e: 4252 negs r2, r2
8009c30: f043 0302 orr.w r3, r3, #2
8009c34: 9207 str r2, [sp, #28]
8009c36: 9304 str r3, [sp, #16]
8009c38: f898 3000 ldrb.w r3, [r8]
8009c3c: 2b2e cmp r3, #46 ; 0x2e
8009c3e: d10e bne.n 8009c5e <_vfiprintf_r+0x14e>
8009c40: f898 3001 ldrb.w r3, [r8, #1]
8009c44: 2b2a cmp r3, #42 ; 0x2a
8009c46: d138 bne.n 8009cba <_vfiprintf_r+0x1aa>
8009c48: 9b03 ldr r3, [sp, #12]
8009c4a: 1d1a adds r2, r3, #4
8009c4c: 681b ldr r3, [r3, #0]
8009c4e: 9203 str r2, [sp, #12]
8009c50: 2b00 cmp r3, #0
8009c52: bfb8 it lt
8009c54: f04f 33ff movlt.w r3, #4294967295
8009c58: f108 0802 add.w r8, r8, #2
8009c5c: 9305 str r3, [sp, #20]
8009c5e: 4d33 ldr r5, [pc, #204] ; (8009d2c <_vfiprintf_r+0x21c>)
8009c60: f898 1000 ldrb.w r1, [r8]
8009c64: 2203 movs r2, #3
8009c66: 4628 mov r0, r5
8009c68: f7f6 faba bl 80001e0 <memchr>
8009c6c: b140 cbz r0, 8009c80 <_vfiprintf_r+0x170>
8009c6e: 2340 movs r3, #64 ; 0x40
8009c70: 1b40 subs r0, r0, r5
8009c72: fa03 f000 lsl.w r0, r3, r0
8009c76: 9b04 ldr r3, [sp, #16]
8009c78: 4303 orrs r3, r0
8009c7a: f108 0801 add.w r8, r8, #1
8009c7e: 9304 str r3, [sp, #16]
8009c80: f898 1000 ldrb.w r1, [r8]
8009c84: 482a ldr r0, [pc, #168] ; (8009d30 <_vfiprintf_r+0x220>)
8009c86: f88d 1028 strb.w r1, [sp, #40] ; 0x28
8009c8a: 2206 movs r2, #6
8009c8c: f108 0701 add.w r7, r8, #1
8009c90: f7f6 faa6 bl 80001e0 <memchr>
8009c94: 2800 cmp r0, #0
8009c96: d037 beq.n 8009d08 <_vfiprintf_r+0x1f8>
8009c98: 4b26 ldr r3, [pc, #152] ; (8009d34 <_vfiprintf_r+0x224>)
8009c9a: bb1b cbnz r3, 8009ce4 <_vfiprintf_r+0x1d4>
8009c9c: 9b03 ldr r3, [sp, #12]
8009c9e: 3307 adds r3, #7
8009ca0: f023 0307 bic.w r3, r3, #7
8009ca4: 3308 adds r3, #8
8009ca6: 9303 str r3, [sp, #12]
8009ca8: 9b09 ldr r3, [sp, #36] ; 0x24
8009caa: 444b add r3, r9
8009cac: 9309 str r3, [sp, #36] ; 0x24
8009cae: e750 b.n 8009b52 <_vfiprintf_r+0x42>
8009cb0: fb05 3202 mla r2, r5, r2, r3
8009cb4: 2001 movs r0, #1
8009cb6: 4688 mov r8, r1
8009cb8: e78a b.n 8009bd0 <_vfiprintf_r+0xc0>
8009cba: 2300 movs r3, #0
8009cbc: f108 0801 add.w r8, r8, #1
8009cc0: 9305 str r3, [sp, #20]
8009cc2: 4619 mov r1, r3
8009cc4: 250a movs r5, #10
8009cc6: 4640 mov r0, r8
8009cc8: f810 2b01 ldrb.w r2, [r0], #1
8009ccc: 3a30 subs r2, #48 ; 0x30
8009cce: 2a09 cmp r2, #9
8009cd0: d903 bls.n 8009cda <_vfiprintf_r+0x1ca>
8009cd2: 2b00 cmp r3, #0
8009cd4: d0c3 beq.n 8009c5e <_vfiprintf_r+0x14e>
8009cd6: 9105 str r1, [sp, #20]
8009cd8: e7c1 b.n 8009c5e <_vfiprintf_r+0x14e>
8009cda: fb05 2101 mla r1, r5, r1, r2
8009cde: 2301 movs r3, #1
8009ce0: 4680 mov r8, r0
8009ce2: e7f0 b.n 8009cc6 <_vfiprintf_r+0x1b6>
8009ce4: ab03 add r3, sp, #12
8009ce6: 9300 str r3, [sp, #0]
8009ce8: 4622 mov r2, r4
8009cea: 4b13 ldr r3, [pc, #76] ; (8009d38 <_vfiprintf_r+0x228>)
8009cec: a904 add r1, sp, #16
8009cee: 4630 mov r0, r6
8009cf0: f3af 8000 nop.w
8009cf4: f1b0 3fff cmp.w r0, #4294967295
8009cf8: 4681 mov r9, r0
8009cfa: d1d5 bne.n 8009ca8 <_vfiprintf_r+0x198>
8009cfc: 89a3 ldrh r3, [r4, #12]
8009cfe: 065b lsls r3, r3, #25
8009d00: f53f af7e bmi.w 8009c00 <_vfiprintf_r+0xf0>
8009d04: 9809 ldr r0, [sp, #36] ; 0x24
8009d06: e77d b.n 8009c04 <_vfiprintf_r+0xf4>
8009d08: ab03 add r3, sp, #12
8009d0a: 9300 str r3, [sp, #0]
8009d0c: 4622 mov r2, r4
8009d0e: 4b0a ldr r3, [pc, #40] ; (8009d38 <_vfiprintf_r+0x228>)
8009d10: a904 add r1, sp, #16
8009d12: 4630 mov r0, r6
8009d14: f000 f888 bl 8009e28 <_printf_i>
8009d18: e7ec b.n 8009cf4 <_vfiprintf_r+0x1e4>
8009d1a: bf00 nop
8009d1c: 0800a23c .word 0x0800a23c
8009d20: 0800a27c .word 0x0800a27c
8009d24: 0800a25c .word 0x0800a25c
8009d28: 0800a21c .word 0x0800a21c
8009d2c: 0800a282 .word 0x0800a282
8009d30: 0800a286 .word 0x0800a286
8009d34: 00000000 .word 0x00000000
8009d38: 08009aeb .word 0x08009aeb
08009d3c <_printf_common>:
8009d3c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
8009d40: 4691 mov r9, r2
8009d42: 461f mov r7, r3
8009d44: 688a ldr r2, [r1, #8]
8009d46: 690b ldr r3, [r1, #16]
8009d48: f8dd 8020 ldr.w r8, [sp, #32]
8009d4c: 4293 cmp r3, r2
8009d4e: bfb8 it lt
8009d50: 4613 movlt r3, r2
8009d52: f8c9 3000 str.w r3, [r9]
8009d56: f891 2043 ldrb.w r2, [r1, #67] ; 0x43
8009d5a: 4606 mov r6, r0
8009d5c: 460c mov r4, r1
8009d5e: b112 cbz r2, 8009d66 <_printf_common+0x2a>
8009d60: 3301 adds r3, #1
8009d62: f8c9 3000 str.w r3, [r9]
8009d66: 6823 ldr r3, [r4, #0]
8009d68: 0699 lsls r1, r3, #26
8009d6a: bf42 ittt mi
8009d6c: f8d9 3000 ldrmi.w r3, [r9]
8009d70: 3302 addmi r3, #2
8009d72: f8c9 3000 strmi.w r3, [r9]
8009d76: 6825 ldr r5, [r4, #0]
8009d78: f015 0506 ands.w r5, r5, #6
8009d7c: d107 bne.n 8009d8e <_printf_common+0x52>
8009d7e: f104 0a19 add.w sl, r4, #25
8009d82: 68e3 ldr r3, [r4, #12]
8009d84: f8d9 2000 ldr.w r2, [r9]
8009d88: 1a9b subs r3, r3, r2
8009d8a: 42ab cmp r3, r5
8009d8c: dc28 bgt.n 8009de0 <_printf_common+0xa4>
8009d8e: f894 3043 ldrb.w r3, [r4, #67] ; 0x43
8009d92: 6822 ldr r2, [r4, #0]
8009d94: 3300 adds r3, #0
8009d96: bf18 it ne
8009d98: 2301 movne r3, #1
8009d9a: 0692 lsls r2, r2, #26
8009d9c: d42d bmi.n 8009dfa <_printf_common+0xbe>
8009d9e: f104 0243 add.w r2, r4, #67 ; 0x43
8009da2: 4639 mov r1, r7
8009da4: 4630 mov r0, r6
8009da6: 47c0 blx r8
8009da8: 3001 adds r0, #1
8009daa: d020 beq.n 8009dee <_printf_common+0xb2>
8009dac: 6823 ldr r3, [r4, #0]
8009dae: 68e5 ldr r5, [r4, #12]
8009db0: f8d9 2000 ldr.w r2, [r9]
8009db4: f003 0306 and.w r3, r3, #6
8009db8: 2b04 cmp r3, #4
8009dba: bf08 it eq
8009dbc: 1aad subeq r5, r5, r2
8009dbe: 68a3 ldr r3, [r4, #8]
8009dc0: 6922 ldr r2, [r4, #16]
8009dc2: bf0c ite eq
8009dc4: ea25 75e5 biceq.w r5, r5, r5, asr #31
8009dc8: 2500 movne r5, #0
8009dca: 4293 cmp r3, r2
8009dcc: bfc4 itt gt
8009dce: 1a9b subgt r3, r3, r2
8009dd0: 18ed addgt r5, r5, r3
8009dd2: f04f 0900 mov.w r9, #0
8009dd6: 341a adds r4, #26
8009dd8: 454d cmp r5, r9
8009dda: d11a bne.n 8009e12 <_printf_common+0xd6>
8009ddc: 2000 movs r0, #0
8009dde: e008 b.n 8009df2 <_printf_common+0xb6>
8009de0: 2301 movs r3, #1
8009de2: 4652 mov r2, sl
8009de4: 4639 mov r1, r7
8009de6: 4630 mov r0, r6
8009de8: 47c0 blx r8
8009dea: 3001 adds r0, #1
8009dec: d103 bne.n 8009df6 <_printf_common+0xba>
8009dee: f04f 30ff mov.w r0, #4294967295
8009df2: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
8009df6: 3501 adds r5, #1
8009df8: e7c3 b.n 8009d82 <_printf_common+0x46>
8009dfa: 18e1 adds r1, r4, r3
8009dfc: 1c5a adds r2, r3, #1
8009dfe: 2030 movs r0, #48 ; 0x30
8009e00: f881 0043 strb.w r0, [r1, #67] ; 0x43
8009e04: 4422 add r2, r4
8009e06: f894 1045 ldrb.w r1, [r4, #69] ; 0x45
8009e0a: f882 1043 strb.w r1, [r2, #67] ; 0x43
8009e0e: 3302 adds r3, #2
8009e10: e7c5 b.n 8009d9e <_printf_common+0x62>
8009e12: 2301 movs r3, #1
8009e14: 4622 mov r2, r4
8009e16: 4639 mov r1, r7
8009e18: 4630 mov r0, r6
8009e1a: 47c0 blx r8
8009e1c: 3001 adds r0, #1
8009e1e: d0e6 beq.n 8009dee <_printf_common+0xb2>
8009e20: f109 0901 add.w r9, r9, #1
8009e24: e7d8 b.n 8009dd8 <_printf_common+0x9c>
...
08009e28 <_printf_i>:
8009e28: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr}
8009e2c: f101 0c43 add.w ip, r1, #67 ; 0x43
8009e30: 460c mov r4, r1
8009e32: 7e09 ldrb r1, [r1, #24]
8009e34: b085 sub sp, #20
8009e36: 296e cmp r1, #110 ; 0x6e
8009e38: 4617 mov r7, r2
8009e3a: 4606 mov r6, r0
8009e3c: 4698 mov r8, r3
8009e3e: 9a0c ldr r2, [sp, #48] ; 0x30
8009e40: f000 80b3 beq.w 8009faa <_printf_i+0x182>
8009e44: d822 bhi.n 8009e8c <_printf_i+0x64>
8009e46: 2963 cmp r1, #99 ; 0x63
8009e48: d036 beq.n 8009eb8 <_printf_i+0x90>
8009e4a: d80a bhi.n 8009e62 <_printf_i+0x3a>
8009e4c: 2900 cmp r1, #0
8009e4e: f000 80b9 beq.w 8009fc4 <_printf_i+0x19c>
8009e52: 2958 cmp r1, #88 ; 0x58
8009e54: f000 8083 beq.w 8009f5e <_printf_i+0x136>
8009e58: f104 0542 add.w r5, r4, #66 ; 0x42
8009e5c: f884 1042 strb.w r1, [r4, #66] ; 0x42
8009e60: e032 b.n 8009ec8 <_printf_i+0xa0>
8009e62: 2964 cmp r1, #100 ; 0x64
8009e64: d001 beq.n 8009e6a <_printf_i+0x42>
8009e66: 2969 cmp r1, #105 ; 0x69
8009e68: d1f6 bne.n 8009e58 <_printf_i+0x30>
8009e6a: 6820 ldr r0, [r4, #0]
8009e6c: 6813 ldr r3, [r2, #0]
8009e6e: 0605 lsls r5, r0, #24
8009e70: f103 0104 add.w r1, r3, #4
8009e74: d52a bpl.n 8009ecc <_printf_i+0xa4>
8009e76: 681b ldr r3, [r3, #0]
8009e78: 6011 str r1, [r2, #0]
8009e7a: 2b00 cmp r3, #0
8009e7c: da03 bge.n 8009e86 <_printf_i+0x5e>
8009e7e: 222d movs r2, #45 ; 0x2d
8009e80: 425b negs r3, r3
8009e82: f884 2043 strb.w r2, [r4, #67] ; 0x43
8009e86: 486f ldr r0, [pc, #444] ; (800a044 <_printf_i+0x21c>)
8009e88: 220a movs r2, #10
8009e8a: e039 b.n 8009f00 <_printf_i+0xd8>
8009e8c: 2973 cmp r1, #115 ; 0x73
8009e8e: f000 809d beq.w 8009fcc <_printf_i+0x1a4>
8009e92: d808 bhi.n 8009ea6 <_printf_i+0x7e>
8009e94: 296f cmp r1, #111 ; 0x6f
8009e96: d020 beq.n 8009eda <_printf_i+0xb2>
8009e98: 2970 cmp r1, #112 ; 0x70
8009e9a: d1dd bne.n 8009e58 <_printf_i+0x30>
8009e9c: 6823 ldr r3, [r4, #0]
8009e9e: f043 0320 orr.w r3, r3, #32
8009ea2: 6023 str r3, [r4, #0]
8009ea4: e003 b.n 8009eae <_printf_i+0x86>
8009ea6: 2975 cmp r1, #117 ; 0x75
8009ea8: d017 beq.n 8009eda <_printf_i+0xb2>
8009eaa: 2978 cmp r1, #120 ; 0x78
8009eac: d1d4 bne.n 8009e58 <_printf_i+0x30>
8009eae: 2378 movs r3, #120 ; 0x78
8009eb0: f884 3045 strb.w r3, [r4, #69] ; 0x45
8009eb4: 4864 ldr r0, [pc, #400] ; (800a048 <_printf_i+0x220>)
8009eb6: e055 b.n 8009f64 <_printf_i+0x13c>
8009eb8: 6813 ldr r3, [r2, #0]
8009eba: 1d19 adds r1, r3, #4
8009ebc: 681b ldr r3, [r3, #0]
8009ebe: 6011 str r1, [r2, #0]
8009ec0: f104 0542 add.w r5, r4, #66 ; 0x42
8009ec4: f884 3042 strb.w r3, [r4, #66] ; 0x42
8009ec8: 2301 movs r3, #1
8009eca: e08c b.n 8009fe6 <_printf_i+0x1be>
8009ecc: 681b ldr r3, [r3, #0]
8009ece: 6011 str r1, [r2, #0]
8009ed0: f010 0f40 tst.w r0, #64 ; 0x40
8009ed4: bf18 it ne
8009ed6: b21b sxthne r3, r3
8009ed8: e7cf b.n 8009e7a <_printf_i+0x52>
8009eda: 6813 ldr r3, [r2, #0]
8009edc: 6825 ldr r5, [r4, #0]
8009ede: 1d18 adds r0, r3, #4
8009ee0: 6010 str r0, [r2, #0]
8009ee2: 0628 lsls r0, r5, #24
8009ee4: d501 bpl.n 8009eea <_printf_i+0xc2>
8009ee6: 681b ldr r3, [r3, #0]
8009ee8: e002 b.n 8009ef0 <_printf_i+0xc8>
8009eea: 0668 lsls r0, r5, #25
8009eec: d5fb bpl.n 8009ee6 <_printf_i+0xbe>
8009eee: 881b ldrh r3, [r3, #0]
8009ef0: 4854 ldr r0, [pc, #336] ; (800a044 <_printf_i+0x21c>)
8009ef2: 296f cmp r1, #111 ; 0x6f
8009ef4: bf14 ite ne
8009ef6: 220a movne r2, #10
8009ef8: 2208 moveq r2, #8
8009efa: 2100 movs r1, #0
8009efc: f884 1043 strb.w r1, [r4, #67] ; 0x43
8009f00: 6865 ldr r5, [r4, #4]
8009f02: 60a5 str r5, [r4, #8]
8009f04: 2d00 cmp r5, #0
8009f06: f2c0 8095 blt.w 800a034 <_printf_i+0x20c>
8009f0a: 6821 ldr r1, [r4, #0]
8009f0c: f021 0104 bic.w r1, r1, #4
8009f10: 6021 str r1, [r4, #0]
8009f12: 2b00 cmp r3, #0
8009f14: d13d bne.n 8009f92 <_printf_i+0x16a>
8009f16: 2d00 cmp r5, #0
8009f18: f040 808e bne.w 800a038 <_printf_i+0x210>
8009f1c: 4665 mov r5, ip
8009f1e: 2a08 cmp r2, #8
8009f20: d10b bne.n 8009f3a <_printf_i+0x112>
8009f22: 6823 ldr r3, [r4, #0]
8009f24: 07db lsls r3, r3, #31
8009f26: d508 bpl.n 8009f3a <_printf_i+0x112>
8009f28: 6923 ldr r3, [r4, #16]
8009f2a: 6862 ldr r2, [r4, #4]
8009f2c: 429a cmp r2, r3
8009f2e: bfde ittt le
8009f30: 2330 movle r3, #48 ; 0x30
8009f32: f805 3c01 strble.w r3, [r5, #-1]
8009f36: f105 35ff addle.w r5, r5, #4294967295
8009f3a: ebac 0305 sub.w r3, ip, r5
8009f3e: 6123 str r3, [r4, #16]
8009f40: f8cd 8000 str.w r8, [sp]
8009f44: 463b mov r3, r7
8009f46: aa03 add r2, sp, #12
8009f48: 4621 mov r1, r4
8009f4a: 4630 mov r0, r6
8009f4c: f7ff fef6 bl 8009d3c <_printf_common>
8009f50: 3001 adds r0, #1
8009f52: d14d bne.n 8009ff0 <_printf_i+0x1c8>
8009f54: f04f 30ff mov.w r0, #4294967295
8009f58: b005 add sp, #20
8009f5a: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
8009f5e: 4839 ldr r0, [pc, #228] ; (800a044 <_printf_i+0x21c>)
8009f60: f884 1045 strb.w r1, [r4, #69] ; 0x45
8009f64: 6813 ldr r3, [r2, #0]
8009f66: 6821 ldr r1, [r4, #0]
8009f68: 1d1d adds r5, r3, #4
8009f6a: 681b ldr r3, [r3, #0]
8009f6c: 6015 str r5, [r2, #0]
8009f6e: 060a lsls r2, r1, #24
8009f70: d50b bpl.n 8009f8a <_printf_i+0x162>
8009f72: 07ca lsls r2, r1, #31
8009f74: bf44 itt mi
8009f76: f041 0120 orrmi.w r1, r1, #32
8009f7a: 6021 strmi r1, [r4, #0]
8009f7c: b91b cbnz r3, 8009f86 <_printf_i+0x15e>
8009f7e: 6822 ldr r2, [r4, #0]
8009f80: f022 0220 bic.w r2, r2, #32
8009f84: 6022 str r2, [r4, #0]
8009f86: 2210 movs r2, #16
8009f88: e7b7 b.n 8009efa <_printf_i+0xd2>
8009f8a: 064d lsls r5, r1, #25
8009f8c: bf48 it mi
8009f8e: b29b uxthmi r3, r3
8009f90: e7ef b.n 8009f72 <_printf_i+0x14a>
8009f92: 4665 mov r5, ip
8009f94: fbb3 f1f2 udiv r1, r3, r2
8009f98: fb02 3311 mls r3, r2, r1, r3
8009f9c: 5cc3 ldrb r3, [r0, r3]
8009f9e: f805 3d01 strb.w r3, [r5, #-1]!
8009fa2: 460b mov r3, r1
8009fa4: 2900 cmp r1, #0
8009fa6: d1f5 bne.n 8009f94 <_printf_i+0x16c>
8009fa8: e7b9 b.n 8009f1e <_printf_i+0xf6>
8009faa: 6813 ldr r3, [r2, #0]
8009fac: 6825 ldr r5, [r4, #0]
8009fae: 6961 ldr r1, [r4, #20]
8009fb0: 1d18 adds r0, r3, #4
8009fb2: 6010 str r0, [r2, #0]
8009fb4: 0628 lsls r0, r5, #24
8009fb6: 681b ldr r3, [r3, #0]
8009fb8: d501 bpl.n 8009fbe <_printf_i+0x196>
8009fba: 6019 str r1, [r3, #0]
8009fbc: e002 b.n 8009fc4 <_printf_i+0x19c>
8009fbe: 066a lsls r2, r5, #25
8009fc0: d5fb bpl.n 8009fba <_printf_i+0x192>
8009fc2: 8019 strh r1, [r3, #0]
8009fc4: 2300 movs r3, #0
8009fc6: 6123 str r3, [r4, #16]
8009fc8: 4665 mov r5, ip
8009fca: e7b9 b.n 8009f40 <_printf_i+0x118>
8009fcc: 6813 ldr r3, [r2, #0]
8009fce: 1d19 adds r1, r3, #4
8009fd0: 6011 str r1, [r2, #0]
8009fd2: 681d ldr r5, [r3, #0]
8009fd4: 6862 ldr r2, [r4, #4]
8009fd6: 2100 movs r1, #0
8009fd8: 4628 mov r0, r5
8009fda: f7f6 f901 bl 80001e0 <memchr>
8009fde: b108 cbz r0, 8009fe4 <_printf_i+0x1bc>
8009fe0: 1b40 subs r0, r0, r5
8009fe2: 6060 str r0, [r4, #4]
8009fe4: 6863 ldr r3, [r4, #4]
8009fe6: 6123 str r3, [r4, #16]
8009fe8: 2300 movs r3, #0
8009fea: f884 3043 strb.w r3, [r4, #67] ; 0x43
8009fee: e7a7 b.n 8009f40 <_printf_i+0x118>
8009ff0: 6923 ldr r3, [r4, #16]
8009ff2: 462a mov r2, r5
8009ff4: 4639 mov r1, r7
8009ff6: 4630 mov r0, r6
8009ff8: 47c0 blx r8
8009ffa: 3001 adds r0, #1
8009ffc: d0aa beq.n 8009f54 <_printf_i+0x12c>
8009ffe: 6823 ldr r3, [r4, #0]
800a000: 079b lsls r3, r3, #30
800a002: d413 bmi.n 800a02c <_printf_i+0x204>
800a004: 68e0 ldr r0, [r4, #12]
800a006: 9b03 ldr r3, [sp, #12]
800a008: 4298 cmp r0, r3
800a00a: bfb8 it lt
800a00c: 4618 movlt r0, r3
800a00e: e7a3 b.n 8009f58 <_printf_i+0x130>
800a010: 2301 movs r3, #1
800a012: 464a mov r2, r9
800a014: 4639 mov r1, r7
800a016: 4630 mov r0, r6
800a018: 47c0 blx r8
800a01a: 3001 adds r0, #1
800a01c: d09a beq.n 8009f54 <_printf_i+0x12c>
800a01e: 3501 adds r5, #1
800a020: 68e3 ldr r3, [r4, #12]
800a022: 9a03 ldr r2, [sp, #12]
800a024: 1a9b subs r3, r3, r2
800a026: 42ab cmp r3, r5
800a028: dcf2 bgt.n 800a010 <_printf_i+0x1e8>
800a02a: e7eb b.n 800a004 <_printf_i+0x1dc>
800a02c: 2500 movs r5, #0
800a02e: f104 0919 add.w r9, r4, #25
800a032: e7f5 b.n 800a020 <_printf_i+0x1f8>
800a034: 2b00 cmp r3, #0
800a036: d1ac bne.n 8009f92 <_printf_i+0x16a>
800a038: 7803 ldrb r3, [r0, #0]
800a03a: f884 3042 strb.w r3, [r4, #66] ; 0x42
800a03e: f104 0542 add.w r5, r4, #66 ; 0x42
800a042: e76c b.n 8009f1e <_printf_i+0xf6>
800a044: 0800a28d .word 0x0800a28d
800a048: 0800a29e .word 0x0800a29e
0800a04c <__sread>:
800a04c: b510 push {r4, lr}
800a04e: 460c mov r4, r1
800a050: f9b1 100e ldrsh.w r1, [r1, #14]
800a054: f000 f894 bl 800a180 <_read_r>
800a058: 2800 cmp r0, #0
800a05a: bfab itete ge
800a05c: 6d63 ldrge r3, [r4, #84] ; 0x54
800a05e: 89a3 ldrhlt r3, [r4, #12]
800a060: 181b addge r3, r3, r0
800a062: f423 5380 biclt.w r3, r3, #4096 ; 0x1000
800a066: bfac ite ge
800a068: 6563 strge r3, [r4, #84] ; 0x54
800a06a: 81a3 strhlt r3, [r4, #12]
800a06c: bd10 pop {r4, pc}
0800a06e <__swrite>:
800a06e: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
800a072: 461f mov r7, r3
800a074: 898b ldrh r3, [r1, #12]
800a076: 05db lsls r3, r3, #23
800a078: 4605 mov r5, r0
800a07a: 460c mov r4, r1
800a07c: 4616 mov r6, r2
800a07e: d505 bpl.n 800a08c <__swrite+0x1e>
800a080: 2302 movs r3, #2
800a082: 2200 movs r2, #0
800a084: f9b1 100e ldrsh.w r1, [r1, #14]
800a088: f000 f868 bl 800a15c <_lseek_r>
800a08c: 89a3 ldrh r3, [r4, #12]
800a08e: f9b4 100e ldrsh.w r1, [r4, #14]
800a092: f423 5380 bic.w r3, r3, #4096 ; 0x1000
800a096: 81a3 strh r3, [r4, #12]
800a098: 4632 mov r2, r6
800a09a: 463b mov r3, r7
800a09c: 4628 mov r0, r5
800a09e: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
800a0a2: f000 b817 b.w 800a0d4 <_write_r>
0800a0a6 <__sseek>:
800a0a6: b510 push {r4, lr}
800a0a8: 460c mov r4, r1
800a0aa: f9b1 100e ldrsh.w r1, [r1, #14]
800a0ae: f000 f855 bl 800a15c <_lseek_r>
800a0b2: 1c43 adds r3, r0, #1
800a0b4: 89a3 ldrh r3, [r4, #12]
800a0b6: bf15 itete ne
800a0b8: 6560 strne r0, [r4, #84] ; 0x54
800a0ba: f423 5380 biceq.w r3, r3, #4096 ; 0x1000
800a0be: f443 5380 orrne.w r3, r3, #4096 ; 0x1000
800a0c2: 81a3 strheq r3, [r4, #12]
800a0c4: bf18 it ne
800a0c6: 81a3 strhne r3, [r4, #12]
800a0c8: bd10 pop {r4, pc}
0800a0ca <__sclose>:
800a0ca: f9b1 100e ldrsh.w r1, [r1, #14]
800a0ce: f000 b813 b.w 800a0f8 <_close_r>
...
0800a0d4 <_write_r>:
800a0d4: b538 push {r3, r4, r5, lr}
800a0d6: 4c07 ldr r4, [pc, #28] ; (800a0f4 <_write_r+0x20>)
800a0d8: 4605 mov r5, r0
800a0da: 4608 mov r0, r1
800a0dc: 4611 mov r1, r2
800a0de: 2200 movs r2, #0
800a0e0: 6022 str r2, [r4, #0]
800a0e2: 461a mov r2, r3
800a0e4: f7f6 ff25 bl 8000f32 <_write>
800a0e8: 1c43 adds r3, r0, #1
800a0ea: d102 bne.n 800a0f2 <_write_r+0x1e>
800a0ec: 6823 ldr r3, [r4, #0]
800a0ee: b103 cbz r3, 800a0f2 <_write_r+0x1e>
800a0f0: 602b str r3, [r5, #0]
800a0f2: bd38 pop {r3, r4, r5, pc}
800a0f4: 200008fc .word 0x200008fc
0800a0f8 <_close_r>:
800a0f8: b538 push {r3, r4, r5, lr}
800a0fa: 4c06 ldr r4, [pc, #24] ; (800a114 <_close_r+0x1c>)
800a0fc: 2300 movs r3, #0
800a0fe: 4605 mov r5, r0
800a100: 4608 mov r0, r1
800a102: 6023 str r3, [r4, #0]
800a104: f7f6 ff31 bl 8000f6a <_close>
800a108: 1c43 adds r3, r0, #1
800a10a: d102 bne.n 800a112 <_close_r+0x1a>
800a10c: 6823 ldr r3, [r4, #0]
800a10e: b103 cbz r3, 800a112 <_close_r+0x1a>
800a110: 602b str r3, [r5, #0]
800a112: bd38 pop {r3, r4, r5, pc}
800a114: 200008fc .word 0x200008fc
0800a118 <_fstat_r>:
800a118: b538 push {r3, r4, r5, lr}
800a11a: 4c07 ldr r4, [pc, #28] ; (800a138 <_fstat_r+0x20>)
800a11c: 2300 movs r3, #0
800a11e: 4605 mov r5, r0
800a120: 4608 mov r0, r1
800a122: 4611 mov r1, r2
800a124: 6023 str r3, [r4, #0]
800a126: f7f6 ff2c bl 8000f82 <_fstat>
800a12a: 1c43 adds r3, r0, #1
800a12c: d102 bne.n 800a134 <_fstat_r+0x1c>
800a12e: 6823 ldr r3, [r4, #0]
800a130: b103 cbz r3, 800a134 <_fstat_r+0x1c>
800a132: 602b str r3, [r5, #0]
800a134: bd38 pop {r3, r4, r5, pc}
800a136: bf00 nop
800a138: 200008fc .word 0x200008fc
0800a13c <_isatty_r>:
800a13c: b538 push {r3, r4, r5, lr}
800a13e: 4c06 ldr r4, [pc, #24] ; (800a158 <_isatty_r+0x1c>)
800a140: 2300 movs r3, #0
800a142: 4605 mov r5, r0
800a144: 4608 mov r0, r1
800a146: 6023 str r3, [r4, #0]
800a148: f7f6 ff2b bl 8000fa2 <_isatty>
800a14c: 1c43 adds r3, r0, #1
800a14e: d102 bne.n 800a156 <_isatty_r+0x1a>
800a150: 6823 ldr r3, [r4, #0]
800a152: b103 cbz r3, 800a156 <_isatty_r+0x1a>
800a154: 602b str r3, [r5, #0]
800a156: bd38 pop {r3, r4, r5, pc}
800a158: 200008fc .word 0x200008fc
0800a15c <_lseek_r>:
800a15c: b538 push {r3, r4, r5, lr}
800a15e: 4c07 ldr r4, [pc, #28] ; (800a17c <_lseek_r+0x20>)
800a160: 4605 mov r5, r0
800a162: 4608 mov r0, r1
800a164: 4611 mov r1, r2
800a166: 2200 movs r2, #0
800a168: 6022 str r2, [r4, #0]
800a16a: 461a mov r2, r3
800a16c: f7f6 ff24 bl 8000fb8 <_lseek>
800a170: 1c43 adds r3, r0, #1
800a172: d102 bne.n 800a17a <_lseek_r+0x1e>
800a174: 6823 ldr r3, [r4, #0]
800a176: b103 cbz r3, 800a17a <_lseek_r+0x1e>
800a178: 602b str r3, [r5, #0]
800a17a: bd38 pop {r3, r4, r5, pc}
800a17c: 200008fc .word 0x200008fc
0800a180 <_read_r>:
800a180: b538 push {r3, r4, r5, lr}
800a182: 4c07 ldr r4, [pc, #28] ; (800a1a0 <_read_r+0x20>)
800a184: 4605 mov r5, r0
800a186: 4608 mov r0, r1
800a188: 4611 mov r1, r2
800a18a: 2200 movs r2, #0
800a18c: 6022 str r2, [r4, #0]
800a18e: 461a mov r2, r3
800a190: f7f6 feb2 bl 8000ef8 <_read>
800a194: 1c43 adds r3, r0, #1
800a196: d102 bne.n 800a19e <_read_r+0x1e>
800a198: 6823 ldr r3, [r4, #0]
800a19a: b103 cbz r3, 800a19e <_read_r+0x1e>
800a19c: 602b str r3, [r5, #0]
800a19e: bd38 pop {r3, r4, r5, pc}
800a1a0: 200008fc .word 0x200008fc
0800a1a4 <_init>:
800a1a4: b5f8 push {r3, r4, r5, r6, r7, lr}
800a1a6: bf00 nop
800a1a8: bcf8 pop {r3, r4, r5, r6, r7}
800a1aa: bc08 pop {r3}
800a1ac: 469e mov lr, r3
800a1ae: 4770 bx lr
0800a1b0 <_fini>:
800a1b0: b5f8 push {r3, r4, r5, r6, r7, lr}
800a1b2: bf00 nop
800a1b4: bcf8 pop {r3, r4, r5, r6, r7}
800a1b6: bc08 pop {r3}
800a1b8: 469e mov lr, r3
800a1ba: 4770 bx lr
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